1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 #include <engine/ce.h> 25 #include <engine/falcon.h> 26 #include <engine/fifo.h> 27 #include "fuc/gt215.fuc3.h" 28 29 #include <core/client.h> 30 #include <core/enum.h> 31 32 /******************************************************************************* 33 * Copy object classes 34 ******************************************************************************/ 35 36 static struct nvkm_oclass 37 gt215_ce_sclass[] = { 38 { 0x85b5, &nvkm_object_ofuncs }, 39 {} 40 }; 41 42 /******************************************************************************* 43 * PCE context 44 ******************************************************************************/ 45 46 static struct nvkm_oclass 47 gt215_ce_cclass = { 48 .handle = NV_ENGCTX(CE0, 0xa3), 49 .ofuncs = &(struct nvkm_ofuncs) { 50 .ctor = _nvkm_falcon_context_ctor, 51 .dtor = _nvkm_falcon_context_dtor, 52 .init = _nvkm_falcon_context_init, 53 .fini = _nvkm_falcon_context_fini, 54 .rd32 = _nvkm_falcon_context_rd32, 55 .wr32 = _nvkm_falcon_context_wr32, 56 57 }, 58 }; 59 60 /******************************************************************************* 61 * PCE engine/subdev functions 62 ******************************************************************************/ 63 64 static const struct nvkm_enum 65 gt215_ce_isr_error_name[] = { 66 { 0x0001, "ILLEGAL_MTHD" }, 67 { 0x0002, "INVALID_ENUM" }, 68 { 0x0003, "INVALID_BITFIELD" }, 69 {} 70 }; 71 72 void 73 gt215_ce_intr(struct nvkm_subdev *subdev) 74 { 75 struct nvkm_fifo *fifo = nvkm_fifo(subdev); 76 struct nvkm_engine *engine = nv_engine(subdev); 77 struct nvkm_falcon *falcon = (void *)subdev; 78 struct nvkm_object *engctx; 79 const struct nvkm_enum *en; 80 u32 dispatch = nv_ro32(falcon, 0x01c); 81 u32 stat = nv_ro32(falcon, 0x008) & dispatch & ~(dispatch >> 16); 82 u64 inst = nv_ro32(falcon, 0x050) & 0x3fffffff; 83 u32 ssta = nv_ro32(falcon, 0x040) & 0x0000ffff; 84 u32 addr = nv_ro32(falcon, 0x040) >> 16; 85 u32 mthd = (addr & 0x07ff) << 2; 86 u32 subc = (addr & 0x3800) >> 11; 87 u32 data = nv_ro32(falcon, 0x044); 88 int chid; 89 90 engctx = nvkm_engctx_get(engine, inst); 91 chid = fifo->chid(fifo, engctx); 92 93 if (stat & 0x00000040) { 94 en = nvkm_enum_find(gt215_ce_isr_error_name, ssta); 95 nvkm_error(subdev, "DISPATCH_ERROR %04x [%s] " 96 "ch %d [%010llx %s] subc %d " 97 "mthd %04x data %08x\n", 98 ssta, en ? en->name : "", chid, inst << 12, 99 nvkm_client_name(engctx), subc, mthd, data); 100 nv_wo32(falcon, 0x004, 0x00000040); 101 stat &= ~0x00000040; 102 } 103 104 if (stat) { 105 nvkm_error(subdev, "intr %08x\n", stat); 106 nv_wo32(falcon, 0x004, stat); 107 } 108 109 nvkm_engctx_put(engctx); 110 } 111 112 static int 113 gt215_ce_ctor(struct nvkm_object *parent, struct nvkm_object *engine, 114 struct nvkm_oclass *oclass, void *data, u32 size, 115 struct nvkm_object **pobject) 116 { 117 bool enable = (nv_device(parent)->chipset != 0xaf); 118 struct nvkm_falcon *ce; 119 int ret; 120 121 ret = nvkm_falcon_create(parent, engine, oclass, 0x104000, enable, 122 "PCE0", "ce0", &ce); 123 *pobject = nv_object(ce); 124 if (ret) 125 return ret; 126 127 nv_subdev(ce)->unit = 0x00802000; 128 nv_subdev(ce)->intr = gt215_ce_intr; 129 nv_engine(ce)->cclass = >215_ce_cclass; 130 nv_engine(ce)->sclass = gt215_ce_sclass; 131 nv_falcon(ce)->code.data = gt215_ce_code; 132 nv_falcon(ce)->code.size = sizeof(gt215_ce_code); 133 nv_falcon(ce)->data.data = gt215_ce_data; 134 nv_falcon(ce)->data.size = sizeof(gt215_ce_data); 135 return 0; 136 } 137 138 struct nvkm_oclass 139 gt215_ce_oclass = { 140 .handle = NV_ENGINE(CE0, 0xa3), 141 .ofuncs = &(struct nvkm_ofuncs) { 142 .ctor = gt215_ce_ctor, 143 .dtor = _nvkm_falcon_dtor, 144 .init = _nvkm_falcon_init, 145 .fini = _nvkm_falcon_fini, 146 .rd32 = _nvkm_falcon_rd32, 147 .wr32 = _nvkm_falcon_wr32, 148 }, 149 }; 150