1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 #include <engine/ce.h> 25 #include <engine/falcon.h> 26 #include "fuc/gf100.fuc3.h" 27 28 #include <nvif/class.h> 29 30 static int 31 gf100_ce_init(struct nvkm_object *object) 32 { 33 struct nvkm_falcon *ce = (void *)object; 34 struct nvkm_device *device = ce->engine.subdev.device; 35 const int idx = nv_engidx(&ce->engine) - NVDEV_ENGINE_CE0; 36 u32 base = idx * 0x1000; 37 int ret; 38 39 ret = nvkm_falcon_init(ce); 40 if (ret) 41 return ret; 42 43 nvkm_wr32(device, 0x104084 + base, idx); 44 return 0; 45 } 46 47 static const struct nvkm_falcon_func 48 gf100_ce0_func = { 49 .intr = gt215_ce_intr, 50 .sclass = { 51 { -1, -1, FERMI_DMA }, 52 {} 53 } 54 }; 55 56 static int 57 gf100_ce0_ctor(struct nvkm_object *parent, struct nvkm_object *engine, 58 struct nvkm_oclass *oclass, void *data, u32 size, 59 struct nvkm_object **pobject) 60 { 61 struct nvkm_falcon *ce; 62 int ret; 63 64 ret = nvkm_falcon_create(&gf100_ce0_func, parent, engine, oclass, 65 0x104000, true, "PCE0", "ce0", &ce); 66 *pobject = nv_object(ce); 67 if (ret) 68 return ret; 69 70 nv_subdev(ce)->unit = 0x00000040; 71 nv_falcon(ce)->code.data = gf100_ce_code; 72 nv_falcon(ce)->code.size = sizeof(gf100_ce_code); 73 nv_falcon(ce)->data.data = gf100_ce_data; 74 nv_falcon(ce)->data.size = sizeof(gf100_ce_data); 75 return 0; 76 } 77 78 static const struct nvkm_falcon_func 79 gf100_ce1_func = { 80 .intr = gt215_ce_intr, 81 .sclass = { 82 { -1, -1, FERMI_DECOMPRESS }, 83 {} 84 } 85 }; 86 87 static int 88 gf100_ce1_ctor(struct nvkm_object *parent, struct nvkm_object *engine, 89 struct nvkm_oclass *oclass, void *data, u32 size, 90 struct nvkm_object **pobject) 91 { 92 struct nvkm_falcon *ce; 93 int ret; 94 95 ret = nvkm_falcon_create(&gf100_ce1_func, parent, engine, oclass, 96 0x105000, true, "PCE1", "ce1", &ce); 97 *pobject = nv_object(ce); 98 if (ret) 99 return ret; 100 101 nv_subdev(ce)->unit = 0x00000080; 102 nv_falcon(ce)->code.data = gf100_ce_code; 103 nv_falcon(ce)->code.size = sizeof(gf100_ce_code); 104 nv_falcon(ce)->data.data = gf100_ce_data; 105 nv_falcon(ce)->data.size = sizeof(gf100_ce_data); 106 return 0; 107 } 108 109 struct nvkm_oclass 110 gf100_ce0_oclass = { 111 .handle = NV_ENGINE(CE0, 0xc0), 112 .ofuncs = &(struct nvkm_ofuncs) { 113 .ctor = gf100_ce0_ctor, 114 .dtor = _nvkm_falcon_dtor, 115 .init = gf100_ce_init, 116 .fini = _nvkm_falcon_fini, 117 }, 118 }; 119 120 struct nvkm_oclass 121 gf100_ce1_oclass = { 122 .handle = NV_ENGINE(CE1, 0xc0), 123 .ofuncs = &(struct nvkm_ofuncs) { 124 .ctor = gf100_ce1_ctor, 125 .dtor = _nvkm_falcon_dtor, 126 .init = gf100_ce_init, 127 .fini = _nvkm_falcon_fini, 128 }, 129 }; 130