1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA, 4 * Copyright (c) 2009 VMware, Inc., Palo Alto, CA., USA, 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sub license, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial portions 15 * of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 20 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 21 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 22 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 23 * USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 #include "nouveau_drv.h" 26 #include "nouveau_gem.h" 27 #include "nouveau_mem.h" 28 #include "nouveau_ttm.h" 29 30 #include <drm/drm_legacy.h> 31 32 #include <core/tegra.h> 33 34 static int 35 nouveau_manager_init(struct ttm_mem_type_manager *man, unsigned long psize) 36 { 37 return 0; 38 } 39 40 static int 41 nouveau_manager_fini(struct ttm_mem_type_manager *man) 42 { 43 return 0; 44 } 45 46 static void 47 nouveau_manager_del(struct ttm_mem_type_manager *man, struct ttm_mem_reg *reg) 48 { 49 nouveau_mem_del(reg); 50 } 51 52 static void 53 nouveau_manager_debug(struct ttm_mem_type_manager *man, 54 struct drm_printer *printer) 55 { 56 } 57 58 static int 59 nouveau_vram_manager_new(struct ttm_mem_type_manager *man, 60 struct ttm_buffer_object *bo, 61 const struct ttm_place *place, 62 struct ttm_mem_reg *reg) 63 { 64 struct nouveau_bo *nvbo = nouveau_bo(bo); 65 struct nouveau_drm *drm = nouveau_bdev(bo->bdev); 66 struct nouveau_mem *mem; 67 int ret; 68 69 if (drm->client.device.info.ram_size == 0) 70 return -ENOMEM; 71 72 ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg); 73 mem = nouveau_mem(reg); 74 if (ret) 75 return ret; 76 77 ret = nouveau_mem_vram(reg, nvbo->contig, nvbo->page); 78 if (ret) { 79 nouveau_mem_del(reg); 80 if (ret == -ENOSPC) { 81 reg->mm_node = NULL; 82 return 0; 83 } 84 return ret; 85 } 86 87 return 0; 88 } 89 90 const struct ttm_mem_type_manager_func nouveau_vram_manager = { 91 .init = nouveau_manager_init, 92 .takedown = nouveau_manager_fini, 93 .get_node = nouveau_vram_manager_new, 94 .put_node = nouveau_manager_del, 95 .debug = nouveau_manager_debug, 96 }; 97 98 static int 99 nouveau_gart_manager_new(struct ttm_mem_type_manager *man, 100 struct ttm_buffer_object *bo, 101 const struct ttm_place *place, 102 struct ttm_mem_reg *reg) 103 { 104 struct nouveau_bo *nvbo = nouveau_bo(bo); 105 struct nouveau_drm *drm = nouveau_bdev(bo->bdev); 106 struct nouveau_mem *mem; 107 int ret; 108 109 ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg); 110 mem = nouveau_mem(reg); 111 if (ret) 112 return ret; 113 114 reg->start = 0; 115 return 0; 116 } 117 118 const struct ttm_mem_type_manager_func nouveau_gart_manager = { 119 .init = nouveau_manager_init, 120 .takedown = nouveau_manager_fini, 121 .get_node = nouveau_gart_manager_new, 122 .put_node = nouveau_manager_del, 123 .debug = nouveau_manager_debug 124 }; 125 126 static int 127 nv04_gart_manager_new(struct ttm_mem_type_manager *man, 128 struct ttm_buffer_object *bo, 129 const struct ttm_place *place, 130 struct ttm_mem_reg *reg) 131 { 132 struct nouveau_bo *nvbo = nouveau_bo(bo); 133 struct nouveau_drm *drm = nouveau_bdev(bo->bdev); 134 struct nouveau_mem *mem; 135 int ret; 136 137 ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg); 138 mem = nouveau_mem(reg); 139 if (ret) 140 return ret; 141 142 ret = nvif_vmm_get(&mem->cli->vmm.vmm, PTES, false, 12, 0, 143 reg->num_pages << PAGE_SHIFT, &mem->vma[0]); 144 if (ret) { 145 nouveau_mem_del(reg); 146 if (ret == -ENOSPC) { 147 reg->mm_node = NULL; 148 return 0; 149 } 150 return ret; 151 } 152 153 reg->start = mem->vma[0].addr >> PAGE_SHIFT; 154 return 0; 155 } 156 157 const struct ttm_mem_type_manager_func nv04_gart_manager = { 158 .init = nouveau_manager_init, 159 .takedown = nouveau_manager_fini, 160 .get_node = nv04_gart_manager_new, 161 .put_node = nouveau_manager_del, 162 .debug = nouveau_manager_debug 163 }; 164 165 int 166 nouveau_ttm_mmap(struct file *filp, struct vm_area_struct *vma) 167 { 168 struct drm_file *file_priv = filp->private_data; 169 struct nouveau_drm *drm = nouveau_drm(file_priv->minor->dev); 170 171 return ttm_bo_mmap(filp, vma, &drm->ttm.bdev); 172 } 173 174 static int 175 nouveau_ttm_init_host(struct nouveau_drm *drm, u8 kind) 176 { 177 struct nvif_mmu *mmu = &drm->client.mmu; 178 int typei; 179 180 typei = nvif_mmu_type(mmu, NVIF_MEM_HOST | NVIF_MEM_MAPPABLE | 181 kind | NVIF_MEM_COHERENT); 182 if (typei < 0) 183 return -ENOSYS; 184 185 drm->ttm.type_host[!!kind] = typei; 186 187 typei = nvif_mmu_type(mmu, NVIF_MEM_HOST | NVIF_MEM_MAPPABLE | kind); 188 if (typei < 0) 189 return -ENOSYS; 190 191 drm->ttm.type_ncoh[!!kind] = typei; 192 return 0; 193 } 194 195 int 196 nouveau_ttm_init(struct nouveau_drm *drm) 197 { 198 struct nvkm_device *device = nvxx_device(&drm->client.device); 199 struct nvkm_pci *pci = device->pci; 200 struct nvif_mmu *mmu = &drm->client.mmu; 201 struct drm_device *dev = drm->dev; 202 int typei, ret; 203 204 ret = nouveau_ttm_init_host(drm, 0); 205 if (ret) 206 return ret; 207 208 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA && 209 drm->client.device.info.chipset != 0x50) { 210 ret = nouveau_ttm_init_host(drm, NVIF_MEM_KIND); 211 if (ret) 212 return ret; 213 } 214 215 if (drm->client.device.info.platform != NV_DEVICE_INFO_V0_SOC && 216 drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) { 217 typei = nvif_mmu_type(mmu, NVIF_MEM_VRAM | NVIF_MEM_MAPPABLE | 218 NVIF_MEM_KIND | 219 NVIF_MEM_COMP | 220 NVIF_MEM_DISP); 221 if (typei < 0) 222 return -ENOSYS; 223 224 drm->ttm.type_vram = typei; 225 } else { 226 drm->ttm.type_vram = -1; 227 } 228 229 if (pci && pci->agp.bridge) { 230 drm->agp.bridge = pci->agp.bridge; 231 drm->agp.base = pci->agp.base; 232 drm->agp.size = pci->agp.size; 233 drm->agp.cma = pci->agp.cma; 234 } 235 236 ret = ttm_bo_device_init(&drm->ttm.bdev, 237 &nouveau_bo_driver, 238 dev->anon_inode->i_mapping, 239 drm->client.mmu.dmabits <= 32 ? true : false); 240 if (ret) { 241 NV_ERROR(drm, "error initialising bo driver, %d\n", ret); 242 return ret; 243 } 244 245 /* VRAM init */ 246 drm->gem.vram_available = drm->client.device.info.ram_user; 247 248 arch_io_reserve_memtype_wc(device->func->resource_addr(device, 1), 249 device->func->resource_size(device, 1)); 250 251 ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_VRAM, 252 drm->gem.vram_available >> PAGE_SHIFT); 253 if (ret) { 254 NV_ERROR(drm, "VRAM mm init failed, %d\n", ret); 255 return ret; 256 } 257 258 drm->ttm.mtrr = arch_phys_wc_add(device->func->resource_addr(device, 1), 259 device->func->resource_size(device, 1)); 260 261 /* GART init */ 262 if (!drm->agp.bridge) { 263 drm->gem.gart_available = drm->client.vmm.vmm.limit; 264 } else { 265 drm->gem.gart_available = drm->agp.size; 266 } 267 268 ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_TT, 269 drm->gem.gart_available >> PAGE_SHIFT); 270 if (ret) { 271 NV_ERROR(drm, "GART mm init failed, %d\n", ret); 272 return ret; 273 } 274 275 NV_INFO(drm, "VRAM: %d MiB\n", (u32)(drm->gem.vram_available >> 20)); 276 NV_INFO(drm, "GART: %d MiB\n", (u32)(drm->gem.gart_available >> 20)); 277 return 0; 278 } 279 280 void 281 nouveau_ttm_fini(struct nouveau_drm *drm) 282 { 283 struct nvkm_device *device = nvxx_device(&drm->client.device); 284 285 ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_VRAM); 286 ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_TT); 287 288 ttm_bo_device_release(&drm->ttm.bdev); 289 290 arch_phys_wc_del(drm->ttm.mtrr); 291 drm->ttm.mtrr = 0; 292 arch_io_free_memtype_wc(device->func->resource_addr(device, 1), 293 device->func->resource_size(device, 1)); 294 295 } 296