1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA, 4 * Copyright (c) 2009 VMware, Inc., Palo Alto, CA., USA, 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sub license, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial portions 15 * of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 20 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 21 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 22 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 23 * USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 #include "nouveau_drv.h" 26 #include "nouveau_gem.h" 27 #include "nouveau_mem.h" 28 #include "nouveau_ttm.h" 29 30 #include <drm/drm_legacy.h> 31 32 #include <core/tegra.h> 33 34 static void 35 nouveau_manager_del(struct ttm_resource_manager *man, struct ttm_resource *reg) 36 { 37 nouveau_mem_del(reg); 38 } 39 40 static int 41 nouveau_vram_manager_new(struct ttm_resource_manager *man, 42 struct ttm_buffer_object *bo, 43 const struct ttm_place *place, 44 struct ttm_resource *reg) 45 { 46 struct nouveau_bo *nvbo = nouveau_bo(bo); 47 struct nouveau_drm *drm = nouveau_bdev(bo->bdev); 48 int ret; 49 50 if (drm->client.device.info.ram_size == 0) 51 return -ENOMEM; 52 53 ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg); 54 if (ret) 55 return ret; 56 57 ret = nouveau_mem_vram(reg, nvbo->contig, nvbo->page); 58 if (ret) { 59 nouveau_mem_del(reg); 60 return ret; 61 } 62 63 return 0; 64 } 65 66 const struct ttm_resource_manager_func nouveau_vram_manager = { 67 .alloc = nouveau_vram_manager_new, 68 .free = nouveau_manager_del, 69 }; 70 71 static int 72 nouveau_gart_manager_new(struct ttm_resource_manager *man, 73 struct ttm_buffer_object *bo, 74 const struct ttm_place *place, 75 struct ttm_resource *reg) 76 { 77 struct nouveau_bo *nvbo = nouveau_bo(bo); 78 struct nouveau_drm *drm = nouveau_bdev(bo->bdev); 79 int ret; 80 81 ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg); 82 if (ret) 83 return ret; 84 85 reg->start = 0; 86 return 0; 87 } 88 89 const struct ttm_resource_manager_func nouveau_gart_manager = { 90 .alloc = nouveau_gart_manager_new, 91 .free = nouveau_manager_del, 92 }; 93 94 static int 95 nv04_gart_manager_new(struct ttm_resource_manager *man, 96 struct ttm_buffer_object *bo, 97 const struct ttm_place *place, 98 struct ttm_resource *reg) 99 { 100 struct nouveau_bo *nvbo = nouveau_bo(bo); 101 struct nouveau_drm *drm = nouveau_bdev(bo->bdev); 102 struct nouveau_mem *mem; 103 int ret; 104 105 ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg); 106 mem = nouveau_mem(reg); 107 if (ret) 108 return ret; 109 110 ret = nvif_vmm_get(&mem->cli->vmm.vmm, PTES, false, 12, 0, 111 reg->num_pages << PAGE_SHIFT, &mem->vma[0]); 112 if (ret) { 113 nouveau_mem_del(reg); 114 return ret; 115 } 116 117 reg->start = mem->vma[0].addr >> PAGE_SHIFT; 118 return 0; 119 } 120 121 const struct ttm_resource_manager_func nv04_gart_manager = { 122 .alloc = nv04_gart_manager_new, 123 .free = nouveau_manager_del, 124 }; 125 126 int 127 nouveau_ttm_mmap(struct file *filp, struct vm_area_struct *vma) 128 { 129 struct drm_file *file_priv = filp->private_data; 130 struct nouveau_drm *drm = nouveau_drm(file_priv->minor->dev); 131 132 return ttm_bo_mmap(filp, vma, &drm->ttm.bdev); 133 } 134 135 static int 136 nouveau_ttm_init_host(struct nouveau_drm *drm, u8 kind) 137 { 138 struct nvif_mmu *mmu = &drm->client.mmu; 139 int typei; 140 141 typei = nvif_mmu_type(mmu, NVIF_MEM_HOST | NVIF_MEM_MAPPABLE | 142 kind | NVIF_MEM_COHERENT); 143 if (typei < 0) 144 return -ENOSYS; 145 146 drm->ttm.type_host[!!kind] = typei; 147 148 typei = nvif_mmu_type(mmu, NVIF_MEM_HOST | NVIF_MEM_MAPPABLE | kind); 149 if (typei < 0) 150 return -ENOSYS; 151 152 drm->ttm.type_ncoh[!!kind] = typei; 153 return 0; 154 } 155 156 static int 157 nouveau_ttm_init_vram(struct nouveau_drm *drm) 158 { 159 struct nvif_mmu *mmu = &drm->client.mmu; 160 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) { 161 /* Some BARs do not support being ioremapped WC */ 162 const u8 type = mmu->type[drm->ttm.type_vram].type; 163 struct ttm_resource_manager *man = kzalloc(sizeof(*man), GFP_KERNEL); 164 if (!man) 165 return -ENOMEM; 166 167 man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC; 168 man->default_caching = TTM_PL_FLAG_WC; 169 170 if (type & NVIF_MEM_UNCACHED) { 171 man->available_caching = TTM_PL_FLAG_UNCACHED; 172 man->default_caching = TTM_PL_FLAG_UNCACHED; 173 } 174 175 man->func = &nouveau_vram_manager; 176 man->use_io_reserve_lru = true; 177 178 ttm_resource_manager_init(man, 179 drm->gem.vram_available >> PAGE_SHIFT); 180 ttm_set_driver_manager(&drm->ttm.bdev, TTM_PL_VRAM, man); 181 ttm_resource_manager_set_used(man, true); 182 return 0; 183 } else { 184 return ttm_range_man_init(&drm->ttm.bdev, TTM_PL_VRAM, 185 TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC, 186 TTM_PL_FLAG_WC, false, 187 drm->gem.vram_available >> PAGE_SHIFT); 188 } 189 } 190 191 static void 192 nouveau_ttm_fini_vram(struct nouveau_drm *drm) 193 { 194 struct ttm_resource_manager *man = ttm_manager_type(&drm->ttm.bdev, TTM_PL_VRAM); 195 196 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) { 197 ttm_resource_manager_set_used(man, false); 198 ttm_resource_manager_force_list_clean(&drm->ttm.bdev, man); 199 ttm_resource_manager_cleanup(man); 200 ttm_set_driver_manager(&drm->ttm.bdev, TTM_PL_VRAM, NULL); 201 kfree(man); 202 } else 203 ttm_range_man_fini(&drm->ttm.bdev, TTM_PL_VRAM); 204 } 205 206 static int 207 nouveau_ttm_init_gtt(struct nouveau_drm *drm) 208 { 209 struct ttm_resource_manager *man; 210 unsigned long size_pages = drm->gem.gart_available >> PAGE_SHIFT; 211 unsigned available_caching, default_caching; 212 const struct ttm_resource_manager_func *func = NULL; 213 if (drm->agp.bridge) { 214 available_caching = TTM_PL_FLAG_UNCACHED | 215 TTM_PL_FLAG_WC; 216 default_caching = TTM_PL_FLAG_WC; 217 } else { 218 available_caching = TTM_PL_MASK_CACHING; 219 default_caching = TTM_PL_FLAG_CACHED; 220 } 221 222 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) 223 func = &nouveau_gart_manager; 224 else if (!drm->agp.bridge) 225 func = &nv04_gart_manager; 226 else 227 return ttm_range_man_init(&drm->ttm.bdev, TTM_PL_TT, 228 available_caching, default_caching, 229 true, 230 size_pages); 231 232 man = kzalloc(sizeof(*man), GFP_KERNEL); 233 if (!man) 234 return -ENOMEM; 235 236 man->func = func; 237 man->available_caching = available_caching; 238 man->default_caching = default_caching; 239 man->use_tt = true; 240 ttm_resource_manager_init(man, size_pages); 241 ttm_set_driver_manager(&drm->ttm.bdev, TTM_PL_TT, man); 242 ttm_resource_manager_set_used(man, true); 243 return 0; 244 } 245 246 static void 247 nouveau_ttm_fini_gtt(struct nouveau_drm *drm) 248 { 249 struct ttm_resource_manager *man = ttm_manager_type(&drm->ttm.bdev, TTM_PL_TT); 250 251 if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA && 252 drm->agp.bridge) 253 ttm_range_man_fini(&drm->ttm.bdev, TTM_PL_TT); 254 else { 255 ttm_resource_manager_set_used(man, false); 256 ttm_resource_manager_force_list_clean(&drm->ttm.bdev, man); 257 ttm_resource_manager_cleanup(man); 258 ttm_set_driver_manager(&drm->ttm.bdev, TTM_PL_TT, NULL); 259 kfree(man); 260 } 261 } 262 263 int 264 nouveau_ttm_init(struct nouveau_drm *drm) 265 { 266 struct nvkm_device *device = nvxx_device(&drm->client.device); 267 struct nvkm_pci *pci = device->pci; 268 struct nvif_mmu *mmu = &drm->client.mmu; 269 struct drm_device *dev = drm->dev; 270 int typei, ret; 271 272 ret = nouveau_ttm_init_host(drm, 0); 273 if (ret) 274 return ret; 275 276 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA && 277 drm->client.device.info.chipset != 0x50) { 278 ret = nouveau_ttm_init_host(drm, NVIF_MEM_KIND); 279 if (ret) 280 return ret; 281 } 282 283 if (drm->client.device.info.platform != NV_DEVICE_INFO_V0_SOC && 284 drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) { 285 typei = nvif_mmu_type(mmu, NVIF_MEM_VRAM | NVIF_MEM_MAPPABLE | 286 NVIF_MEM_KIND | 287 NVIF_MEM_COMP | 288 NVIF_MEM_DISP); 289 if (typei < 0) 290 return -ENOSYS; 291 292 drm->ttm.type_vram = typei; 293 } else { 294 drm->ttm.type_vram = -1; 295 } 296 297 if (pci && pci->agp.bridge) { 298 drm->agp.bridge = pci->agp.bridge; 299 drm->agp.base = pci->agp.base; 300 drm->agp.size = pci->agp.size; 301 drm->agp.cma = pci->agp.cma; 302 } 303 304 ret = ttm_bo_device_init(&drm->ttm.bdev, 305 &nouveau_bo_driver, 306 dev->anon_inode->i_mapping, 307 dev->vma_offset_manager, 308 drm->client.mmu.dmabits <= 32 ? true : false); 309 if (ret) { 310 NV_ERROR(drm, "error initialising bo driver, %d\n", ret); 311 return ret; 312 } 313 314 /* VRAM init */ 315 drm->gem.vram_available = drm->client.device.info.ram_user; 316 317 arch_io_reserve_memtype_wc(device->func->resource_addr(device, 1), 318 device->func->resource_size(device, 1)); 319 320 ret = nouveau_ttm_init_vram(drm); 321 if (ret) { 322 NV_ERROR(drm, "VRAM mm init failed, %d\n", ret); 323 return ret; 324 } 325 326 drm->ttm.mtrr = arch_phys_wc_add(device->func->resource_addr(device, 1), 327 device->func->resource_size(device, 1)); 328 329 /* GART init */ 330 if (!drm->agp.bridge) { 331 drm->gem.gart_available = drm->client.vmm.vmm.limit; 332 } else { 333 drm->gem.gart_available = drm->agp.size; 334 } 335 336 ret = nouveau_ttm_init_gtt(drm); 337 if (ret) { 338 NV_ERROR(drm, "GART mm init failed, %d\n", ret); 339 return ret; 340 } 341 342 NV_INFO(drm, "VRAM: %d MiB\n", (u32)(drm->gem.vram_available >> 20)); 343 NV_INFO(drm, "GART: %d MiB\n", (u32)(drm->gem.gart_available >> 20)); 344 return 0; 345 } 346 347 void 348 nouveau_ttm_fini(struct nouveau_drm *drm) 349 { 350 struct nvkm_device *device = nvxx_device(&drm->client.device); 351 352 nouveau_ttm_fini_vram(drm); 353 nouveau_ttm_fini_gtt(drm); 354 355 ttm_bo_device_release(&drm->ttm.bdev); 356 357 arch_phys_wc_del(drm->ttm.mtrr); 358 drm->ttm.mtrr = 0; 359 arch_io_free_memtype_wc(device->func->resource_addr(device, 1), 360 device->func->resource_size(device, 1)); 361 362 } 363