1 /* 2 * Copyright 2018 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 #include "nouveau_svm.h" 23 #include "nouveau_drv.h" 24 #include "nouveau_chan.h" 25 #include "nouveau_dmem.h" 26 27 #include <nvif/notify.h> 28 #include <nvif/object.h> 29 #include <nvif/vmm.h> 30 31 #include <nvif/class.h> 32 #include <nvif/clb069.h> 33 #include <nvif/ifc00d.h> 34 35 #include <linux/sched/mm.h> 36 #include <linux/sort.h> 37 #include <linux/hmm.h> 38 39 struct nouveau_svm { 40 struct nouveau_drm *drm; 41 struct mutex mutex; 42 struct list_head inst; 43 44 struct nouveau_svm_fault_buffer { 45 int id; 46 struct nvif_object object; 47 u32 entries; 48 u32 getaddr; 49 u32 putaddr; 50 u32 get; 51 u32 put; 52 struct nvif_notify notify; 53 54 struct nouveau_svm_fault { 55 u64 inst; 56 u64 addr; 57 u64 time; 58 u32 engine; 59 u8 gpc; 60 u8 hub; 61 u8 access; 62 u8 client; 63 u8 fault; 64 struct nouveau_svmm *svmm; 65 } **fault; 66 int fault_nr; 67 } buffer[1]; 68 }; 69 70 #define SVM_DBG(s,f,a...) NV_DEBUG((s)->drm, "svm: "f"\n", ##a) 71 #define SVM_ERR(s,f,a...) NV_WARN((s)->drm, "svm: "f"\n", ##a) 72 73 struct nouveau_pfnmap_args { 74 struct nvif_ioctl_v0 i; 75 struct nvif_ioctl_mthd_v0 m; 76 struct nvif_vmm_pfnmap_v0 p; 77 }; 78 79 struct nouveau_ivmm { 80 struct nouveau_svmm *svmm; 81 u64 inst; 82 struct list_head head; 83 }; 84 85 static struct nouveau_ivmm * 86 nouveau_ivmm_find(struct nouveau_svm *svm, u64 inst) 87 { 88 struct nouveau_ivmm *ivmm; 89 list_for_each_entry(ivmm, &svm->inst, head) { 90 if (ivmm->inst == inst) 91 return ivmm; 92 } 93 return NULL; 94 } 95 96 struct nouveau_svmm { 97 struct mmu_notifier notifier; 98 struct nouveau_vmm *vmm; 99 struct { 100 unsigned long start; 101 unsigned long limit; 102 } unmanaged; 103 104 struct mutex mutex; 105 }; 106 107 #define SVMM_DBG(s,f,a...) \ 108 NV_DEBUG((s)->vmm->cli->drm, "svm-%p: "f"\n", (s), ##a) 109 #define SVMM_ERR(s,f,a...) \ 110 NV_WARN((s)->vmm->cli->drm, "svm-%p: "f"\n", (s), ##a) 111 112 int 113 nouveau_svmm_bind(struct drm_device *dev, void *data, 114 struct drm_file *file_priv) 115 { 116 struct nouveau_cli *cli = nouveau_cli(file_priv); 117 struct drm_nouveau_svm_bind *args = data; 118 unsigned target, cmd, priority; 119 unsigned long addr, end, size; 120 struct mm_struct *mm; 121 122 args->va_start &= PAGE_MASK; 123 args->va_end &= PAGE_MASK; 124 125 /* Sanity check arguments */ 126 if (args->reserved0 || args->reserved1) 127 return -EINVAL; 128 if (args->header & (~NOUVEAU_SVM_BIND_VALID_MASK)) 129 return -EINVAL; 130 if (args->va_start >= args->va_end) 131 return -EINVAL; 132 if (!args->npages) 133 return -EINVAL; 134 135 cmd = args->header >> NOUVEAU_SVM_BIND_COMMAND_SHIFT; 136 cmd &= NOUVEAU_SVM_BIND_COMMAND_MASK; 137 switch (cmd) { 138 case NOUVEAU_SVM_BIND_COMMAND__MIGRATE: 139 break; 140 default: 141 return -EINVAL; 142 } 143 144 priority = args->header >> NOUVEAU_SVM_BIND_PRIORITY_SHIFT; 145 priority &= NOUVEAU_SVM_BIND_PRIORITY_MASK; 146 147 /* FIXME support CPU target ie all target value < GPU_VRAM */ 148 target = args->header >> NOUVEAU_SVM_BIND_TARGET_SHIFT; 149 target &= NOUVEAU_SVM_BIND_TARGET_MASK; 150 switch (target) { 151 case NOUVEAU_SVM_BIND_TARGET__GPU_VRAM: 152 break; 153 default: 154 return -EINVAL; 155 } 156 157 /* 158 * FIXME: For now refuse non 0 stride, we need to change the migrate 159 * kernel function to handle stride to avoid to create a mess within 160 * each device driver. 161 */ 162 if (args->stride) 163 return -EINVAL; 164 165 size = ((unsigned long)args->npages) << PAGE_SHIFT; 166 if ((args->va_start + size) <= args->va_start) 167 return -EINVAL; 168 if ((args->va_start + size) > args->va_end) 169 return -EINVAL; 170 171 /* 172 * Ok we are ask to do something sane, for now we only support migrate 173 * commands but we will add things like memory policy (what to do on 174 * page fault) and maybe some other commands. 175 */ 176 177 mm = get_task_mm(current); 178 down_read(&mm->mmap_sem); 179 180 if (!cli->svm.svmm) { 181 up_read(&mm->mmap_sem); 182 return -EINVAL; 183 } 184 185 for (addr = args->va_start, end = args->va_start + size; addr < end;) { 186 struct vm_area_struct *vma; 187 unsigned long next; 188 189 vma = find_vma_intersection(mm, addr, end); 190 if (!vma) 191 break; 192 193 addr = max(addr, vma->vm_start); 194 next = min(vma->vm_end, end); 195 /* This is a best effort so we ignore errors */ 196 nouveau_dmem_migrate_vma(cli->drm, cli->svm.svmm, vma, addr, 197 next); 198 addr = next; 199 } 200 201 /* 202 * FIXME Return the number of page we have migrated, again we need to 203 * update the migrate API to return that information so that we can 204 * report it to user space. 205 */ 206 args->result = 0; 207 208 up_read(&mm->mmap_sem); 209 mmput(mm); 210 211 return 0; 212 } 213 214 /* Unlink channel instance from SVMM. */ 215 void 216 nouveau_svmm_part(struct nouveau_svmm *svmm, u64 inst) 217 { 218 struct nouveau_ivmm *ivmm; 219 if (svmm) { 220 mutex_lock(&svmm->vmm->cli->drm->svm->mutex); 221 ivmm = nouveau_ivmm_find(svmm->vmm->cli->drm->svm, inst); 222 if (ivmm) { 223 list_del(&ivmm->head); 224 kfree(ivmm); 225 } 226 mutex_unlock(&svmm->vmm->cli->drm->svm->mutex); 227 } 228 } 229 230 /* Link channel instance to SVMM. */ 231 int 232 nouveau_svmm_join(struct nouveau_svmm *svmm, u64 inst) 233 { 234 struct nouveau_ivmm *ivmm; 235 if (svmm) { 236 if (!(ivmm = kmalloc(sizeof(*ivmm), GFP_KERNEL))) 237 return -ENOMEM; 238 ivmm->svmm = svmm; 239 ivmm->inst = inst; 240 241 mutex_lock(&svmm->vmm->cli->drm->svm->mutex); 242 list_add(&ivmm->head, &svmm->vmm->cli->drm->svm->inst); 243 mutex_unlock(&svmm->vmm->cli->drm->svm->mutex); 244 } 245 return 0; 246 } 247 248 /* Invalidate SVMM address-range on GPU. */ 249 static void 250 nouveau_svmm_invalidate(struct nouveau_svmm *svmm, u64 start, u64 limit) 251 { 252 if (limit > start) { 253 bool super = svmm->vmm->vmm.object.client->super; 254 svmm->vmm->vmm.object.client->super = true; 255 nvif_object_mthd(&svmm->vmm->vmm.object, NVIF_VMM_V0_PFNCLR, 256 &(struct nvif_vmm_pfnclr_v0) { 257 .addr = start, 258 .size = limit - start, 259 }, sizeof(struct nvif_vmm_pfnclr_v0)); 260 svmm->vmm->vmm.object.client->super = super; 261 } 262 } 263 264 static int 265 nouveau_svmm_invalidate_range_start(struct mmu_notifier *mn, 266 const struct mmu_notifier_range *update) 267 { 268 struct nouveau_svmm *svmm = 269 container_of(mn, struct nouveau_svmm, notifier); 270 unsigned long start = update->start; 271 unsigned long limit = update->end; 272 273 if (!mmu_notifier_range_blockable(update)) 274 return -EAGAIN; 275 276 SVMM_DBG(svmm, "invalidate %016lx-%016lx", start, limit); 277 278 mutex_lock(&svmm->mutex); 279 if (unlikely(!svmm->vmm)) 280 goto out; 281 282 if (limit > svmm->unmanaged.start && start < svmm->unmanaged.limit) { 283 if (start < svmm->unmanaged.start) { 284 nouveau_svmm_invalidate(svmm, start, 285 svmm->unmanaged.limit); 286 } 287 start = svmm->unmanaged.limit; 288 } 289 290 nouveau_svmm_invalidate(svmm, start, limit); 291 292 out: 293 mutex_unlock(&svmm->mutex); 294 return 0; 295 } 296 297 static void nouveau_svmm_free_notifier(struct mmu_notifier *mn) 298 { 299 kfree(container_of(mn, struct nouveau_svmm, notifier)); 300 } 301 302 static const struct mmu_notifier_ops nouveau_mn_ops = { 303 .invalidate_range_start = nouveau_svmm_invalidate_range_start, 304 .free_notifier = nouveau_svmm_free_notifier, 305 }; 306 307 void 308 nouveau_svmm_fini(struct nouveau_svmm **psvmm) 309 { 310 struct nouveau_svmm *svmm = *psvmm; 311 if (svmm) { 312 mutex_lock(&svmm->mutex); 313 svmm->vmm = NULL; 314 mutex_unlock(&svmm->mutex); 315 mmu_notifier_put(&svmm->notifier); 316 *psvmm = NULL; 317 } 318 } 319 320 int 321 nouveau_svmm_init(struct drm_device *dev, void *data, 322 struct drm_file *file_priv) 323 { 324 struct nouveau_cli *cli = nouveau_cli(file_priv); 325 struct nouveau_svmm *svmm; 326 struct drm_nouveau_svm_init *args = data; 327 int ret; 328 329 /* Allocate tracking for SVM-enabled VMM. */ 330 if (!(svmm = kzalloc(sizeof(*svmm), GFP_KERNEL))) 331 return -ENOMEM; 332 svmm->vmm = &cli->svm; 333 svmm->unmanaged.start = args->unmanaged_addr; 334 svmm->unmanaged.limit = args->unmanaged_addr + args->unmanaged_size; 335 mutex_init(&svmm->mutex); 336 337 /* Check that SVM isn't already enabled for the client. */ 338 mutex_lock(&cli->mutex); 339 if (cli->svm.cli) { 340 ret = -EBUSY; 341 goto out_free; 342 } 343 344 /* Allocate a new GPU VMM that can support SVM (managed by the 345 * client, with replayable faults enabled). 346 * 347 * All future channel/memory allocations will make use of this 348 * VMM instead of the standard one. 349 */ 350 ret = nvif_vmm_init(&cli->mmu, cli->vmm.vmm.object.oclass, true, 351 args->unmanaged_addr, args->unmanaged_size, 352 &(struct gp100_vmm_v0) { 353 .fault_replay = true, 354 }, sizeof(struct gp100_vmm_v0), &cli->svm.vmm); 355 if (ret) 356 goto out_free; 357 358 down_write(¤t->mm->mmap_sem); 359 svmm->notifier.ops = &nouveau_mn_ops; 360 ret = __mmu_notifier_register(&svmm->notifier, current->mm); 361 if (ret) 362 goto out_mm_unlock; 363 /* Note, ownership of svmm transfers to mmu_notifier */ 364 365 cli->svm.svmm = svmm; 366 cli->svm.cli = cli; 367 up_write(¤t->mm->mmap_sem); 368 mutex_unlock(&cli->mutex); 369 return 0; 370 371 out_mm_unlock: 372 up_write(¤t->mm->mmap_sem); 373 out_free: 374 mutex_unlock(&cli->mutex); 375 kfree(svmm); 376 return ret; 377 } 378 379 static const u64 380 nouveau_svm_pfn_flags[HMM_PFN_FLAG_MAX] = { 381 [HMM_PFN_VALID ] = NVIF_VMM_PFNMAP_V0_V, 382 [HMM_PFN_WRITE ] = NVIF_VMM_PFNMAP_V0_W, 383 }; 384 385 static const u64 386 nouveau_svm_pfn_values[HMM_PFN_VALUE_MAX] = { 387 [HMM_PFN_ERROR ] = ~NVIF_VMM_PFNMAP_V0_V, 388 [HMM_PFN_NONE ] = NVIF_VMM_PFNMAP_V0_NONE, 389 [HMM_PFN_SPECIAL] = ~NVIF_VMM_PFNMAP_V0_V, 390 }; 391 392 /* Issue fault replay for GPU to retry accesses that faulted previously. */ 393 static void 394 nouveau_svm_fault_replay(struct nouveau_svm *svm) 395 { 396 SVM_DBG(svm, "replay"); 397 WARN_ON(nvif_object_mthd(&svm->drm->client.vmm.vmm.object, 398 GP100_VMM_VN_FAULT_REPLAY, 399 &(struct gp100_vmm_fault_replay_vn) {}, 400 sizeof(struct gp100_vmm_fault_replay_vn))); 401 } 402 403 /* Cancel a replayable fault that could not be handled. 404 * 405 * Cancelling the fault will trigger recovery to reset the engine 406 * and kill the offending channel (ie. GPU SIGSEGV). 407 */ 408 static void 409 nouveau_svm_fault_cancel(struct nouveau_svm *svm, 410 u64 inst, u8 hub, u8 gpc, u8 client) 411 { 412 SVM_DBG(svm, "cancel %016llx %d %02x %02x", inst, hub, gpc, client); 413 WARN_ON(nvif_object_mthd(&svm->drm->client.vmm.vmm.object, 414 GP100_VMM_VN_FAULT_CANCEL, 415 &(struct gp100_vmm_fault_cancel_v0) { 416 .hub = hub, 417 .gpc = gpc, 418 .client = client, 419 .inst = inst, 420 }, sizeof(struct gp100_vmm_fault_cancel_v0))); 421 } 422 423 static void 424 nouveau_svm_fault_cancel_fault(struct nouveau_svm *svm, 425 struct nouveau_svm_fault *fault) 426 { 427 nouveau_svm_fault_cancel(svm, fault->inst, 428 fault->hub, 429 fault->gpc, 430 fault->client); 431 } 432 433 static int 434 nouveau_svm_fault_cmp(const void *a, const void *b) 435 { 436 const struct nouveau_svm_fault *fa = *(struct nouveau_svm_fault **)a; 437 const struct nouveau_svm_fault *fb = *(struct nouveau_svm_fault **)b; 438 int ret; 439 if ((ret = (s64)fa->inst - fb->inst)) 440 return ret; 441 if ((ret = (s64)fa->addr - fb->addr)) 442 return ret; 443 /*XXX: atomic? */ 444 return (fa->access == 0 || fa->access == 3) - 445 (fb->access == 0 || fb->access == 3); 446 } 447 448 static void 449 nouveau_svm_fault_cache(struct nouveau_svm *svm, 450 struct nouveau_svm_fault_buffer *buffer, u32 offset) 451 { 452 struct nvif_object *memory = &buffer->object; 453 const u32 instlo = nvif_rd32(memory, offset + 0x00); 454 const u32 insthi = nvif_rd32(memory, offset + 0x04); 455 const u32 addrlo = nvif_rd32(memory, offset + 0x08); 456 const u32 addrhi = nvif_rd32(memory, offset + 0x0c); 457 const u32 timelo = nvif_rd32(memory, offset + 0x10); 458 const u32 timehi = nvif_rd32(memory, offset + 0x14); 459 const u32 engine = nvif_rd32(memory, offset + 0x18); 460 const u32 info = nvif_rd32(memory, offset + 0x1c); 461 const u64 inst = (u64)insthi << 32 | instlo; 462 const u8 gpc = (info & 0x1f000000) >> 24; 463 const u8 hub = (info & 0x00100000) >> 20; 464 const u8 client = (info & 0x00007f00) >> 8; 465 struct nouveau_svm_fault *fault; 466 467 //XXX: i think we're supposed to spin waiting */ 468 if (WARN_ON(!(info & 0x80000000))) 469 return; 470 471 nvif_mask(memory, offset + 0x1c, 0x80000000, 0x00000000); 472 473 if (!buffer->fault[buffer->fault_nr]) { 474 fault = kmalloc(sizeof(*fault), GFP_KERNEL); 475 if (WARN_ON(!fault)) { 476 nouveau_svm_fault_cancel(svm, inst, hub, gpc, client); 477 return; 478 } 479 buffer->fault[buffer->fault_nr] = fault; 480 } 481 482 fault = buffer->fault[buffer->fault_nr++]; 483 fault->inst = inst; 484 fault->addr = (u64)addrhi << 32 | addrlo; 485 fault->time = (u64)timehi << 32 | timelo; 486 fault->engine = engine; 487 fault->gpc = gpc; 488 fault->hub = hub; 489 fault->access = (info & 0x000f0000) >> 16; 490 fault->client = client; 491 fault->fault = (info & 0x0000001f); 492 493 SVM_DBG(svm, "fault %016llx %016llx %02x", 494 fault->inst, fault->addr, fault->access); 495 } 496 497 struct svm_notifier { 498 struct mmu_interval_notifier notifier; 499 struct nouveau_svmm *svmm; 500 }; 501 502 static bool nouveau_svm_range_invalidate(struct mmu_interval_notifier *mni, 503 const struct mmu_notifier_range *range, 504 unsigned long cur_seq) 505 { 506 struct svm_notifier *sn = 507 container_of(mni, struct svm_notifier, notifier); 508 509 /* 510 * serializes the update to mni->invalidate_seq done by caller and 511 * prevents invalidation of the PTE from progressing while HW is being 512 * programmed. This is very hacky and only works because the normal 513 * notifier that does invalidation is always called after the range 514 * notifier. 515 */ 516 if (mmu_notifier_range_blockable(range)) 517 mutex_lock(&sn->svmm->mutex); 518 else if (!mutex_trylock(&sn->svmm->mutex)) 519 return false; 520 mmu_interval_set_seq(mni, cur_seq); 521 mutex_unlock(&sn->svmm->mutex); 522 return true; 523 } 524 525 static const struct mmu_interval_notifier_ops nouveau_svm_mni_ops = { 526 .invalidate = nouveau_svm_range_invalidate, 527 }; 528 529 static int nouveau_range_fault(struct nouveau_svmm *svmm, 530 struct nouveau_drm *drm, void *data, u32 size, 531 u64 *pfns, struct svm_notifier *notifier) 532 { 533 unsigned long timeout = 534 jiffies + msecs_to_jiffies(HMM_RANGE_DEFAULT_TIMEOUT); 535 /* Have HMM fault pages within the fault window to the GPU. */ 536 struct hmm_range range = { 537 .notifier = ¬ifier->notifier, 538 .start = notifier->notifier.interval_tree.start, 539 .end = notifier->notifier.interval_tree.last + 1, 540 .pfns = pfns, 541 .flags = nouveau_svm_pfn_flags, 542 .values = nouveau_svm_pfn_values, 543 .pfn_shift = NVIF_VMM_PFNMAP_V0_ADDR_SHIFT, 544 }; 545 struct mm_struct *mm = notifier->notifier.mm; 546 long ret; 547 548 while (true) { 549 if (time_after(jiffies, timeout)) 550 return -EBUSY; 551 552 range.notifier_seq = mmu_interval_read_begin(range.notifier); 553 range.default_flags = 0; 554 range.pfn_flags_mask = -1UL; 555 down_read(&mm->mmap_sem); 556 ret = hmm_range_fault(&range); 557 up_read(&mm->mmap_sem); 558 if (ret <= 0) { 559 if (ret == 0 || ret == -EBUSY) 560 continue; 561 return ret; 562 } 563 564 mutex_lock(&svmm->mutex); 565 if (mmu_interval_read_retry(range.notifier, 566 range.notifier_seq)) { 567 mutex_unlock(&svmm->mutex); 568 continue; 569 } 570 break; 571 } 572 573 nouveau_dmem_convert_pfn(drm, &range); 574 575 svmm->vmm->vmm.object.client->super = true; 576 ret = nvif_object_ioctl(&svmm->vmm->vmm.object, data, size, NULL); 577 svmm->vmm->vmm.object.client->super = false; 578 mutex_unlock(&svmm->mutex); 579 580 return ret; 581 } 582 583 static int 584 nouveau_svm_fault(struct nvif_notify *notify) 585 { 586 struct nouveau_svm_fault_buffer *buffer = 587 container_of(notify, typeof(*buffer), notify); 588 struct nouveau_svm *svm = 589 container_of(buffer, typeof(*svm), buffer[buffer->id]); 590 struct nvif_object *device = &svm->drm->client.device.object; 591 struct nouveau_svmm *svmm; 592 struct { 593 struct { 594 struct nvif_ioctl_v0 i; 595 struct nvif_ioctl_mthd_v0 m; 596 struct nvif_vmm_pfnmap_v0 p; 597 } i; 598 u64 phys[16]; 599 } args; 600 struct vm_area_struct *vma; 601 u64 inst, start, limit; 602 int fi, fn, pi, fill; 603 int replay = 0, ret; 604 605 /* Parse available fault buffer entries into a cache, and update 606 * the GET pointer so HW can reuse the entries. 607 */ 608 SVM_DBG(svm, "fault handler"); 609 if (buffer->get == buffer->put) { 610 buffer->put = nvif_rd32(device, buffer->putaddr); 611 buffer->get = nvif_rd32(device, buffer->getaddr); 612 if (buffer->get == buffer->put) 613 return NVIF_NOTIFY_KEEP; 614 } 615 buffer->fault_nr = 0; 616 617 SVM_DBG(svm, "get %08x put %08x", buffer->get, buffer->put); 618 while (buffer->get != buffer->put) { 619 nouveau_svm_fault_cache(svm, buffer, buffer->get * 0x20); 620 if (++buffer->get == buffer->entries) 621 buffer->get = 0; 622 } 623 nvif_wr32(device, buffer->getaddr, buffer->get); 624 SVM_DBG(svm, "%d fault(s) pending", buffer->fault_nr); 625 626 /* Sort parsed faults by instance pointer to prevent unnecessary 627 * instance to SVMM translations, followed by address and access 628 * type to reduce the amount of work when handling the faults. 629 */ 630 sort(buffer->fault, buffer->fault_nr, sizeof(*buffer->fault), 631 nouveau_svm_fault_cmp, NULL); 632 633 /* Lookup SVMM structure for each unique instance pointer. */ 634 mutex_lock(&svm->mutex); 635 for (fi = 0, svmm = NULL; fi < buffer->fault_nr; fi++) { 636 if (!svmm || buffer->fault[fi]->inst != inst) { 637 struct nouveau_ivmm *ivmm = 638 nouveau_ivmm_find(svm, buffer->fault[fi]->inst); 639 svmm = ivmm ? ivmm->svmm : NULL; 640 inst = buffer->fault[fi]->inst; 641 SVM_DBG(svm, "inst %016llx -> svm-%p", inst, svmm); 642 } 643 buffer->fault[fi]->svmm = svmm; 644 } 645 mutex_unlock(&svm->mutex); 646 647 /* Process list of faults. */ 648 args.i.i.version = 0; 649 args.i.i.type = NVIF_IOCTL_V0_MTHD; 650 args.i.m.version = 0; 651 args.i.m.method = NVIF_VMM_V0_PFNMAP; 652 args.i.p.version = 0; 653 654 for (fi = 0; fn = fi + 1, fi < buffer->fault_nr; fi = fn) { 655 struct svm_notifier notifier; 656 struct mm_struct *mm; 657 658 /* Cancel any faults from non-SVM channels. */ 659 if (!(svmm = buffer->fault[fi]->svmm)) { 660 nouveau_svm_fault_cancel_fault(svm, buffer->fault[fi]); 661 continue; 662 } 663 SVMM_DBG(svmm, "addr %016llx", buffer->fault[fi]->addr); 664 665 /* We try and group handling of faults within a small 666 * window into a single update. 667 */ 668 start = buffer->fault[fi]->addr; 669 limit = start + (ARRAY_SIZE(args.phys) << PAGE_SHIFT); 670 if (start < svmm->unmanaged.limit) 671 limit = min_t(u64, limit, svmm->unmanaged.start); 672 SVMM_DBG(svmm, "wndw %016llx-%016llx", start, limit); 673 674 mm = svmm->notifier.mm; 675 if (!mmget_not_zero(mm)) { 676 nouveau_svm_fault_cancel_fault(svm, buffer->fault[fi]); 677 continue; 678 } 679 680 /* Intersect fault window with the CPU VMA, cancelling 681 * the fault if the address is invalid. 682 */ 683 down_read(&mm->mmap_sem); 684 vma = find_vma_intersection(mm, start, limit); 685 if (!vma) { 686 SVMM_ERR(svmm, "wndw %016llx-%016llx", start, limit); 687 up_read(&mm->mmap_sem); 688 mmput(mm); 689 nouveau_svm_fault_cancel_fault(svm, buffer->fault[fi]); 690 continue; 691 } 692 start = max_t(u64, start, vma->vm_start); 693 limit = min_t(u64, limit, vma->vm_end); 694 up_read(&mm->mmap_sem); 695 SVMM_DBG(svmm, "wndw %016llx-%016llx", start, limit); 696 697 if (buffer->fault[fi]->addr != start) { 698 SVMM_ERR(svmm, "addr %016llx", buffer->fault[fi]->addr); 699 mmput(mm); 700 nouveau_svm_fault_cancel_fault(svm, buffer->fault[fi]); 701 continue; 702 } 703 704 /* Prepare the GPU-side update of all pages within the 705 * fault window, determining required pages and access 706 * permissions based on pending faults. 707 */ 708 args.i.p.page = PAGE_SHIFT; 709 args.i.p.addr = start; 710 for (fn = fi, pi = 0;;) { 711 /* Determine required permissions based on GPU fault 712 * access flags. 713 *XXX: atomic? 714 */ 715 if (buffer->fault[fn]->access != 0 /* READ. */ && 716 buffer->fault[fn]->access != 3 /* PREFETCH. */) { 717 args.phys[pi++] = NVIF_VMM_PFNMAP_V0_V | 718 NVIF_VMM_PFNMAP_V0_W; 719 } else { 720 args.phys[pi++] = NVIF_VMM_PFNMAP_V0_V; 721 } 722 args.i.p.size = pi << PAGE_SHIFT; 723 724 /* It's okay to skip over duplicate addresses from the 725 * same SVMM as faults are ordered by access type such 726 * that only the first one needs to be handled. 727 * 728 * ie. WRITE faults appear first, thus any handling of 729 * pending READ faults will already be satisfied. 730 */ 731 while (++fn < buffer->fault_nr && 732 buffer->fault[fn]->svmm == svmm && 733 buffer->fault[fn ]->addr == 734 buffer->fault[fn - 1]->addr); 735 736 /* If the next fault is outside the window, or all GPU 737 * faults have been dealt with, we're done here. 738 */ 739 if (fn >= buffer->fault_nr || 740 buffer->fault[fn]->svmm != svmm || 741 buffer->fault[fn]->addr >= limit) 742 break; 743 744 /* Fill in the gap between this fault and the next. */ 745 fill = (buffer->fault[fn ]->addr - 746 buffer->fault[fn - 1]->addr) >> PAGE_SHIFT; 747 while (--fill) 748 args.phys[pi++] = NVIF_VMM_PFNMAP_V0_NONE; 749 } 750 751 SVMM_DBG(svmm, "wndw %016llx-%016llx covering %d fault(s)", 752 args.i.p.addr, 753 args.i.p.addr + args.i.p.size, fn - fi); 754 755 notifier.svmm = svmm; 756 ret = mmu_interval_notifier_insert(¬ifier.notifier, 757 svmm->notifier.mm, 758 args.i.p.addr, args.i.p.size, 759 &nouveau_svm_mni_ops); 760 if (!ret) { 761 ret = nouveau_range_fault( 762 svmm, svm->drm, &args, 763 sizeof(args.i) + pi * sizeof(args.phys[0]), 764 args.phys, ¬ifier); 765 mmu_interval_notifier_remove(¬ifier.notifier); 766 } 767 mmput(mm); 768 769 /* Cancel any faults in the window whose pages didn't manage 770 * to keep their valid bit, or stay writeable when required. 771 * 772 * If handling failed completely, cancel all faults. 773 */ 774 while (fi < fn) { 775 struct nouveau_svm_fault *fault = buffer->fault[fi++]; 776 pi = (fault->addr - args.i.p.addr) >> PAGE_SHIFT; 777 if (ret || 778 !(args.phys[pi] & NVIF_VMM_PFNMAP_V0_V) || 779 (!(args.phys[pi] & NVIF_VMM_PFNMAP_V0_W) && 780 fault->access != 0 && fault->access != 3)) { 781 nouveau_svm_fault_cancel_fault(svm, fault); 782 continue; 783 } 784 replay++; 785 } 786 } 787 788 /* Issue fault replay to the GPU. */ 789 if (replay) 790 nouveau_svm_fault_replay(svm); 791 return NVIF_NOTIFY_KEEP; 792 } 793 794 static struct nouveau_pfnmap_args * 795 nouveau_pfns_to_args(void *pfns) 796 { 797 return container_of(pfns, struct nouveau_pfnmap_args, p.phys); 798 } 799 800 u64 * 801 nouveau_pfns_alloc(unsigned long npages) 802 { 803 struct nouveau_pfnmap_args *args; 804 805 args = kzalloc(struct_size(args, p.phys, npages), GFP_KERNEL); 806 if (!args) 807 return NULL; 808 809 args->i.type = NVIF_IOCTL_V0_MTHD; 810 args->m.method = NVIF_VMM_V0_PFNMAP; 811 args->p.page = PAGE_SHIFT; 812 813 return args->p.phys; 814 } 815 816 void 817 nouveau_pfns_free(u64 *pfns) 818 { 819 struct nouveau_pfnmap_args *args = nouveau_pfns_to_args(pfns); 820 821 kfree(args); 822 } 823 824 void 825 nouveau_pfns_map(struct nouveau_svmm *svmm, struct mm_struct *mm, 826 unsigned long addr, u64 *pfns, unsigned long npages) 827 { 828 struct nouveau_pfnmap_args *args = nouveau_pfns_to_args(pfns); 829 int ret; 830 831 args->p.addr = addr; 832 args->p.size = npages << PAGE_SHIFT; 833 834 mutex_lock(&svmm->mutex); 835 836 svmm->vmm->vmm.object.client->super = true; 837 ret = nvif_object_ioctl(&svmm->vmm->vmm.object, args, sizeof(*args) + 838 npages * sizeof(args->p.phys[0]), NULL); 839 svmm->vmm->vmm.object.client->super = false; 840 841 mutex_unlock(&svmm->mutex); 842 } 843 844 static void 845 nouveau_svm_fault_buffer_fini(struct nouveau_svm *svm, int id) 846 { 847 struct nouveau_svm_fault_buffer *buffer = &svm->buffer[id]; 848 nvif_notify_put(&buffer->notify); 849 } 850 851 static int 852 nouveau_svm_fault_buffer_init(struct nouveau_svm *svm, int id) 853 { 854 struct nouveau_svm_fault_buffer *buffer = &svm->buffer[id]; 855 struct nvif_object *device = &svm->drm->client.device.object; 856 buffer->get = nvif_rd32(device, buffer->getaddr); 857 buffer->put = nvif_rd32(device, buffer->putaddr); 858 SVM_DBG(svm, "get %08x put %08x (init)", buffer->get, buffer->put); 859 return nvif_notify_get(&buffer->notify); 860 } 861 862 static void 863 nouveau_svm_fault_buffer_dtor(struct nouveau_svm *svm, int id) 864 { 865 struct nouveau_svm_fault_buffer *buffer = &svm->buffer[id]; 866 int i; 867 868 if (buffer->fault) { 869 for (i = 0; buffer->fault[i] && i < buffer->entries; i++) 870 kfree(buffer->fault[i]); 871 kvfree(buffer->fault); 872 } 873 874 nouveau_svm_fault_buffer_fini(svm, id); 875 876 nvif_notify_fini(&buffer->notify); 877 nvif_object_fini(&buffer->object); 878 } 879 880 static int 881 nouveau_svm_fault_buffer_ctor(struct nouveau_svm *svm, s32 oclass, int id) 882 { 883 struct nouveau_svm_fault_buffer *buffer = &svm->buffer[id]; 884 struct nouveau_drm *drm = svm->drm; 885 struct nvif_object *device = &drm->client.device.object; 886 struct nvif_clb069_v0 args = {}; 887 int ret; 888 889 buffer->id = id; 890 891 ret = nvif_object_init(device, 0, oclass, &args, sizeof(args), 892 &buffer->object); 893 if (ret < 0) { 894 SVM_ERR(svm, "Fault buffer allocation failed: %d", ret); 895 return ret; 896 } 897 898 nvif_object_map(&buffer->object, NULL, 0); 899 buffer->entries = args.entries; 900 buffer->getaddr = args.get; 901 buffer->putaddr = args.put; 902 903 ret = nvif_notify_init(&buffer->object, nouveau_svm_fault, true, 904 NVB069_V0_NTFY_FAULT, NULL, 0, 0, 905 &buffer->notify); 906 if (ret) 907 return ret; 908 909 buffer->fault = kvzalloc(sizeof(*buffer->fault) * buffer->entries, GFP_KERNEL); 910 if (!buffer->fault) 911 return -ENOMEM; 912 913 return nouveau_svm_fault_buffer_init(svm, id); 914 } 915 916 void 917 nouveau_svm_resume(struct nouveau_drm *drm) 918 { 919 struct nouveau_svm *svm = drm->svm; 920 if (svm) 921 nouveau_svm_fault_buffer_init(svm, 0); 922 } 923 924 void 925 nouveau_svm_suspend(struct nouveau_drm *drm) 926 { 927 struct nouveau_svm *svm = drm->svm; 928 if (svm) 929 nouveau_svm_fault_buffer_fini(svm, 0); 930 } 931 932 void 933 nouveau_svm_fini(struct nouveau_drm *drm) 934 { 935 struct nouveau_svm *svm = drm->svm; 936 if (svm) { 937 nouveau_svm_fault_buffer_dtor(svm, 0); 938 kfree(drm->svm); 939 drm->svm = NULL; 940 } 941 } 942 943 void 944 nouveau_svm_init(struct nouveau_drm *drm) 945 { 946 static const struct nvif_mclass buffers[] = { 947 { VOLTA_FAULT_BUFFER_A, 0 }, 948 { MAXWELL_FAULT_BUFFER_A, 0 }, 949 {} 950 }; 951 struct nouveau_svm *svm; 952 int ret; 953 954 /* Disable on Volta and newer until channel recovery is fixed, 955 * otherwise clients will have a trivial way to trash the GPU 956 * for everyone. 957 */ 958 if (drm->client.device.info.family > NV_DEVICE_INFO_V0_PASCAL) 959 return; 960 961 if (!(drm->svm = svm = kzalloc(sizeof(*drm->svm), GFP_KERNEL))) 962 return; 963 964 drm->svm->drm = drm; 965 mutex_init(&drm->svm->mutex); 966 INIT_LIST_HEAD(&drm->svm->inst); 967 968 ret = nvif_mclass(&drm->client.device.object, buffers); 969 if (ret < 0) { 970 SVM_DBG(svm, "No supported fault buffer class"); 971 nouveau_svm_fini(drm); 972 return; 973 } 974 975 ret = nouveau_svm_fault_buffer_ctor(svm, buffers[ret].oclass, 0); 976 if (ret) { 977 nouveau_svm_fini(drm); 978 return; 979 } 980 981 SVM_DBG(svm, "Initialised"); 982 } 983