1 /* SPDX-License-Identifier: MIT */
2 #ifndef __NOUVEAU_DRV_H__
3 #define __NOUVEAU_DRV_H__
4 
5 #define DRIVER_AUTHOR		"Nouveau Project"
6 #define DRIVER_EMAIL		"nouveau@lists.freedesktop.org"
7 
8 #define DRIVER_NAME		"nouveau"
9 #define DRIVER_DESC		"nVidia Riva/TNT/GeForce/Quadro/Tesla/Tegra K1+"
10 #define DRIVER_DATE		"20120801"
11 
12 #define DRIVER_MAJOR		1
13 #define DRIVER_MINOR		3
14 #define DRIVER_PATCHLEVEL	1
15 
16 /*
17  * 1.1.1:
18  * 	- added support for tiled system memory buffer objects
19  *      - added support for NOUVEAU_GETPARAM_GRAPH_UNITS on [nvc0,nve0].
20  *      - added support for compressed memory storage types on [nvc0,nve0].
21  *      - added support for software methods 0x600,0x644,0x6ac on nvc0
22  *        to control registers on the MPs to enable performance counters,
23  *        and to control the warp error enable mask (OpenGL requires out of
24  *        bounds access to local memory to be silently ignored / return 0).
25  * 1.1.2:
26  *      - fixes multiple bugs in flip completion events and timestamping
27  * 1.2.0:
28  * 	- object api exposed to userspace
29  * 	- fermi,kepler,maxwell zbc
30  * 1.2.1:
31  *      - allow concurrent access to bo's mapped read/write.
32  * 1.2.2:
33  *      - add NOUVEAU_GEM_DOMAIN_COHERENT flag
34  * 1.3.0:
35  *      - NVIF ABI modified, safe because only (current) users are test
36  *        programs that get directly linked with NVKM.
37  * 1.3.1:
38  *      - implemented limited ABI16/NVIF interop
39  */
40 
41 #include <linux/notifier.h>
42 
43 #include <nvif/client.h>
44 #include <nvif/device.h>
45 #include <nvif/ioctl.h>
46 #include <nvif/mmu.h>
47 #include <nvif/vmm.h>
48 
49 #include <drm/drm_connector.h>
50 #include <drm/drm_device.h>
51 #include <drm/drm_drv.h>
52 #include <drm/drm_file.h>
53 
54 #include <drm/ttm/ttm_bo_api.h>
55 #include <drm/ttm/ttm_bo_driver.h>
56 #include <drm/ttm/ttm_placement.h>
57 
58 #include <drm/drm_audio_component.h>
59 
60 #include "uapi/drm/nouveau_drm.h"
61 
62 struct nouveau_channel;
63 struct platform_device;
64 
65 #include "nouveau_fence.h"
66 #include "nouveau_bios.h"
67 #include "nouveau_vmm.h"
68 
69 struct nouveau_drm_tile {
70 	struct nouveau_fence *fence;
71 	bool used;
72 };
73 
74 enum nouveau_drm_object_route {
75 	NVDRM_OBJECT_NVIF = NVIF_IOCTL_V0_OWNER_NVIF,
76 	NVDRM_OBJECT_USIF,
77 	NVDRM_OBJECT_ABI16,
78 	NVDRM_OBJECT_ANY = NVIF_IOCTL_V0_OWNER_ANY,
79 };
80 
81 enum nouveau_drm_notify_route {
82 	NVDRM_NOTIFY_NVIF = 0,
83 	NVDRM_NOTIFY_USIF
84 };
85 
86 enum nouveau_drm_handle {
87 	NVDRM_CHAN    = 0xcccc0000, /* |= client chid */
88 	NVDRM_NVSW    = 0x55550000,
89 };
90 
91 struct nouveau_cli {
92 	struct nvif_client base;
93 	struct nouveau_drm *drm;
94 	struct mutex mutex;
95 
96 	struct nvif_device device;
97 	struct nvif_mmu mmu;
98 	struct nouveau_vmm vmm;
99 	struct nouveau_vmm svm;
100 	const struct nvif_mclass *mem;
101 
102 	struct list_head head;
103 	void *abi16;
104 	struct list_head objects;
105 	struct list_head notifys;
106 	char name[32];
107 
108 	struct work_struct work;
109 	struct list_head worker;
110 	struct mutex lock;
111 };
112 
113 struct nouveau_cli_work {
114 	void (*func)(struct nouveau_cli_work *);
115 	struct nouveau_cli *cli;
116 	struct list_head head;
117 
118 	struct dma_fence *fence;
119 	struct dma_fence_cb cb;
120 };
121 
122 void nouveau_cli_work_queue(struct nouveau_cli *, struct dma_fence *,
123 			    struct nouveau_cli_work *);
124 
125 static inline struct nouveau_cli *
126 nouveau_cli(struct drm_file *fpriv)
127 {
128 	return fpriv ? fpriv->driver_priv : NULL;
129 }
130 
131 #include <nvif/object.h>
132 #include <nvif/parent.h>
133 
134 struct nouveau_drm {
135 	struct nvif_parent parent;
136 	struct nouveau_cli master;
137 	struct nouveau_cli client;
138 	struct drm_device *dev;
139 
140 	struct list_head clients;
141 
142 	/**
143 	 * @clients_lock: Protects access to the @clients list of &struct nouveau_cli.
144 	 */
145 	struct mutex clients_lock;
146 
147 	u8 old_pm_cap;
148 
149 	struct {
150 		struct agp_bridge_data *bridge;
151 		u32 base;
152 		u32 size;
153 		bool cma;
154 	} agp;
155 
156 	/* TTM interface support */
157 	struct {
158 		struct ttm_device bdev;
159 		atomic_t validate_sequence;
160 		int (*move)(struct nouveau_channel *,
161 			    struct ttm_buffer_object *,
162 			    struct ttm_resource *, struct ttm_resource *);
163 		struct nouveau_channel *chan;
164 		struct nvif_object copy;
165 		int mtrr;
166 		int type_vram;
167 		int type_host[2];
168 		int type_ncoh[2];
169 		struct mutex io_reserve_mutex;
170 		struct list_head io_reserve_lru;
171 	} ttm;
172 
173 	/* GEM interface support */
174 	struct {
175 		u64 vram_available;
176 		u64 gart_available;
177 	} gem;
178 
179 	/* synchronisation */
180 	void *fence;
181 
182 	/* Global channel management. */
183 	struct {
184 		int nr;
185 		u64 context_base;
186 	} chan;
187 
188 	/* context for accelerated drm-internal operations */
189 	struct nouveau_channel *cechan;
190 	struct nouveau_channel *channel;
191 	struct nvkm_gpuobj *notify;
192 	struct nouveau_fbdev *fbcon;
193 	struct nvif_object ntfy;
194 
195 	/* nv10-nv40 tiling regions */
196 	struct {
197 		struct nouveau_drm_tile reg[15];
198 		spinlock_t lock;
199 	} tile;
200 
201 	/* modesetting */
202 	struct nvbios vbios;
203 	struct nouveau_display *display;
204 	struct work_struct hpd_work;
205 	struct mutex hpd_lock;
206 	u32 hpd_pending;
207 	struct work_struct fbcon_work;
208 	int fbcon_new_state;
209 #ifdef CONFIG_ACPI
210 	struct notifier_block acpi_nb;
211 #endif
212 
213 	/* power management */
214 	struct nouveau_hwmon *hwmon;
215 	struct nouveau_debugfs *debugfs;
216 
217 	/* led management */
218 	struct nouveau_led *led;
219 
220 	struct dev_pm_domain vga_pm_domain;
221 
222 	struct nouveau_svm *svm;
223 
224 	struct nouveau_dmem *dmem;
225 
226 	struct {
227 		struct drm_audio_component *component;
228 		struct mutex lock;
229 		bool component_registered;
230 	} audio;
231 };
232 
233 static inline struct nouveau_drm *
234 nouveau_drm(struct drm_device *dev)
235 {
236 	return dev->dev_private;
237 }
238 
239 static inline bool
240 nouveau_drm_use_coherent_gpu_mapping(struct nouveau_drm *drm)
241 {
242 	struct nvif_mmu *mmu = &drm->client.mmu;
243 	return !(mmu->type[drm->ttm.type_host[0]].type & NVIF_MEM_UNCACHED);
244 }
245 
246 int nouveau_pmops_suspend(struct device *);
247 int nouveau_pmops_resume(struct device *);
248 bool nouveau_pmops_runtime(void);
249 
250 #include <nvkm/core/tegra.h>
251 
252 struct drm_device *
253 nouveau_platform_device_create(const struct nvkm_device_tegra_func *,
254 			       struct platform_device *, struct nvkm_device **);
255 void nouveau_drm_device_remove(struct drm_device *dev);
256 
257 #define NV_PRINTK(l,c,f,a...) do {                                             \
258 	struct nouveau_cli *_cli = (c);                                        \
259 	dev_##l(_cli->drm->dev->dev, "%s: "f, _cli->name, ##a);                \
260 } while(0)
261 
262 #define NV_FATAL(drm,f,a...) NV_PRINTK(crit, &(drm)->client, f, ##a)
263 #define NV_ERROR(drm,f,a...) NV_PRINTK(err, &(drm)->client, f, ##a)
264 #define NV_WARN(drm,f,a...) NV_PRINTK(warn, &(drm)->client, f, ##a)
265 #define NV_INFO(drm,f,a...) NV_PRINTK(info, &(drm)->client, f, ##a)
266 
267 #define NV_DEBUG(drm,f,a...) do {                                              \
268 	if (drm_debug_enabled(DRM_UT_DRIVER))                                  \
269 		NV_PRINTK(info, &(drm)->client, f, ##a);                       \
270 } while(0)
271 #define NV_ATOMIC(drm,f,a...) do {                                             \
272 	if (drm_debug_enabled(DRM_UT_ATOMIC))                                  \
273 		NV_PRINTK(info, &(drm)->client, f, ##a);                       \
274 } while(0)
275 
276 #define NV_PRINTK_ONCE(l,c,f,a...) NV_PRINTK(l##_once,c,f, ##a)
277 
278 #define NV_ERROR_ONCE(drm,f,a...) NV_PRINTK_ONCE(err, &(drm)->client, f, ##a)
279 #define NV_WARN_ONCE(drm,f,a...) NV_PRINTK_ONCE(warn, &(drm)->client, f, ##a)
280 #define NV_INFO_ONCE(drm,f,a...) NV_PRINTK_ONCE(info, &(drm)->client, f, ##a)
281 
282 extern int nouveau_modeset;
283 
284 #endif
285