1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 25 #include <linux/console.h> 26 #include <linux/delay.h> 27 #include <linux/module.h> 28 #include <linux/pci.h> 29 #include <linux/pm_runtime.h> 30 #include <linux/vga_switcheroo.h> 31 32 #include <drm/drmP.h> 33 #include <drm/drm_crtc_helper.h> 34 35 #include <core/gpuobj.h> 36 #include <core/option.h> 37 #include <core/pci.h> 38 #include <core/tegra.h> 39 40 #include <nvif/driver.h> 41 #include <nvif/fifo.h> 42 #include <nvif/user.h> 43 44 #include <nvif/class.h> 45 #include <nvif/cl0002.h> 46 #include <nvif/cla06f.h> 47 #include <nvif/if0004.h> 48 49 #include "nouveau_drv.h" 50 #include "nouveau_dma.h" 51 #include "nouveau_ttm.h" 52 #include "nouveau_gem.h" 53 #include "nouveau_vga.h" 54 #include "nouveau_led.h" 55 #include "nouveau_hwmon.h" 56 #include "nouveau_acpi.h" 57 #include "nouveau_bios.h" 58 #include "nouveau_ioctl.h" 59 #include "nouveau_abi16.h" 60 #include "nouveau_fbcon.h" 61 #include "nouveau_fence.h" 62 #include "nouveau_debugfs.h" 63 #include "nouveau_usif.h" 64 #include "nouveau_connector.h" 65 #include "nouveau_platform.h" 66 67 MODULE_PARM_DESC(config, "option string to pass to driver core"); 68 static char *nouveau_config; 69 module_param_named(config, nouveau_config, charp, 0400); 70 71 MODULE_PARM_DESC(debug, "debug string to pass to driver core"); 72 static char *nouveau_debug; 73 module_param_named(debug, nouveau_debug, charp, 0400); 74 75 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); 76 static int nouveau_noaccel = 0; 77 module_param_named(noaccel, nouveau_noaccel, int, 0400); 78 79 MODULE_PARM_DESC(modeset, "enable driver (default: auto, " 80 "0 = disabled, 1 = enabled, 2 = headless)"); 81 int nouveau_modeset = -1; 82 module_param_named(modeset, nouveau_modeset, int, 0400); 83 84 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); 85 static int nouveau_runtime_pm = -1; 86 module_param_named(runpm, nouveau_runtime_pm, int, 0400); 87 88 static struct drm_driver driver_stub; 89 static struct drm_driver driver_pci; 90 static struct drm_driver driver_platform; 91 92 static u64 93 nouveau_pci_name(struct pci_dev *pdev) 94 { 95 u64 name = (u64)pci_domain_nr(pdev->bus) << 32; 96 name |= pdev->bus->number << 16; 97 name |= PCI_SLOT(pdev->devfn) << 8; 98 return name | PCI_FUNC(pdev->devfn); 99 } 100 101 static u64 102 nouveau_platform_name(struct platform_device *platformdev) 103 { 104 return platformdev->id; 105 } 106 107 static u64 108 nouveau_name(struct drm_device *dev) 109 { 110 if (dev->pdev) 111 return nouveau_pci_name(dev->pdev); 112 else 113 return nouveau_platform_name(to_platform_device(dev->dev)); 114 } 115 116 static inline bool 117 nouveau_cli_work_ready(struct dma_fence *fence) 118 { 119 if (!dma_fence_is_signaled(fence)) 120 return false; 121 dma_fence_put(fence); 122 return true; 123 } 124 125 static void 126 nouveau_cli_work(struct work_struct *w) 127 { 128 struct nouveau_cli *cli = container_of(w, typeof(*cli), work); 129 struct nouveau_cli_work *work, *wtmp; 130 mutex_lock(&cli->lock); 131 list_for_each_entry_safe(work, wtmp, &cli->worker, head) { 132 if (!work->fence || nouveau_cli_work_ready(work->fence)) { 133 list_del(&work->head); 134 work->func(work); 135 } 136 } 137 mutex_unlock(&cli->lock); 138 } 139 140 static void 141 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb) 142 { 143 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb); 144 schedule_work(&work->cli->work); 145 } 146 147 void 148 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence, 149 struct nouveau_cli_work *work) 150 { 151 work->fence = dma_fence_get(fence); 152 work->cli = cli; 153 mutex_lock(&cli->lock); 154 list_add_tail(&work->head, &cli->worker); 155 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence)) 156 nouveau_cli_work_fence(fence, &work->cb); 157 mutex_unlock(&cli->lock); 158 } 159 160 static void 161 nouveau_cli_fini(struct nouveau_cli *cli) 162 { 163 /* All our channels are dead now, which means all the fences they 164 * own are signalled, and all callback functions have been called. 165 * 166 * So, after flushing the workqueue, there should be nothing left. 167 */ 168 flush_work(&cli->work); 169 WARN_ON(!list_empty(&cli->worker)); 170 171 usif_client_fini(cli); 172 nouveau_vmm_fini(&cli->vmm); 173 nvif_mmu_fini(&cli->mmu); 174 nvif_device_fini(&cli->device); 175 mutex_lock(&cli->drm->master.lock); 176 nvif_client_fini(&cli->base); 177 mutex_unlock(&cli->drm->master.lock); 178 } 179 180 static int 181 nouveau_cli_init(struct nouveau_drm *drm, const char *sname, 182 struct nouveau_cli *cli) 183 { 184 static const struct nvif_mclass 185 mems[] = { 186 { NVIF_CLASS_MEM_GF100, -1 }, 187 { NVIF_CLASS_MEM_NV50 , -1 }, 188 { NVIF_CLASS_MEM_NV04 , -1 }, 189 {} 190 }; 191 static const struct nvif_mclass 192 mmus[] = { 193 { NVIF_CLASS_MMU_GF100, -1 }, 194 { NVIF_CLASS_MMU_NV50 , -1 }, 195 { NVIF_CLASS_MMU_NV04 , -1 }, 196 {} 197 }; 198 static const struct nvif_mclass 199 vmms[] = { 200 { NVIF_CLASS_VMM_GP100, -1 }, 201 { NVIF_CLASS_VMM_GM200, -1 }, 202 { NVIF_CLASS_VMM_GF100, -1 }, 203 { NVIF_CLASS_VMM_NV50 , -1 }, 204 { NVIF_CLASS_VMM_NV04 , -1 }, 205 {} 206 }; 207 u64 device = nouveau_name(drm->dev); 208 int ret; 209 210 snprintf(cli->name, sizeof(cli->name), "%s", sname); 211 cli->drm = drm; 212 mutex_init(&cli->mutex); 213 usif_client_init(cli); 214 215 INIT_WORK(&cli->work, nouveau_cli_work); 216 INIT_LIST_HEAD(&cli->worker); 217 mutex_init(&cli->lock); 218 219 if (cli == &drm->master) { 220 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug, 221 cli->name, device, &cli->base); 222 } else { 223 mutex_lock(&drm->master.lock); 224 ret = nvif_client_init(&drm->master.base, cli->name, device, 225 &cli->base); 226 mutex_unlock(&drm->master.lock); 227 } 228 if (ret) { 229 NV_ERROR(drm, "Client allocation failed: %d\n", ret); 230 goto done; 231 } 232 233 ret = nvif_device_init(&cli->base.object, 0, NV_DEVICE, 234 &(struct nv_device_v0) { 235 .device = ~0, 236 }, sizeof(struct nv_device_v0), 237 &cli->device); 238 if (ret) { 239 NV_ERROR(drm, "Device allocation failed: %d\n", ret); 240 goto done; 241 } 242 243 ret = nvif_mclass(&cli->device.object, mmus); 244 if (ret < 0) { 245 NV_ERROR(drm, "No supported MMU class\n"); 246 goto done; 247 } 248 249 ret = nvif_mmu_init(&cli->device.object, mmus[ret].oclass, &cli->mmu); 250 if (ret) { 251 NV_ERROR(drm, "MMU allocation failed: %d\n", ret); 252 goto done; 253 } 254 255 ret = nvif_mclass(&cli->mmu.object, vmms); 256 if (ret < 0) { 257 NV_ERROR(drm, "No supported VMM class\n"); 258 goto done; 259 } 260 261 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm); 262 if (ret) { 263 NV_ERROR(drm, "VMM allocation failed: %d\n", ret); 264 goto done; 265 } 266 267 ret = nvif_mclass(&cli->mmu.object, mems); 268 if (ret < 0) { 269 NV_ERROR(drm, "No supported MEM class\n"); 270 goto done; 271 } 272 273 cli->mem = &mems[ret]; 274 return 0; 275 done: 276 if (ret) 277 nouveau_cli_fini(cli); 278 return ret; 279 } 280 281 static void 282 nouveau_accel_fini(struct nouveau_drm *drm) 283 { 284 nouveau_channel_idle(drm->channel); 285 nvif_object_fini(&drm->ntfy); 286 nvkm_gpuobj_del(&drm->notify); 287 nvif_notify_fini(&drm->flip); 288 nvif_object_fini(&drm->nvsw); 289 nouveau_channel_del(&drm->channel); 290 291 nouveau_channel_idle(drm->cechan); 292 nvif_object_fini(&drm->ttm.copy); 293 nouveau_channel_del(&drm->cechan); 294 295 if (drm->fence) 296 nouveau_fence(drm)->dtor(drm); 297 } 298 299 static void 300 nouveau_accel_init(struct nouveau_drm *drm) 301 { 302 struct nvif_device *device = &drm->client.device; 303 struct nvif_sclass *sclass; 304 u32 arg0, arg1; 305 int ret, i, n; 306 307 if (nouveau_noaccel) 308 return; 309 310 ret = nouveau_channels_init(drm); 311 if (ret) 312 return; 313 314 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) { 315 ret = nvif_user_init(device); 316 if (ret) 317 return; 318 } 319 320 /* initialise synchronisation routines */ 321 /*XXX: this is crap, but the fence/channel stuff is a little 322 * backwards in some places. this will be fixed. 323 */ 324 ret = n = nvif_object_sclass_get(&device->object, &sclass); 325 if (ret < 0) 326 return; 327 328 for (ret = -ENOSYS, i = 0; i < n; i++) { 329 switch (sclass[i].oclass) { 330 case NV03_CHANNEL_DMA: 331 ret = nv04_fence_create(drm); 332 break; 333 case NV10_CHANNEL_DMA: 334 ret = nv10_fence_create(drm); 335 break; 336 case NV17_CHANNEL_DMA: 337 case NV40_CHANNEL_DMA: 338 ret = nv17_fence_create(drm); 339 break; 340 case NV50_CHANNEL_GPFIFO: 341 ret = nv50_fence_create(drm); 342 break; 343 case G82_CHANNEL_GPFIFO: 344 ret = nv84_fence_create(drm); 345 break; 346 case FERMI_CHANNEL_GPFIFO: 347 case KEPLER_CHANNEL_GPFIFO_A: 348 case KEPLER_CHANNEL_GPFIFO_B: 349 case MAXWELL_CHANNEL_GPFIFO_A: 350 case PASCAL_CHANNEL_GPFIFO_A: 351 case VOLTA_CHANNEL_GPFIFO_A: 352 ret = nvc0_fence_create(drm); 353 break; 354 default: 355 break; 356 } 357 } 358 359 nvif_object_sclass_put(&sclass); 360 if (ret) { 361 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); 362 nouveau_accel_fini(drm); 363 return; 364 } 365 366 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { 367 ret = nouveau_channel_new(drm, &drm->client.device, 368 nvif_fifo_runlist_ce(device), 0, 369 &drm->cechan); 370 if (ret) 371 NV_ERROR(drm, "failed to create ce channel, %d\n", ret); 372 373 arg0 = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_GR); 374 arg1 = 1; 375 } else 376 if (device->info.chipset >= 0xa3 && 377 device->info.chipset != 0xaa && 378 device->info.chipset != 0xac) { 379 ret = nouveau_channel_new(drm, &drm->client.device, 380 NvDmaFB, NvDmaTT, &drm->cechan); 381 if (ret) 382 NV_ERROR(drm, "failed to create ce channel, %d\n", ret); 383 384 arg0 = NvDmaFB; 385 arg1 = NvDmaTT; 386 } else { 387 arg0 = NvDmaFB; 388 arg1 = NvDmaTT; 389 } 390 391 ret = nouveau_channel_new(drm, &drm->client.device, 392 arg0, arg1, &drm->channel); 393 if (ret) { 394 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); 395 nouveau_accel_fini(drm); 396 return; 397 } 398 399 if (device->info.family < NV_DEVICE_INFO_V0_TESLA) { 400 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW, 401 nouveau_abi16_swclass(drm), NULL, 0, 402 &drm->nvsw); 403 if (ret == 0) { 404 ret = RING_SPACE(drm->channel, 2); 405 if (ret == 0) { 406 BEGIN_NV04(drm->channel, NvSubSw, 0, 1); 407 OUT_RING (drm->channel, drm->nvsw.handle); 408 } 409 410 ret = nvif_notify_init(&drm->nvsw, 411 nouveau_flip_complete, 412 false, NV04_NVSW_NTFY_UEVENT, 413 NULL, 0, 0, &drm->flip); 414 if (ret == 0) 415 ret = nvif_notify_get(&drm->flip); 416 if (ret) { 417 nouveau_accel_fini(drm); 418 return; 419 } 420 } 421 422 if (ret) { 423 NV_ERROR(drm, "failed to allocate sw class, %d\n", ret); 424 nouveau_accel_fini(drm); 425 return; 426 } 427 } 428 429 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { 430 ret = nvkm_gpuobj_new(nvxx_device(&drm->client.device), 32, 0, 431 false, NULL, &drm->notify); 432 if (ret) { 433 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); 434 nouveau_accel_fini(drm); 435 return; 436 } 437 438 ret = nvif_object_init(&drm->channel->user, NvNotify0, 439 NV_DMA_IN_MEMORY, 440 &(struct nv_dma_v0) { 441 .target = NV_DMA_V0_TARGET_VRAM, 442 .access = NV_DMA_V0_ACCESS_RDWR, 443 .start = drm->notify->addr, 444 .limit = drm->notify->addr + 31 445 }, sizeof(struct nv_dma_v0), 446 &drm->ntfy); 447 if (ret) { 448 nouveau_accel_fini(drm); 449 return; 450 } 451 } 452 453 454 nouveau_bo_move_init(drm); 455 } 456 457 static int nouveau_drm_probe(struct pci_dev *pdev, 458 const struct pci_device_id *pent) 459 { 460 struct nvkm_device *device; 461 struct apertures_struct *aper; 462 bool boot = false; 463 int ret; 464 465 if (vga_switcheroo_client_probe_defer(pdev)) 466 return -EPROBE_DEFER; 467 468 /* We need to check that the chipset is supported before booting 469 * fbdev off the hardware, as there's no way to put it back. 470 */ 471 ret = nvkm_device_pci_new(pdev, NULL, "error", true, false, 0, &device); 472 if (ret) 473 return ret; 474 475 nvkm_device_del(&device); 476 477 /* Remove conflicting drivers (vesafb, efifb etc). */ 478 aper = alloc_apertures(3); 479 if (!aper) 480 return -ENOMEM; 481 482 aper->ranges[0].base = pci_resource_start(pdev, 1); 483 aper->ranges[0].size = pci_resource_len(pdev, 1); 484 aper->count = 1; 485 486 if (pci_resource_len(pdev, 2)) { 487 aper->ranges[aper->count].base = pci_resource_start(pdev, 2); 488 aper->ranges[aper->count].size = pci_resource_len(pdev, 2); 489 aper->count++; 490 } 491 492 if (pci_resource_len(pdev, 3)) { 493 aper->ranges[aper->count].base = pci_resource_start(pdev, 3); 494 aper->ranges[aper->count].size = pci_resource_len(pdev, 3); 495 aper->count++; 496 } 497 498 #ifdef CONFIG_X86 499 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 500 #endif 501 if (nouveau_modeset != 2) 502 drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot); 503 kfree(aper); 504 505 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug, 506 true, true, ~0ULL, &device); 507 if (ret) 508 return ret; 509 510 pci_set_master(pdev); 511 512 ret = drm_get_pci_dev(pdev, pent, &driver_pci); 513 if (ret) { 514 nvkm_device_del(&device); 515 return ret; 516 } 517 518 return 0; 519 } 520 521 static int 522 nouveau_drm_load(struct drm_device *dev, unsigned long flags) 523 { 524 struct nouveau_drm *drm; 525 int ret; 526 527 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL))) 528 return -ENOMEM; 529 dev->dev_private = drm; 530 drm->dev = dev; 531 532 ret = nouveau_cli_init(drm, "DRM-master", &drm->master); 533 if (ret) 534 return ret; 535 536 ret = nouveau_cli_init(drm, "DRM", &drm->client); 537 if (ret) 538 return ret; 539 540 dev->irq_enabled = true; 541 542 nvxx_client(&drm->client.base)->debug = 543 nvkm_dbgopt(nouveau_debug, "DRM"); 544 545 INIT_LIST_HEAD(&drm->clients); 546 spin_lock_init(&drm->tile.lock); 547 548 /* workaround an odd issue on nvc1 by disabling the device's 549 * nosnoop capability. hopefully won't cause issues until a 550 * better fix is found - assuming there is one... 551 */ 552 if (drm->client.device.info.chipset == 0xc1) 553 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000); 554 555 nouveau_vga_init(drm); 556 557 ret = nouveau_ttm_init(drm); 558 if (ret) 559 goto fail_ttm; 560 561 ret = nouveau_bios_init(dev); 562 if (ret) 563 goto fail_bios; 564 565 ret = nouveau_display_create(dev); 566 if (ret) 567 goto fail_dispctor; 568 569 if (dev->mode_config.num_crtc) { 570 ret = nouveau_display_init(dev); 571 if (ret) 572 goto fail_dispinit; 573 } 574 575 nouveau_debugfs_init(drm); 576 nouveau_hwmon_init(dev); 577 nouveau_accel_init(drm); 578 nouveau_fbcon_init(dev); 579 nouveau_led_init(dev); 580 581 if (nouveau_pmops_runtime()) { 582 pm_runtime_use_autosuspend(dev->dev); 583 pm_runtime_set_autosuspend_delay(dev->dev, 5000); 584 pm_runtime_set_active(dev->dev); 585 pm_runtime_allow(dev->dev); 586 pm_runtime_mark_last_busy(dev->dev); 587 pm_runtime_put(dev->dev); 588 } else { 589 /* enable polling for external displays */ 590 drm_kms_helper_poll_enable(dev); 591 } 592 return 0; 593 594 fail_dispinit: 595 nouveau_display_destroy(dev); 596 fail_dispctor: 597 nouveau_bios_takedown(dev); 598 fail_bios: 599 nouveau_ttm_fini(drm); 600 fail_ttm: 601 nouveau_vga_fini(drm); 602 nouveau_cli_fini(&drm->client); 603 nouveau_cli_fini(&drm->master); 604 kfree(drm); 605 return ret; 606 } 607 608 static void 609 nouveau_drm_unload(struct drm_device *dev) 610 { 611 struct nouveau_drm *drm = nouveau_drm(dev); 612 613 if (nouveau_pmops_runtime()) { 614 pm_runtime_get_sync(dev->dev); 615 pm_runtime_forbid(dev->dev); 616 } 617 618 nouveau_led_fini(dev); 619 nouveau_fbcon_fini(dev); 620 nouveau_accel_fini(drm); 621 nouveau_hwmon_fini(dev); 622 nouveau_debugfs_fini(drm); 623 624 if (dev->mode_config.num_crtc) 625 nouveau_display_fini(dev, false); 626 nouveau_display_destroy(dev); 627 628 nouveau_bios_takedown(dev); 629 630 nouveau_ttm_fini(drm); 631 nouveau_vga_fini(drm); 632 633 nouveau_cli_fini(&drm->client); 634 nouveau_cli_fini(&drm->master); 635 kfree(drm); 636 } 637 638 void 639 nouveau_drm_device_remove(struct drm_device *dev) 640 { 641 struct nouveau_drm *drm = nouveau_drm(dev); 642 struct nvkm_client *client; 643 struct nvkm_device *device; 644 645 dev->irq_enabled = false; 646 client = nvxx_client(&drm->client.base); 647 device = nvkm_device_find(client->device); 648 drm_put_dev(dev); 649 650 nvkm_device_del(&device); 651 } 652 653 static void 654 nouveau_drm_remove(struct pci_dev *pdev) 655 { 656 struct drm_device *dev = pci_get_drvdata(pdev); 657 658 nouveau_drm_device_remove(dev); 659 } 660 661 static int 662 nouveau_do_suspend(struct drm_device *dev, bool runtime) 663 { 664 struct nouveau_drm *drm = nouveau_drm(dev); 665 int ret; 666 667 nouveau_led_suspend(dev); 668 669 if (dev->mode_config.num_crtc) { 670 NV_DEBUG(drm, "suspending console...\n"); 671 nouveau_fbcon_set_suspend(dev, 1); 672 NV_DEBUG(drm, "suspending display...\n"); 673 ret = nouveau_display_suspend(dev, runtime); 674 if (ret) 675 return ret; 676 } 677 678 NV_DEBUG(drm, "evicting buffers...\n"); 679 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); 680 681 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n"); 682 if (drm->cechan) { 683 ret = nouveau_channel_idle(drm->cechan); 684 if (ret) 685 goto fail_display; 686 } 687 688 if (drm->channel) { 689 ret = nouveau_channel_idle(drm->channel); 690 if (ret) 691 goto fail_display; 692 } 693 694 NV_DEBUG(drm, "suspending fence...\n"); 695 if (drm->fence && nouveau_fence(drm)->suspend) { 696 if (!nouveau_fence(drm)->suspend(drm)) { 697 ret = -ENOMEM; 698 goto fail_display; 699 } 700 } 701 702 NV_DEBUG(drm, "suspending object tree...\n"); 703 ret = nvif_client_suspend(&drm->master.base); 704 if (ret) 705 goto fail_client; 706 707 return 0; 708 709 fail_client: 710 if (drm->fence && nouveau_fence(drm)->resume) 711 nouveau_fence(drm)->resume(drm); 712 713 fail_display: 714 if (dev->mode_config.num_crtc) { 715 NV_DEBUG(drm, "resuming display...\n"); 716 nouveau_display_resume(dev, runtime); 717 } 718 return ret; 719 } 720 721 static int 722 nouveau_do_resume(struct drm_device *dev, bool runtime) 723 { 724 struct nouveau_drm *drm = nouveau_drm(dev); 725 726 NV_DEBUG(drm, "resuming object tree...\n"); 727 nvif_client_resume(&drm->master.base); 728 729 NV_DEBUG(drm, "resuming fence...\n"); 730 if (drm->fence && nouveau_fence(drm)->resume) 731 nouveau_fence(drm)->resume(drm); 732 733 nouveau_run_vbios_init(dev); 734 735 if (dev->mode_config.num_crtc) { 736 NV_DEBUG(drm, "resuming display...\n"); 737 nouveau_display_resume(dev, runtime); 738 NV_DEBUG(drm, "resuming console...\n"); 739 nouveau_fbcon_set_suspend(dev, 0); 740 } 741 742 nouveau_led_resume(dev); 743 744 return 0; 745 } 746 747 int 748 nouveau_pmops_suspend(struct device *dev) 749 { 750 struct pci_dev *pdev = to_pci_dev(dev); 751 struct drm_device *drm_dev = pci_get_drvdata(pdev); 752 int ret; 753 754 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || 755 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 756 return 0; 757 758 ret = nouveau_do_suspend(drm_dev, false); 759 if (ret) 760 return ret; 761 762 pci_save_state(pdev); 763 pci_disable_device(pdev); 764 pci_set_power_state(pdev, PCI_D3hot); 765 udelay(200); 766 return 0; 767 } 768 769 int 770 nouveau_pmops_resume(struct device *dev) 771 { 772 struct pci_dev *pdev = to_pci_dev(dev); 773 struct drm_device *drm_dev = pci_get_drvdata(pdev); 774 int ret; 775 776 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || 777 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 778 return 0; 779 780 pci_set_power_state(pdev, PCI_D0); 781 pci_restore_state(pdev); 782 ret = pci_enable_device(pdev); 783 if (ret) 784 return ret; 785 pci_set_master(pdev); 786 787 ret = nouveau_do_resume(drm_dev, false); 788 789 /* Monitors may have been connected / disconnected during suspend */ 790 schedule_work(&nouveau_drm(drm_dev)->hpd_work); 791 792 return ret; 793 } 794 795 static int 796 nouveau_pmops_freeze(struct device *dev) 797 { 798 struct pci_dev *pdev = to_pci_dev(dev); 799 struct drm_device *drm_dev = pci_get_drvdata(pdev); 800 return nouveau_do_suspend(drm_dev, false); 801 } 802 803 static int 804 nouveau_pmops_thaw(struct device *dev) 805 { 806 struct pci_dev *pdev = to_pci_dev(dev); 807 struct drm_device *drm_dev = pci_get_drvdata(pdev); 808 return nouveau_do_resume(drm_dev, false); 809 } 810 811 bool 812 nouveau_pmops_runtime(void) 813 { 814 if (nouveau_runtime_pm == -1) 815 return nouveau_is_optimus() || nouveau_is_v1_dsm(); 816 return nouveau_runtime_pm == 1; 817 } 818 819 static int 820 nouveau_pmops_runtime_suspend(struct device *dev) 821 { 822 struct pci_dev *pdev = to_pci_dev(dev); 823 struct drm_device *drm_dev = pci_get_drvdata(pdev); 824 int ret; 825 826 if (!nouveau_pmops_runtime()) { 827 pm_runtime_forbid(dev); 828 return -EBUSY; 829 } 830 831 drm_kms_helper_poll_disable(drm_dev); 832 nouveau_switcheroo_optimus_dsm(); 833 ret = nouveau_do_suspend(drm_dev, true); 834 pci_save_state(pdev); 835 pci_disable_device(pdev); 836 pci_ignore_hotplug(pdev); 837 pci_set_power_state(pdev, PCI_D3cold); 838 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 839 return ret; 840 } 841 842 static int 843 nouveau_pmops_runtime_resume(struct device *dev) 844 { 845 struct pci_dev *pdev = to_pci_dev(dev); 846 struct drm_device *drm_dev = pci_get_drvdata(pdev); 847 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device; 848 int ret; 849 850 if (!nouveau_pmops_runtime()) { 851 pm_runtime_forbid(dev); 852 return -EBUSY; 853 } 854 855 pci_set_power_state(pdev, PCI_D0); 856 pci_restore_state(pdev); 857 ret = pci_enable_device(pdev); 858 if (ret) 859 return ret; 860 pci_set_master(pdev); 861 862 ret = nouveau_do_resume(drm_dev, true); 863 864 /* do magic */ 865 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25)); 866 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 867 868 /* Monitors may have been connected / disconnected during suspend */ 869 schedule_work(&nouveau_drm(drm_dev)->hpd_work); 870 871 return ret; 872 } 873 874 static int 875 nouveau_pmops_runtime_idle(struct device *dev) 876 { 877 struct pci_dev *pdev = to_pci_dev(dev); 878 struct drm_device *drm_dev = pci_get_drvdata(pdev); 879 struct nouveau_drm *drm = nouveau_drm(drm_dev); 880 struct drm_crtc *crtc; 881 882 if (!nouveau_pmops_runtime()) { 883 pm_runtime_forbid(dev); 884 return -EBUSY; 885 } 886 887 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) { 888 if (crtc->enabled) { 889 DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); 890 return -EBUSY; 891 } 892 } 893 pm_runtime_mark_last_busy(dev); 894 pm_runtime_autosuspend(dev); 895 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 896 return 1; 897 } 898 899 static int 900 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) 901 { 902 struct nouveau_drm *drm = nouveau_drm(dev); 903 struct nouveau_cli *cli; 904 char name[32], tmpname[TASK_COMM_LEN]; 905 int ret; 906 907 /* need to bring up power immediately if opening device */ 908 ret = pm_runtime_get_sync(dev->dev); 909 if (ret < 0 && ret != -EACCES) 910 return ret; 911 912 get_task_comm(tmpname, current); 913 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); 914 915 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) 916 return ret; 917 918 ret = nouveau_cli_init(drm, name, cli); 919 if (ret) 920 goto done; 921 922 cli->base.super = false; 923 924 fpriv->driver_priv = cli; 925 926 mutex_lock(&drm->client.mutex); 927 list_add(&cli->head, &drm->clients); 928 mutex_unlock(&drm->client.mutex); 929 930 done: 931 if (ret && cli) { 932 nouveau_cli_fini(cli); 933 kfree(cli); 934 } 935 936 pm_runtime_mark_last_busy(dev->dev); 937 pm_runtime_put_autosuspend(dev->dev); 938 return ret; 939 } 940 941 static void 942 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) 943 { 944 struct nouveau_cli *cli = nouveau_cli(fpriv); 945 struct nouveau_drm *drm = nouveau_drm(dev); 946 947 pm_runtime_get_sync(dev->dev); 948 949 mutex_lock(&cli->mutex); 950 if (cli->abi16) 951 nouveau_abi16_fini(cli->abi16); 952 mutex_unlock(&cli->mutex); 953 954 mutex_lock(&drm->client.mutex); 955 list_del(&cli->head); 956 mutex_unlock(&drm->client.mutex); 957 958 nouveau_cli_fini(cli); 959 kfree(cli); 960 pm_runtime_mark_last_busy(dev->dev); 961 pm_runtime_put_autosuspend(dev->dev); 962 } 963 964 static const struct drm_ioctl_desc 965 nouveau_ioctls[] = { 966 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW), 967 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 968 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW), 969 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW), 970 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW), 971 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW), 972 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW), 973 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW), 974 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW), 975 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW), 976 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW), 977 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW), 978 }; 979 980 long 981 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 982 { 983 struct drm_file *filp = file->private_data; 984 struct drm_device *dev = filp->minor->dev; 985 long ret; 986 987 ret = pm_runtime_get_sync(dev->dev); 988 if (ret < 0 && ret != -EACCES) 989 return ret; 990 991 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) { 992 case DRM_NOUVEAU_NVIF: 993 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd)); 994 break; 995 default: 996 ret = drm_ioctl(file, cmd, arg); 997 break; 998 } 999 1000 pm_runtime_mark_last_busy(dev->dev); 1001 pm_runtime_put_autosuspend(dev->dev); 1002 return ret; 1003 } 1004 1005 static const struct file_operations 1006 nouveau_driver_fops = { 1007 .owner = THIS_MODULE, 1008 .open = drm_open, 1009 .release = drm_release, 1010 .unlocked_ioctl = nouveau_drm_ioctl, 1011 .mmap = nouveau_ttm_mmap, 1012 .poll = drm_poll, 1013 .read = drm_read, 1014 #if defined(CONFIG_COMPAT) 1015 .compat_ioctl = nouveau_compat_ioctl, 1016 #endif 1017 .llseek = noop_llseek, 1018 }; 1019 1020 static struct drm_driver 1021 driver_stub = { 1022 .driver_features = 1023 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER | 1024 DRIVER_KMS_LEGACY_CONTEXT, 1025 1026 .load = nouveau_drm_load, 1027 .unload = nouveau_drm_unload, 1028 .open = nouveau_drm_open, 1029 .postclose = nouveau_drm_postclose, 1030 .lastclose = nouveau_vga_lastclose, 1031 1032 #if defined(CONFIG_DEBUG_FS) 1033 .debugfs_init = nouveau_drm_debugfs_init, 1034 #endif 1035 1036 .enable_vblank = nouveau_display_vblank_enable, 1037 .disable_vblank = nouveau_display_vblank_disable, 1038 .get_scanout_position = nouveau_display_scanoutpos, 1039 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos, 1040 1041 .ioctls = nouveau_ioctls, 1042 .num_ioctls = ARRAY_SIZE(nouveau_ioctls), 1043 .fops = &nouveau_driver_fops, 1044 1045 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 1046 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 1047 .gem_prime_export = drm_gem_prime_export, 1048 .gem_prime_import = drm_gem_prime_import, 1049 .gem_prime_pin = nouveau_gem_prime_pin, 1050 .gem_prime_res_obj = nouveau_gem_prime_res_obj, 1051 .gem_prime_unpin = nouveau_gem_prime_unpin, 1052 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table, 1053 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, 1054 .gem_prime_vmap = nouveau_gem_prime_vmap, 1055 .gem_prime_vunmap = nouveau_gem_prime_vunmap, 1056 1057 .gem_free_object_unlocked = nouveau_gem_object_del, 1058 .gem_open_object = nouveau_gem_object_open, 1059 .gem_close_object = nouveau_gem_object_close, 1060 1061 .dumb_create = nouveau_display_dumb_create, 1062 .dumb_map_offset = nouveau_display_dumb_map_offset, 1063 1064 .name = DRIVER_NAME, 1065 .desc = DRIVER_DESC, 1066 #ifdef GIT_REVISION 1067 .date = GIT_REVISION, 1068 #else 1069 .date = DRIVER_DATE, 1070 #endif 1071 .major = DRIVER_MAJOR, 1072 .minor = DRIVER_MINOR, 1073 .patchlevel = DRIVER_PATCHLEVEL, 1074 }; 1075 1076 static struct pci_device_id 1077 nouveau_drm_pci_table[] = { 1078 { 1079 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), 1080 .class = PCI_BASE_CLASS_DISPLAY << 16, 1081 .class_mask = 0xff << 16, 1082 }, 1083 { 1084 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), 1085 .class = PCI_BASE_CLASS_DISPLAY << 16, 1086 .class_mask = 0xff << 16, 1087 }, 1088 {} 1089 }; 1090 1091 static void nouveau_display_options(void) 1092 { 1093 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n"); 1094 1095 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable); 1096 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid); 1097 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink); 1098 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel); 1099 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config); 1100 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug); 1101 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel); 1102 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset); 1103 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm); 1104 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf); 1105 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz); 1106 } 1107 1108 static const struct dev_pm_ops nouveau_pm_ops = { 1109 .suspend = nouveau_pmops_suspend, 1110 .resume = nouveau_pmops_resume, 1111 .freeze = nouveau_pmops_freeze, 1112 .thaw = nouveau_pmops_thaw, 1113 .poweroff = nouveau_pmops_freeze, 1114 .restore = nouveau_pmops_resume, 1115 .runtime_suspend = nouveau_pmops_runtime_suspend, 1116 .runtime_resume = nouveau_pmops_runtime_resume, 1117 .runtime_idle = nouveau_pmops_runtime_idle, 1118 }; 1119 1120 static struct pci_driver 1121 nouveau_drm_pci_driver = { 1122 .name = "nouveau", 1123 .id_table = nouveau_drm_pci_table, 1124 .probe = nouveau_drm_probe, 1125 .remove = nouveau_drm_remove, 1126 .driver.pm = &nouveau_pm_ops, 1127 }; 1128 1129 struct drm_device * 1130 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, 1131 struct platform_device *pdev, 1132 struct nvkm_device **pdevice) 1133 { 1134 struct drm_device *drm; 1135 int err; 1136 1137 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug, 1138 true, true, ~0ULL, pdevice); 1139 if (err) 1140 goto err_free; 1141 1142 drm = drm_dev_alloc(&driver_platform, &pdev->dev); 1143 if (IS_ERR(drm)) { 1144 err = PTR_ERR(drm); 1145 goto err_free; 1146 } 1147 1148 platform_set_drvdata(pdev, drm); 1149 1150 return drm; 1151 1152 err_free: 1153 nvkm_device_del(pdevice); 1154 1155 return ERR_PTR(err); 1156 } 1157 1158 static int __init 1159 nouveau_drm_init(void) 1160 { 1161 driver_pci = driver_stub; 1162 driver_platform = driver_stub; 1163 1164 nouveau_display_options(); 1165 1166 if (nouveau_modeset == -1) { 1167 if (vgacon_text_force()) 1168 nouveau_modeset = 0; 1169 } 1170 1171 if (!nouveau_modeset) 1172 return 0; 1173 1174 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1175 platform_driver_register(&nouveau_platform_driver); 1176 #endif 1177 1178 nouveau_register_dsm_handler(); 1179 nouveau_backlight_ctor(); 1180 1181 #ifdef CONFIG_PCI 1182 return pci_register_driver(&nouveau_drm_pci_driver); 1183 #else 1184 return 0; 1185 #endif 1186 } 1187 1188 static void __exit 1189 nouveau_drm_exit(void) 1190 { 1191 if (!nouveau_modeset) 1192 return; 1193 1194 #ifdef CONFIG_PCI 1195 pci_unregister_driver(&nouveau_drm_pci_driver); 1196 #endif 1197 nouveau_backlight_dtor(); 1198 nouveau_unregister_dsm_handler(); 1199 1200 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1201 platform_driver_unregister(&nouveau_platform_driver); 1202 #endif 1203 } 1204 1205 module_init(nouveau_drm_init); 1206 module_exit(nouveau_drm_exit); 1207 1208 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); 1209 MODULE_AUTHOR(DRIVER_AUTHOR); 1210 MODULE_DESCRIPTION(DRIVER_DESC); 1211 MODULE_LICENSE("GPL and additional rights"); 1212