1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 25 #include <linux/console.h> 26 #include <linux/delay.h> 27 #include <linux/module.h> 28 #include <linux/pci.h> 29 #include <linux/pm_runtime.h> 30 #include <linux/vga_switcheroo.h> 31 32 #include <drm/drmP.h> 33 #include <drm/drm_crtc_helper.h> 34 35 #include <core/gpuobj.h> 36 #include <core/option.h> 37 #include <core/pci.h> 38 #include <core/tegra.h> 39 40 #include <nvif/driver.h> 41 #include <nvif/fifo.h> 42 #include <nvif/user.h> 43 44 #include <nvif/class.h> 45 #include <nvif/cl0002.h> 46 #include <nvif/cla06f.h> 47 48 #include "nouveau_drv.h" 49 #include "nouveau_dma.h" 50 #include "nouveau_ttm.h" 51 #include "nouveau_gem.h" 52 #include "nouveau_vga.h" 53 #include "nouveau_led.h" 54 #include "nouveau_hwmon.h" 55 #include "nouveau_acpi.h" 56 #include "nouveau_bios.h" 57 #include "nouveau_ioctl.h" 58 #include "nouveau_abi16.h" 59 #include "nouveau_fbcon.h" 60 #include "nouveau_fence.h" 61 #include "nouveau_debugfs.h" 62 #include "nouveau_usif.h" 63 #include "nouveau_connector.h" 64 #include "nouveau_platform.h" 65 #include "nouveau_svm.h" 66 #include "nouveau_dmem.h" 67 68 MODULE_PARM_DESC(config, "option string to pass to driver core"); 69 static char *nouveau_config; 70 module_param_named(config, nouveau_config, charp, 0400); 71 72 MODULE_PARM_DESC(debug, "debug string to pass to driver core"); 73 static char *nouveau_debug; 74 module_param_named(debug, nouveau_debug, charp, 0400); 75 76 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); 77 static int nouveau_noaccel = 0; 78 module_param_named(noaccel, nouveau_noaccel, int, 0400); 79 80 MODULE_PARM_DESC(modeset, "enable driver (default: auto, " 81 "0 = disabled, 1 = enabled, 2 = headless)"); 82 int nouveau_modeset = -1; 83 module_param_named(modeset, nouveau_modeset, int, 0400); 84 85 MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)"); 86 static int nouveau_atomic = 0; 87 module_param_named(atomic, nouveau_atomic, int, 0400); 88 89 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); 90 static int nouveau_runtime_pm = -1; 91 module_param_named(runpm, nouveau_runtime_pm, int, 0400); 92 93 static struct drm_driver driver_stub; 94 static struct drm_driver driver_pci; 95 static struct drm_driver driver_platform; 96 97 static u64 98 nouveau_pci_name(struct pci_dev *pdev) 99 { 100 u64 name = (u64)pci_domain_nr(pdev->bus) << 32; 101 name |= pdev->bus->number << 16; 102 name |= PCI_SLOT(pdev->devfn) << 8; 103 return name | PCI_FUNC(pdev->devfn); 104 } 105 106 static u64 107 nouveau_platform_name(struct platform_device *platformdev) 108 { 109 return platformdev->id; 110 } 111 112 static u64 113 nouveau_name(struct drm_device *dev) 114 { 115 if (dev->pdev) 116 return nouveau_pci_name(dev->pdev); 117 else 118 return nouveau_platform_name(to_platform_device(dev->dev)); 119 } 120 121 static inline bool 122 nouveau_cli_work_ready(struct dma_fence *fence) 123 { 124 if (!dma_fence_is_signaled(fence)) 125 return false; 126 dma_fence_put(fence); 127 return true; 128 } 129 130 static void 131 nouveau_cli_work(struct work_struct *w) 132 { 133 struct nouveau_cli *cli = container_of(w, typeof(*cli), work); 134 struct nouveau_cli_work *work, *wtmp; 135 mutex_lock(&cli->lock); 136 list_for_each_entry_safe(work, wtmp, &cli->worker, head) { 137 if (!work->fence || nouveau_cli_work_ready(work->fence)) { 138 list_del(&work->head); 139 work->func(work); 140 } 141 } 142 mutex_unlock(&cli->lock); 143 } 144 145 static void 146 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb) 147 { 148 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb); 149 schedule_work(&work->cli->work); 150 } 151 152 void 153 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence, 154 struct nouveau_cli_work *work) 155 { 156 work->fence = dma_fence_get(fence); 157 work->cli = cli; 158 mutex_lock(&cli->lock); 159 list_add_tail(&work->head, &cli->worker); 160 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence)) 161 nouveau_cli_work_fence(fence, &work->cb); 162 mutex_unlock(&cli->lock); 163 } 164 165 static void 166 nouveau_cli_fini(struct nouveau_cli *cli) 167 { 168 /* All our channels are dead now, which means all the fences they 169 * own are signalled, and all callback functions have been called. 170 * 171 * So, after flushing the workqueue, there should be nothing left. 172 */ 173 flush_work(&cli->work); 174 WARN_ON(!list_empty(&cli->worker)); 175 176 usif_client_fini(cli); 177 nouveau_vmm_fini(&cli->svm); 178 nouveau_vmm_fini(&cli->vmm); 179 nvif_mmu_fini(&cli->mmu); 180 nvif_device_fini(&cli->device); 181 mutex_lock(&cli->drm->master.lock); 182 nvif_client_fini(&cli->base); 183 mutex_unlock(&cli->drm->master.lock); 184 } 185 186 static int 187 nouveau_cli_init(struct nouveau_drm *drm, const char *sname, 188 struct nouveau_cli *cli) 189 { 190 static const struct nvif_mclass 191 mems[] = { 192 { NVIF_CLASS_MEM_GF100, -1 }, 193 { NVIF_CLASS_MEM_NV50 , -1 }, 194 { NVIF_CLASS_MEM_NV04 , -1 }, 195 {} 196 }; 197 static const struct nvif_mclass 198 mmus[] = { 199 { NVIF_CLASS_MMU_GF100, -1 }, 200 { NVIF_CLASS_MMU_NV50 , -1 }, 201 { NVIF_CLASS_MMU_NV04 , -1 }, 202 {} 203 }; 204 static const struct nvif_mclass 205 vmms[] = { 206 { NVIF_CLASS_VMM_GP100, -1 }, 207 { NVIF_CLASS_VMM_GM200, -1 }, 208 { NVIF_CLASS_VMM_GF100, -1 }, 209 { NVIF_CLASS_VMM_NV50 , -1 }, 210 { NVIF_CLASS_VMM_NV04 , -1 }, 211 {} 212 }; 213 u64 device = nouveau_name(drm->dev); 214 int ret; 215 216 snprintf(cli->name, sizeof(cli->name), "%s", sname); 217 cli->drm = drm; 218 mutex_init(&cli->mutex); 219 usif_client_init(cli); 220 221 INIT_WORK(&cli->work, nouveau_cli_work); 222 INIT_LIST_HEAD(&cli->worker); 223 mutex_init(&cli->lock); 224 225 if (cli == &drm->master) { 226 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug, 227 cli->name, device, &cli->base); 228 } else { 229 mutex_lock(&drm->master.lock); 230 ret = nvif_client_init(&drm->master.base, cli->name, device, 231 &cli->base); 232 mutex_unlock(&drm->master.lock); 233 } 234 if (ret) { 235 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret); 236 goto done; 237 } 238 239 ret = nvif_device_init(&cli->base.object, 0, NV_DEVICE, 240 &(struct nv_device_v0) { 241 .device = ~0, 242 }, sizeof(struct nv_device_v0), 243 &cli->device); 244 if (ret) { 245 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret); 246 goto done; 247 } 248 249 ret = nvif_mclass(&cli->device.object, mmus); 250 if (ret < 0) { 251 NV_PRINTK(err, cli, "No supported MMU class\n"); 252 goto done; 253 } 254 255 ret = nvif_mmu_init(&cli->device.object, mmus[ret].oclass, &cli->mmu); 256 if (ret) { 257 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret); 258 goto done; 259 } 260 261 ret = nvif_mclass(&cli->mmu.object, vmms); 262 if (ret < 0) { 263 NV_PRINTK(err, cli, "No supported VMM class\n"); 264 goto done; 265 } 266 267 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm); 268 if (ret) { 269 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret); 270 goto done; 271 } 272 273 ret = nvif_mclass(&cli->mmu.object, mems); 274 if (ret < 0) { 275 NV_PRINTK(err, cli, "No supported MEM class\n"); 276 goto done; 277 } 278 279 cli->mem = &mems[ret]; 280 return 0; 281 done: 282 if (ret) 283 nouveau_cli_fini(cli); 284 return ret; 285 } 286 287 static void 288 nouveau_accel_ce_fini(struct nouveau_drm *drm) 289 { 290 nouveau_channel_idle(drm->cechan); 291 nvif_object_fini(&drm->ttm.copy); 292 nouveau_channel_del(&drm->cechan); 293 } 294 295 static void 296 nouveau_accel_ce_init(struct nouveau_drm *drm) 297 { 298 struct nvif_device *device = &drm->client.device; 299 int ret = 0; 300 301 /* Allocate channel that has access to a (preferably async) copy 302 * engine, to use for TTM buffer moves. 303 */ 304 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { 305 ret = nouveau_channel_new(drm, device, 306 nvif_fifo_runlist_ce(device), 0, 307 true, &drm->cechan); 308 } else 309 if (device->info.chipset >= 0xa3 && 310 device->info.chipset != 0xaa && 311 device->info.chipset != 0xac) { 312 /* Prior to Kepler, there's only a single runlist, so all 313 * engines can be accessed from any channel. 314 * 315 * We still want to use a separate channel though. 316 */ 317 ret = nouveau_channel_new(drm, device, NvDmaFB, NvDmaTT, false, 318 &drm->cechan); 319 } 320 321 if (ret) 322 NV_ERROR(drm, "failed to create ce channel, %d\n", ret); 323 } 324 325 static void 326 nouveau_accel_gr_fini(struct nouveau_drm *drm) 327 { 328 nouveau_channel_idle(drm->channel); 329 nvif_object_fini(&drm->ntfy); 330 nvkm_gpuobj_del(&drm->notify); 331 nvif_object_fini(&drm->nvsw); 332 nouveau_channel_del(&drm->channel); 333 } 334 335 static void 336 nouveau_accel_gr_init(struct nouveau_drm *drm) 337 { 338 struct nvif_device *device = &drm->client.device; 339 u32 arg0, arg1; 340 int ret; 341 342 /* Allocate channel that has access to the graphics engine. */ 343 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { 344 arg0 = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_GR); 345 arg1 = 1; 346 } else { 347 arg0 = NvDmaFB; 348 arg1 = NvDmaTT; 349 } 350 351 ret = nouveau_channel_new(drm, device, arg0, arg1, false, 352 &drm->channel); 353 if (ret) { 354 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); 355 nouveau_accel_gr_fini(drm); 356 return; 357 } 358 359 /* A SW class is used on pre-NV50 HW to assist with handling the 360 * synchronisation of page flips, as well as to implement fences 361 * on TNT/TNT2 HW that lacks any kind of support in host. 362 */ 363 if (device->info.family < NV_DEVICE_INFO_V0_TESLA) { 364 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW, 365 nouveau_abi16_swclass(drm), NULL, 0, 366 &drm->nvsw); 367 if (ret == 0) { 368 ret = RING_SPACE(drm->channel, 2); 369 if (ret == 0) { 370 BEGIN_NV04(drm->channel, NvSubSw, 0, 1); 371 OUT_RING (drm->channel, drm->nvsw.handle); 372 } 373 } 374 375 if (ret) { 376 NV_ERROR(drm, "failed to allocate sw class, %d\n", ret); 377 nouveau_accel_gr_fini(drm); 378 return; 379 } 380 } 381 382 /* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason, 383 * even if notification is never requested, so, allocate a ctxdma on 384 * any GPU where it's possible we'll end up using M2MF for BO moves. 385 */ 386 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { 387 ret = nvkm_gpuobj_new(nvxx_device(device), 32, 0, false, NULL, 388 &drm->notify); 389 if (ret) { 390 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); 391 nouveau_accel_gr_fini(drm); 392 return; 393 } 394 395 ret = nvif_object_init(&drm->channel->user, NvNotify0, 396 NV_DMA_IN_MEMORY, 397 &(struct nv_dma_v0) { 398 .target = NV_DMA_V0_TARGET_VRAM, 399 .access = NV_DMA_V0_ACCESS_RDWR, 400 .start = drm->notify->addr, 401 .limit = drm->notify->addr + 31 402 }, sizeof(struct nv_dma_v0), 403 &drm->ntfy); 404 if (ret) { 405 nouveau_accel_gr_fini(drm); 406 return; 407 } 408 } 409 } 410 411 static void 412 nouveau_accel_fini(struct nouveau_drm *drm) 413 { 414 nouveau_accel_ce_fini(drm); 415 nouveau_accel_gr_fini(drm); 416 if (drm->fence) 417 nouveau_fence(drm)->dtor(drm); 418 } 419 420 static void 421 nouveau_accel_init(struct nouveau_drm *drm) 422 { 423 struct nvif_device *device = &drm->client.device; 424 struct nvif_sclass *sclass; 425 int ret, i, n; 426 427 if (nouveau_noaccel) 428 return; 429 430 /* Initialise global support for channels, and synchronisation. */ 431 ret = nouveau_channels_init(drm); 432 if (ret) 433 return; 434 435 /*XXX: this is crap, but the fence/channel stuff is a little 436 * backwards in some places. this will be fixed. 437 */ 438 ret = n = nvif_object_sclass_get(&device->object, &sclass); 439 if (ret < 0) 440 return; 441 442 for (ret = -ENOSYS, i = 0; i < n; i++) { 443 switch (sclass[i].oclass) { 444 case NV03_CHANNEL_DMA: 445 ret = nv04_fence_create(drm); 446 break; 447 case NV10_CHANNEL_DMA: 448 ret = nv10_fence_create(drm); 449 break; 450 case NV17_CHANNEL_DMA: 451 case NV40_CHANNEL_DMA: 452 ret = nv17_fence_create(drm); 453 break; 454 case NV50_CHANNEL_GPFIFO: 455 ret = nv50_fence_create(drm); 456 break; 457 case G82_CHANNEL_GPFIFO: 458 ret = nv84_fence_create(drm); 459 break; 460 case FERMI_CHANNEL_GPFIFO: 461 case KEPLER_CHANNEL_GPFIFO_A: 462 case KEPLER_CHANNEL_GPFIFO_B: 463 case MAXWELL_CHANNEL_GPFIFO_A: 464 case PASCAL_CHANNEL_GPFIFO_A: 465 case VOLTA_CHANNEL_GPFIFO_A: 466 case TURING_CHANNEL_GPFIFO_A: 467 ret = nvc0_fence_create(drm); 468 break; 469 default: 470 break; 471 } 472 } 473 474 nvif_object_sclass_put(&sclass); 475 if (ret) { 476 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); 477 nouveau_accel_fini(drm); 478 return; 479 } 480 481 /* Volta requires access to a doorbell register for kickoff. */ 482 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) { 483 ret = nvif_user_init(device); 484 if (ret) 485 return; 486 } 487 488 /* Allocate channels we need to support various functions. */ 489 nouveau_accel_gr_init(drm); 490 nouveau_accel_ce_init(drm); 491 492 /* Initialise accelerated TTM buffer moves. */ 493 nouveau_bo_move_init(drm); 494 } 495 496 static int 497 nouveau_drm_device_init(struct drm_device *dev) 498 { 499 struct nouveau_drm *drm; 500 int ret; 501 502 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL))) 503 return -ENOMEM; 504 dev->dev_private = drm; 505 drm->dev = dev; 506 507 ret = nouveau_cli_init(drm, "DRM-master", &drm->master); 508 if (ret) 509 goto fail_alloc; 510 511 ret = nouveau_cli_init(drm, "DRM", &drm->client); 512 if (ret) 513 goto fail_master; 514 515 dev->irq_enabled = true; 516 517 nvxx_client(&drm->client.base)->debug = 518 nvkm_dbgopt(nouveau_debug, "DRM"); 519 520 INIT_LIST_HEAD(&drm->clients); 521 spin_lock_init(&drm->tile.lock); 522 523 /* workaround an odd issue on nvc1 by disabling the device's 524 * nosnoop capability. hopefully won't cause issues until a 525 * better fix is found - assuming there is one... 526 */ 527 if (drm->client.device.info.chipset == 0xc1) 528 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000); 529 530 nouveau_vga_init(drm); 531 532 ret = nouveau_ttm_init(drm); 533 if (ret) 534 goto fail_ttm; 535 536 ret = nouveau_bios_init(dev); 537 if (ret) 538 goto fail_bios; 539 540 nouveau_accel_init(drm); 541 542 ret = nouveau_display_create(dev); 543 if (ret) 544 goto fail_dispctor; 545 546 if (dev->mode_config.num_crtc) { 547 ret = nouveau_display_init(dev, false, false); 548 if (ret) 549 goto fail_dispinit; 550 } 551 552 nouveau_debugfs_init(drm); 553 nouveau_hwmon_init(dev); 554 nouveau_svm_init(drm); 555 nouveau_dmem_init(drm); 556 nouveau_fbcon_init(dev); 557 nouveau_led_init(dev); 558 559 if (nouveau_pmops_runtime()) { 560 pm_runtime_use_autosuspend(dev->dev); 561 pm_runtime_set_autosuspend_delay(dev->dev, 5000); 562 pm_runtime_set_active(dev->dev); 563 pm_runtime_allow(dev->dev); 564 pm_runtime_mark_last_busy(dev->dev); 565 pm_runtime_put(dev->dev); 566 } 567 568 return 0; 569 570 fail_dispinit: 571 nouveau_display_destroy(dev); 572 fail_dispctor: 573 nouveau_accel_fini(drm); 574 nouveau_bios_takedown(dev); 575 fail_bios: 576 nouveau_ttm_fini(drm); 577 fail_ttm: 578 nouveau_vga_fini(drm); 579 nouveau_cli_fini(&drm->client); 580 fail_master: 581 nouveau_cli_fini(&drm->master); 582 fail_alloc: 583 kfree(drm); 584 return ret; 585 } 586 587 static void 588 nouveau_drm_device_fini(struct drm_device *dev) 589 { 590 struct nouveau_drm *drm = nouveau_drm(dev); 591 592 if (nouveau_pmops_runtime()) { 593 pm_runtime_get_sync(dev->dev); 594 pm_runtime_forbid(dev->dev); 595 } 596 597 nouveau_led_fini(dev); 598 nouveau_fbcon_fini(dev); 599 nouveau_dmem_fini(drm); 600 nouveau_svm_fini(drm); 601 nouveau_hwmon_fini(dev); 602 nouveau_debugfs_fini(drm); 603 604 if (dev->mode_config.num_crtc) 605 nouveau_display_fini(dev, false, false); 606 nouveau_display_destroy(dev); 607 608 nouveau_accel_fini(drm); 609 nouveau_bios_takedown(dev); 610 611 nouveau_ttm_fini(drm); 612 nouveau_vga_fini(drm); 613 614 nouveau_cli_fini(&drm->client); 615 nouveau_cli_fini(&drm->master); 616 kfree(drm); 617 } 618 619 static int nouveau_drm_probe(struct pci_dev *pdev, 620 const struct pci_device_id *pent) 621 { 622 struct nvkm_device *device; 623 struct drm_device *drm_dev; 624 struct apertures_struct *aper; 625 bool boot = false; 626 int ret; 627 628 if (vga_switcheroo_client_probe_defer(pdev)) 629 return -EPROBE_DEFER; 630 631 /* We need to check that the chipset is supported before booting 632 * fbdev off the hardware, as there's no way to put it back. 633 */ 634 ret = nvkm_device_pci_new(pdev, NULL, "error", true, false, 0, &device); 635 if (ret) 636 return ret; 637 638 nvkm_device_del(&device); 639 640 /* Remove conflicting drivers (vesafb, efifb etc). */ 641 aper = alloc_apertures(3); 642 if (!aper) 643 return -ENOMEM; 644 645 aper->ranges[0].base = pci_resource_start(pdev, 1); 646 aper->ranges[0].size = pci_resource_len(pdev, 1); 647 aper->count = 1; 648 649 if (pci_resource_len(pdev, 2)) { 650 aper->ranges[aper->count].base = pci_resource_start(pdev, 2); 651 aper->ranges[aper->count].size = pci_resource_len(pdev, 2); 652 aper->count++; 653 } 654 655 if (pci_resource_len(pdev, 3)) { 656 aper->ranges[aper->count].base = pci_resource_start(pdev, 3); 657 aper->ranges[aper->count].size = pci_resource_len(pdev, 3); 658 aper->count++; 659 } 660 661 #ifdef CONFIG_X86 662 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 663 #endif 664 if (nouveau_modeset != 2) 665 drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot); 666 kfree(aper); 667 668 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug, 669 true, true, ~0ULL, &device); 670 if (ret) 671 return ret; 672 673 pci_set_master(pdev); 674 675 if (nouveau_atomic) 676 driver_pci.driver_features |= DRIVER_ATOMIC; 677 678 drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev); 679 if (IS_ERR(drm_dev)) { 680 ret = PTR_ERR(drm_dev); 681 goto fail_nvkm; 682 } 683 684 ret = pci_enable_device(pdev); 685 if (ret) 686 goto fail_drm; 687 688 drm_dev->pdev = pdev; 689 pci_set_drvdata(pdev, drm_dev); 690 691 ret = nouveau_drm_device_init(drm_dev); 692 if (ret) 693 goto fail_pci; 694 695 ret = drm_dev_register(drm_dev, pent->driver_data); 696 if (ret) 697 goto fail_drm_dev_init; 698 699 return 0; 700 701 fail_drm_dev_init: 702 nouveau_drm_device_fini(drm_dev); 703 fail_pci: 704 pci_disable_device(pdev); 705 fail_drm: 706 drm_dev_put(drm_dev); 707 fail_nvkm: 708 nvkm_device_del(&device); 709 return ret; 710 } 711 712 void 713 nouveau_drm_device_remove(struct drm_device *dev) 714 { 715 struct pci_dev *pdev = dev->pdev; 716 struct nouveau_drm *drm = nouveau_drm(dev); 717 struct nvkm_client *client; 718 struct nvkm_device *device; 719 720 drm_dev_unregister(dev); 721 722 dev->irq_enabled = false; 723 client = nvxx_client(&drm->client.base); 724 device = nvkm_device_find(client->device); 725 726 nouveau_drm_device_fini(dev); 727 pci_disable_device(pdev); 728 drm_dev_put(dev); 729 nvkm_device_del(&device); 730 } 731 732 static void 733 nouveau_drm_remove(struct pci_dev *pdev) 734 { 735 struct drm_device *dev = pci_get_drvdata(pdev); 736 737 nouveau_drm_device_remove(dev); 738 } 739 740 static int 741 nouveau_do_suspend(struct drm_device *dev, bool runtime) 742 { 743 struct nouveau_drm *drm = nouveau_drm(dev); 744 int ret; 745 746 nouveau_svm_suspend(drm); 747 nouveau_dmem_suspend(drm); 748 nouveau_led_suspend(dev); 749 750 if (dev->mode_config.num_crtc) { 751 NV_DEBUG(drm, "suspending console...\n"); 752 nouveau_fbcon_set_suspend(dev, 1); 753 NV_DEBUG(drm, "suspending display...\n"); 754 ret = nouveau_display_suspend(dev, runtime); 755 if (ret) 756 return ret; 757 } 758 759 NV_DEBUG(drm, "evicting buffers...\n"); 760 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); 761 762 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n"); 763 if (drm->cechan) { 764 ret = nouveau_channel_idle(drm->cechan); 765 if (ret) 766 goto fail_display; 767 } 768 769 if (drm->channel) { 770 ret = nouveau_channel_idle(drm->channel); 771 if (ret) 772 goto fail_display; 773 } 774 775 NV_DEBUG(drm, "suspending fence...\n"); 776 if (drm->fence && nouveau_fence(drm)->suspend) { 777 if (!nouveau_fence(drm)->suspend(drm)) { 778 ret = -ENOMEM; 779 goto fail_display; 780 } 781 } 782 783 NV_DEBUG(drm, "suspending object tree...\n"); 784 ret = nvif_client_suspend(&drm->master.base); 785 if (ret) 786 goto fail_client; 787 788 return 0; 789 790 fail_client: 791 if (drm->fence && nouveau_fence(drm)->resume) 792 nouveau_fence(drm)->resume(drm); 793 794 fail_display: 795 if (dev->mode_config.num_crtc) { 796 NV_DEBUG(drm, "resuming display...\n"); 797 nouveau_display_resume(dev, runtime); 798 } 799 return ret; 800 } 801 802 static int 803 nouveau_do_resume(struct drm_device *dev, bool runtime) 804 { 805 struct nouveau_drm *drm = nouveau_drm(dev); 806 807 NV_DEBUG(drm, "resuming object tree...\n"); 808 nvif_client_resume(&drm->master.base); 809 810 NV_DEBUG(drm, "resuming fence...\n"); 811 if (drm->fence && nouveau_fence(drm)->resume) 812 nouveau_fence(drm)->resume(drm); 813 814 nouveau_run_vbios_init(dev); 815 816 if (dev->mode_config.num_crtc) { 817 NV_DEBUG(drm, "resuming display...\n"); 818 nouveau_display_resume(dev, runtime); 819 NV_DEBUG(drm, "resuming console...\n"); 820 nouveau_fbcon_set_suspend(dev, 0); 821 } 822 823 nouveau_led_resume(dev); 824 nouveau_dmem_resume(drm); 825 nouveau_svm_resume(drm); 826 return 0; 827 } 828 829 int 830 nouveau_pmops_suspend(struct device *dev) 831 { 832 struct pci_dev *pdev = to_pci_dev(dev); 833 struct drm_device *drm_dev = pci_get_drvdata(pdev); 834 int ret; 835 836 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || 837 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 838 return 0; 839 840 ret = nouveau_do_suspend(drm_dev, false); 841 if (ret) 842 return ret; 843 844 pci_save_state(pdev); 845 pci_disable_device(pdev); 846 pci_set_power_state(pdev, PCI_D3hot); 847 udelay(200); 848 return 0; 849 } 850 851 int 852 nouveau_pmops_resume(struct device *dev) 853 { 854 struct pci_dev *pdev = to_pci_dev(dev); 855 struct drm_device *drm_dev = pci_get_drvdata(pdev); 856 int ret; 857 858 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || 859 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 860 return 0; 861 862 pci_set_power_state(pdev, PCI_D0); 863 pci_restore_state(pdev); 864 ret = pci_enable_device(pdev); 865 if (ret) 866 return ret; 867 pci_set_master(pdev); 868 869 ret = nouveau_do_resume(drm_dev, false); 870 871 /* Monitors may have been connected / disconnected during suspend */ 872 schedule_work(&nouveau_drm(drm_dev)->hpd_work); 873 874 return ret; 875 } 876 877 static int 878 nouveau_pmops_freeze(struct device *dev) 879 { 880 struct pci_dev *pdev = to_pci_dev(dev); 881 struct drm_device *drm_dev = pci_get_drvdata(pdev); 882 return nouveau_do_suspend(drm_dev, false); 883 } 884 885 static int 886 nouveau_pmops_thaw(struct device *dev) 887 { 888 struct pci_dev *pdev = to_pci_dev(dev); 889 struct drm_device *drm_dev = pci_get_drvdata(pdev); 890 return nouveau_do_resume(drm_dev, false); 891 } 892 893 bool 894 nouveau_pmops_runtime(void) 895 { 896 if (nouveau_runtime_pm == -1) 897 return nouveau_is_optimus() || nouveau_is_v1_dsm(); 898 return nouveau_runtime_pm == 1; 899 } 900 901 static int 902 nouveau_pmops_runtime_suspend(struct device *dev) 903 { 904 struct pci_dev *pdev = to_pci_dev(dev); 905 struct drm_device *drm_dev = pci_get_drvdata(pdev); 906 int ret; 907 908 if (!nouveau_pmops_runtime()) { 909 pm_runtime_forbid(dev); 910 return -EBUSY; 911 } 912 913 nouveau_switcheroo_optimus_dsm(); 914 ret = nouveau_do_suspend(drm_dev, true); 915 pci_save_state(pdev); 916 pci_disable_device(pdev); 917 pci_ignore_hotplug(pdev); 918 pci_set_power_state(pdev, PCI_D3cold); 919 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 920 return ret; 921 } 922 923 static int 924 nouveau_pmops_runtime_resume(struct device *dev) 925 { 926 struct pci_dev *pdev = to_pci_dev(dev); 927 struct drm_device *drm_dev = pci_get_drvdata(pdev); 928 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device; 929 int ret; 930 931 if (!nouveau_pmops_runtime()) { 932 pm_runtime_forbid(dev); 933 return -EBUSY; 934 } 935 936 pci_set_power_state(pdev, PCI_D0); 937 pci_restore_state(pdev); 938 ret = pci_enable_device(pdev); 939 if (ret) 940 return ret; 941 pci_set_master(pdev); 942 943 ret = nouveau_do_resume(drm_dev, true); 944 945 /* do magic */ 946 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25)); 947 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 948 949 /* Monitors may have been connected / disconnected during suspend */ 950 schedule_work(&nouveau_drm(drm_dev)->hpd_work); 951 952 return ret; 953 } 954 955 static int 956 nouveau_pmops_runtime_idle(struct device *dev) 957 { 958 if (!nouveau_pmops_runtime()) { 959 pm_runtime_forbid(dev); 960 return -EBUSY; 961 } 962 963 pm_runtime_mark_last_busy(dev); 964 pm_runtime_autosuspend(dev); 965 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 966 return 1; 967 } 968 969 static int 970 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) 971 { 972 struct nouveau_drm *drm = nouveau_drm(dev); 973 struct nouveau_cli *cli; 974 char name[32], tmpname[TASK_COMM_LEN]; 975 int ret; 976 977 /* need to bring up power immediately if opening device */ 978 ret = pm_runtime_get_sync(dev->dev); 979 if (ret < 0 && ret != -EACCES) 980 return ret; 981 982 get_task_comm(tmpname, current); 983 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); 984 985 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) { 986 ret = -ENOMEM; 987 goto done; 988 } 989 990 ret = nouveau_cli_init(drm, name, cli); 991 if (ret) 992 goto done; 993 994 cli->base.super = false; 995 996 fpriv->driver_priv = cli; 997 998 mutex_lock(&drm->client.mutex); 999 list_add(&cli->head, &drm->clients); 1000 mutex_unlock(&drm->client.mutex); 1001 1002 done: 1003 if (ret && cli) { 1004 nouveau_cli_fini(cli); 1005 kfree(cli); 1006 } 1007 1008 pm_runtime_mark_last_busy(dev->dev); 1009 pm_runtime_put_autosuspend(dev->dev); 1010 return ret; 1011 } 1012 1013 static void 1014 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) 1015 { 1016 struct nouveau_cli *cli = nouveau_cli(fpriv); 1017 struct nouveau_drm *drm = nouveau_drm(dev); 1018 1019 pm_runtime_get_sync(dev->dev); 1020 1021 mutex_lock(&cli->mutex); 1022 if (cli->abi16) 1023 nouveau_abi16_fini(cli->abi16); 1024 mutex_unlock(&cli->mutex); 1025 1026 mutex_lock(&drm->client.mutex); 1027 list_del(&cli->head); 1028 mutex_unlock(&drm->client.mutex); 1029 1030 nouveau_cli_fini(cli); 1031 kfree(cli); 1032 pm_runtime_mark_last_busy(dev->dev); 1033 pm_runtime_put_autosuspend(dev->dev); 1034 } 1035 1036 static const struct drm_ioctl_desc 1037 nouveau_ioctls[] = { 1038 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW), 1039 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 1040 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW), 1041 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW), 1042 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW), 1043 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW), 1044 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW), 1045 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_INIT, nouveau_svmm_init, DRM_AUTH|DRM_RENDER_ALLOW), 1046 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_BIND, nouveau_svmm_bind, DRM_AUTH|DRM_RENDER_ALLOW), 1047 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW), 1048 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW), 1049 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW), 1050 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW), 1051 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW), 1052 }; 1053 1054 long 1055 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 1056 { 1057 struct drm_file *filp = file->private_data; 1058 struct drm_device *dev = filp->minor->dev; 1059 long ret; 1060 1061 ret = pm_runtime_get_sync(dev->dev); 1062 if (ret < 0 && ret != -EACCES) 1063 return ret; 1064 1065 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) { 1066 case DRM_NOUVEAU_NVIF: 1067 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd)); 1068 break; 1069 default: 1070 ret = drm_ioctl(file, cmd, arg); 1071 break; 1072 } 1073 1074 pm_runtime_mark_last_busy(dev->dev); 1075 pm_runtime_put_autosuspend(dev->dev); 1076 return ret; 1077 } 1078 1079 static const struct file_operations 1080 nouveau_driver_fops = { 1081 .owner = THIS_MODULE, 1082 .open = drm_open, 1083 .release = drm_release, 1084 .unlocked_ioctl = nouveau_drm_ioctl, 1085 .mmap = nouveau_ttm_mmap, 1086 .poll = drm_poll, 1087 .read = drm_read, 1088 #if defined(CONFIG_COMPAT) 1089 .compat_ioctl = nouveau_compat_ioctl, 1090 #endif 1091 .llseek = noop_llseek, 1092 }; 1093 1094 static struct drm_driver 1095 driver_stub = { 1096 .driver_features = 1097 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER | 1098 DRIVER_KMS_LEGACY_CONTEXT, 1099 1100 .open = nouveau_drm_open, 1101 .postclose = nouveau_drm_postclose, 1102 .lastclose = nouveau_vga_lastclose, 1103 1104 #if defined(CONFIG_DEBUG_FS) 1105 .debugfs_init = nouveau_drm_debugfs_init, 1106 #endif 1107 1108 .enable_vblank = nouveau_display_vblank_enable, 1109 .disable_vblank = nouveau_display_vblank_disable, 1110 .get_scanout_position = nouveau_display_scanoutpos, 1111 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos, 1112 1113 .ioctls = nouveau_ioctls, 1114 .num_ioctls = ARRAY_SIZE(nouveau_ioctls), 1115 .fops = &nouveau_driver_fops, 1116 1117 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 1118 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 1119 .gem_prime_export = drm_gem_prime_export, 1120 .gem_prime_import = drm_gem_prime_import, 1121 .gem_prime_pin = nouveau_gem_prime_pin, 1122 .gem_prime_res_obj = nouveau_gem_prime_res_obj, 1123 .gem_prime_unpin = nouveau_gem_prime_unpin, 1124 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table, 1125 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, 1126 .gem_prime_vmap = nouveau_gem_prime_vmap, 1127 .gem_prime_vunmap = nouveau_gem_prime_vunmap, 1128 1129 .gem_free_object_unlocked = nouveau_gem_object_del, 1130 .gem_open_object = nouveau_gem_object_open, 1131 .gem_close_object = nouveau_gem_object_close, 1132 1133 .dumb_create = nouveau_display_dumb_create, 1134 .dumb_map_offset = nouveau_display_dumb_map_offset, 1135 1136 .name = DRIVER_NAME, 1137 .desc = DRIVER_DESC, 1138 #ifdef GIT_REVISION 1139 .date = GIT_REVISION, 1140 #else 1141 .date = DRIVER_DATE, 1142 #endif 1143 .major = DRIVER_MAJOR, 1144 .minor = DRIVER_MINOR, 1145 .patchlevel = DRIVER_PATCHLEVEL, 1146 }; 1147 1148 static struct pci_device_id 1149 nouveau_drm_pci_table[] = { 1150 { 1151 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), 1152 .class = PCI_BASE_CLASS_DISPLAY << 16, 1153 .class_mask = 0xff << 16, 1154 }, 1155 { 1156 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), 1157 .class = PCI_BASE_CLASS_DISPLAY << 16, 1158 .class_mask = 0xff << 16, 1159 }, 1160 {} 1161 }; 1162 1163 static void nouveau_display_options(void) 1164 { 1165 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n"); 1166 1167 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable); 1168 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid); 1169 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink); 1170 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel); 1171 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config); 1172 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug); 1173 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel); 1174 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset); 1175 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm); 1176 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf); 1177 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz); 1178 } 1179 1180 static const struct dev_pm_ops nouveau_pm_ops = { 1181 .suspend = nouveau_pmops_suspend, 1182 .resume = nouveau_pmops_resume, 1183 .freeze = nouveau_pmops_freeze, 1184 .thaw = nouveau_pmops_thaw, 1185 .poweroff = nouveau_pmops_freeze, 1186 .restore = nouveau_pmops_resume, 1187 .runtime_suspend = nouveau_pmops_runtime_suspend, 1188 .runtime_resume = nouveau_pmops_runtime_resume, 1189 .runtime_idle = nouveau_pmops_runtime_idle, 1190 }; 1191 1192 static struct pci_driver 1193 nouveau_drm_pci_driver = { 1194 .name = "nouveau", 1195 .id_table = nouveau_drm_pci_table, 1196 .probe = nouveau_drm_probe, 1197 .remove = nouveau_drm_remove, 1198 .driver.pm = &nouveau_pm_ops, 1199 }; 1200 1201 struct drm_device * 1202 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, 1203 struct platform_device *pdev, 1204 struct nvkm_device **pdevice) 1205 { 1206 struct drm_device *drm; 1207 int err; 1208 1209 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug, 1210 true, true, ~0ULL, pdevice); 1211 if (err) 1212 goto err_free; 1213 1214 drm = drm_dev_alloc(&driver_platform, &pdev->dev); 1215 if (IS_ERR(drm)) { 1216 err = PTR_ERR(drm); 1217 goto err_free; 1218 } 1219 1220 err = nouveau_drm_device_init(drm); 1221 if (err) 1222 goto err_put; 1223 1224 platform_set_drvdata(pdev, drm); 1225 1226 return drm; 1227 1228 err_put: 1229 drm_dev_put(drm); 1230 err_free: 1231 nvkm_device_del(pdevice); 1232 1233 return ERR_PTR(err); 1234 } 1235 1236 static int __init 1237 nouveau_drm_init(void) 1238 { 1239 driver_pci = driver_stub; 1240 driver_platform = driver_stub; 1241 1242 nouveau_display_options(); 1243 1244 if (nouveau_modeset == -1) { 1245 if (vgacon_text_force()) 1246 nouveau_modeset = 0; 1247 } 1248 1249 if (!nouveau_modeset) 1250 return 0; 1251 1252 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1253 platform_driver_register(&nouveau_platform_driver); 1254 #endif 1255 1256 nouveau_register_dsm_handler(); 1257 nouveau_backlight_ctor(); 1258 1259 #ifdef CONFIG_PCI 1260 return pci_register_driver(&nouveau_drm_pci_driver); 1261 #else 1262 return 0; 1263 #endif 1264 } 1265 1266 static void __exit 1267 nouveau_drm_exit(void) 1268 { 1269 if (!nouveau_modeset) 1270 return; 1271 1272 #ifdef CONFIG_PCI 1273 pci_unregister_driver(&nouveau_drm_pci_driver); 1274 #endif 1275 nouveau_backlight_dtor(); 1276 nouveau_unregister_dsm_handler(); 1277 1278 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1279 platform_driver_unregister(&nouveau_platform_driver); 1280 #endif 1281 } 1282 1283 module_init(nouveau_drm_init); 1284 module_exit(nouveau_drm_exit); 1285 1286 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); 1287 MODULE_AUTHOR(DRIVER_AUTHOR); 1288 MODULE_DESCRIPTION(DRIVER_DESC); 1289 MODULE_LICENSE("GPL and additional rights"); 1290