1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 
25 #include <linux/delay.h>
26 #include <linux/module.h>
27 #include <linux/pci.h>
28 #include <linux/pm_runtime.h>
29 #include <linux/vga_switcheroo.h>
30 #include <linux/mmu_notifier.h>
31 #include <linux/dynamic_debug.h>
32 
33 #include <drm/drm_aperture.h>
34 #include <drm/drm_crtc_helper.h>
35 #include <drm/drm_drv.h>
36 #include <drm/drm_gem_ttm_helper.h>
37 #include <drm/drm_ioctl.h>
38 #include <drm/drm_vblank.h>
39 
40 #include <core/gpuobj.h>
41 #include <core/option.h>
42 #include <core/pci.h>
43 #include <core/tegra.h>
44 
45 #include <nvif/driver.h>
46 #include <nvif/fifo.h>
47 #include <nvif/push006c.h>
48 #include <nvif/user.h>
49 
50 #include <nvif/class.h>
51 #include <nvif/cl0002.h>
52 #include <nvif/cla06f.h>
53 
54 #include "nouveau_drv.h"
55 #include "nouveau_dma.h"
56 #include "nouveau_ttm.h"
57 #include "nouveau_gem.h"
58 #include "nouveau_vga.h"
59 #include "nouveau_led.h"
60 #include "nouveau_hwmon.h"
61 #include "nouveau_acpi.h"
62 #include "nouveau_bios.h"
63 #include "nouveau_ioctl.h"
64 #include "nouveau_abi16.h"
65 #include "nouveau_fbcon.h"
66 #include "nouveau_fence.h"
67 #include "nouveau_debugfs.h"
68 #include "nouveau_usif.h"
69 #include "nouveau_connector.h"
70 #include "nouveau_platform.h"
71 #include "nouveau_svm.h"
72 #include "nouveau_dmem.h"
73 
74 DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0,
75 			"DRM_UT_CORE",
76 			"DRM_UT_DRIVER",
77 			"DRM_UT_KMS",
78 			"DRM_UT_PRIME",
79 			"DRM_UT_ATOMIC",
80 			"DRM_UT_VBL",
81 			"DRM_UT_STATE",
82 			"DRM_UT_LEASE",
83 			"DRM_UT_DP",
84 			"DRM_UT_DRMRES");
85 
86 MODULE_PARM_DESC(config, "option string to pass to driver core");
87 static char *nouveau_config;
88 module_param_named(config, nouveau_config, charp, 0400);
89 
90 MODULE_PARM_DESC(debug, "debug string to pass to driver core");
91 static char *nouveau_debug;
92 module_param_named(debug, nouveau_debug, charp, 0400);
93 
94 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
95 static int nouveau_noaccel = 0;
96 module_param_named(noaccel, nouveau_noaccel, int, 0400);
97 
98 MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
99 		          "0 = disabled, 1 = enabled, 2 = headless)");
100 int nouveau_modeset = -1;
101 module_param_named(modeset, nouveau_modeset, int, 0400);
102 
103 MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)");
104 static int nouveau_atomic = 0;
105 module_param_named(atomic, nouveau_atomic, int, 0400);
106 
107 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
108 static int nouveau_runtime_pm = -1;
109 module_param_named(runpm, nouveau_runtime_pm, int, 0400);
110 
111 static struct drm_driver driver_stub;
112 static struct drm_driver driver_pci;
113 static struct drm_driver driver_platform;
114 
115 static u64
116 nouveau_pci_name(struct pci_dev *pdev)
117 {
118 	u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
119 	name |= pdev->bus->number << 16;
120 	name |= PCI_SLOT(pdev->devfn) << 8;
121 	return name | PCI_FUNC(pdev->devfn);
122 }
123 
124 static u64
125 nouveau_platform_name(struct platform_device *platformdev)
126 {
127 	return platformdev->id;
128 }
129 
130 static u64
131 nouveau_name(struct drm_device *dev)
132 {
133 	if (dev_is_pci(dev->dev))
134 		return nouveau_pci_name(to_pci_dev(dev->dev));
135 	else
136 		return nouveau_platform_name(to_platform_device(dev->dev));
137 }
138 
139 static inline bool
140 nouveau_cli_work_ready(struct dma_fence *fence)
141 {
142 	if (!dma_fence_is_signaled(fence))
143 		return false;
144 	dma_fence_put(fence);
145 	return true;
146 }
147 
148 static void
149 nouveau_cli_work(struct work_struct *w)
150 {
151 	struct nouveau_cli *cli = container_of(w, typeof(*cli), work);
152 	struct nouveau_cli_work *work, *wtmp;
153 	mutex_lock(&cli->lock);
154 	list_for_each_entry_safe(work, wtmp, &cli->worker, head) {
155 		if (!work->fence || nouveau_cli_work_ready(work->fence)) {
156 			list_del(&work->head);
157 			work->func(work);
158 		}
159 	}
160 	mutex_unlock(&cli->lock);
161 }
162 
163 static void
164 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb)
165 {
166 	struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb);
167 	schedule_work(&work->cli->work);
168 }
169 
170 void
171 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,
172 		       struct nouveau_cli_work *work)
173 {
174 	work->fence = dma_fence_get(fence);
175 	work->cli = cli;
176 	mutex_lock(&cli->lock);
177 	list_add_tail(&work->head, &cli->worker);
178 	if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))
179 		nouveau_cli_work_fence(fence, &work->cb);
180 	mutex_unlock(&cli->lock);
181 }
182 
183 static void
184 nouveau_cli_fini(struct nouveau_cli *cli)
185 {
186 	/* All our channels are dead now, which means all the fences they
187 	 * own are signalled, and all callback functions have been called.
188 	 *
189 	 * So, after flushing the workqueue, there should be nothing left.
190 	 */
191 	flush_work(&cli->work);
192 	WARN_ON(!list_empty(&cli->worker));
193 
194 	usif_client_fini(cli);
195 	nouveau_vmm_fini(&cli->svm);
196 	nouveau_vmm_fini(&cli->vmm);
197 	nvif_mmu_dtor(&cli->mmu);
198 	nvif_device_dtor(&cli->device);
199 	mutex_lock(&cli->drm->master.lock);
200 	nvif_client_dtor(&cli->base);
201 	mutex_unlock(&cli->drm->master.lock);
202 }
203 
204 static int
205 nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
206 		 struct nouveau_cli *cli)
207 {
208 	static const struct nvif_mclass
209 	mems[] = {
210 		{ NVIF_CLASS_MEM_GF100, -1 },
211 		{ NVIF_CLASS_MEM_NV50 , -1 },
212 		{ NVIF_CLASS_MEM_NV04 , -1 },
213 		{}
214 	};
215 	static const struct nvif_mclass
216 	mmus[] = {
217 		{ NVIF_CLASS_MMU_GF100, -1 },
218 		{ NVIF_CLASS_MMU_NV50 , -1 },
219 		{ NVIF_CLASS_MMU_NV04 , -1 },
220 		{}
221 	};
222 	static const struct nvif_mclass
223 	vmms[] = {
224 		{ NVIF_CLASS_VMM_GP100, -1 },
225 		{ NVIF_CLASS_VMM_GM200, -1 },
226 		{ NVIF_CLASS_VMM_GF100, -1 },
227 		{ NVIF_CLASS_VMM_NV50 , -1 },
228 		{ NVIF_CLASS_VMM_NV04 , -1 },
229 		{}
230 	};
231 	u64 device = nouveau_name(drm->dev);
232 	int ret;
233 
234 	snprintf(cli->name, sizeof(cli->name), "%s", sname);
235 	cli->drm = drm;
236 	mutex_init(&cli->mutex);
237 	usif_client_init(cli);
238 
239 	INIT_WORK(&cli->work, nouveau_cli_work);
240 	INIT_LIST_HEAD(&cli->worker);
241 	mutex_init(&cli->lock);
242 
243 	if (cli == &drm->master) {
244 		ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
245 				       cli->name, device, &cli->base);
246 	} else {
247 		mutex_lock(&drm->master.lock);
248 		ret = nvif_client_ctor(&drm->master.base, cli->name, device,
249 				       &cli->base);
250 		mutex_unlock(&drm->master.lock);
251 	}
252 	if (ret) {
253 		NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret);
254 		goto done;
255 	}
256 
257 	ret = nvif_device_ctor(&cli->base.object, "drmDevice", 0, NV_DEVICE,
258 			       &(struct nv_device_v0) {
259 					.device = ~0,
260 					.priv = true,
261 			       }, sizeof(struct nv_device_v0),
262 			       &cli->device);
263 	if (ret) {
264 		NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret);
265 		goto done;
266 	}
267 
268 	ret = nvif_mclass(&cli->device.object, mmus);
269 	if (ret < 0) {
270 		NV_PRINTK(err, cli, "No supported MMU class\n");
271 		goto done;
272 	}
273 
274 	ret = nvif_mmu_ctor(&cli->device.object, "drmMmu", mmus[ret].oclass,
275 			    &cli->mmu);
276 	if (ret) {
277 		NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret);
278 		goto done;
279 	}
280 
281 	ret = nvif_mclass(&cli->mmu.object, vmms);
282 	if (ret < 0) {
283 		NV_PRINTK(err, cli, "No supported VMM class\n");
284 		goto done;
285 	}
286 
287 	ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm);
288 	if (ret) {
289 		NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret);
290 		goto done;
291 	}
292 
293 	ret = nvif_mclass(&cli->mmu.object, mems);
294 	if (ret < 0) {
295 		NV_PRINTK(err, cli, "No supported MEM class\n");
296 		goto done;
297 	}
298 
299 	cli->mem = &mems[ret];
300 	return 0;
301 done:
302 	if (ret)
303 		nouveau_cli_fini(cli);
304 	return ret;
305 }
306 
307 static void
308 nouveau_accel_ce_fini(struct nouveau_drm *drm)
309 {
310 	nouveau_channel_idle(drm->cechan);
311 	nvif_object_dtor(&drm->ttm.copy);
312 	nouveau_channel_del(&drm->cechan);
313 }
314 
315 static void
316 nouveau_accel_ce_init(struct nouveau_drm *drm)
317 {
318 	struct nvif_device *device = &drm->client.device;
319 	int ret = 0;
320 
321 	/* Allocate channel that has access to a (preferably async) copy
322 	 * engine, to use for TTM buffer moves.
323 	 */
324 	if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
325 		ret = nouveau_channel_new(drm, device,
326 					  nvif_fifo_runlist_ce(device), 0,
327 					  true, &drm->cechan);
328 	} else
329 	if (device->info.chipset >= 0xa3 &&
330 	    device->info.chipset != 0xaa &&
331 	    device->info.chipset != 0xac) {
332 		/* Prior to Kepler, there's only a single runlist, so all
333 		 * engines can be accessed from any channel.
334 		 *
335 		 * We still want to use a separate channel though.
336 		 */
337 		ret = nouveau_channel_new(drm, device, NvDmaFB, NvDmaTT, false,
338 					  &drm->cechan);
339 	}
340 
341 	if (ret)
342 		NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
343 }
344 
345 static void
346 nouveau_accel_gr_fini(struct nouveau_drm *drm)
347 {
348 	nouveau_channel_idle(drm->channel);
349 	nvif_object_dtor(&drm->ntfy);
350 	nvkm_gpuobj_del(&drm->notify);
351 	nouveau_channel_del(&drm->channel);
352 }
353 
354 static void
355 nouveau_accel_gr_init(struct nouveau_drm *drm)
356 {
357 	struct nvif_device *device = &drm->client.device;
358 	u32 arg0, arg1;
359 	int ret;
360 
361 	if (device->info.family >= NV_DEVICE_INFO_V0_AMPERE)
362 		return;
363 
364 	/* Allocate channel that has access to the graphics engine. */
365 	if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
366 		arg0 = nvif_fifo_runlist(device, NV_DEVICE_HOST_RUNLIST_ENGINES_GR);
367 		arg1 = 1;
368 	} else {
369 		arg0 = NvDmaFB;
370 		arg1 = NvDmaTT;
371 	}
372 
373 	ret = nouveau_channel_new(drm, device, arg0, arg1, false,
374 				  &drm->channel);
375 	if (ret) {
376 		NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
377 		nouveau_accel_gr_fini(drm);
378 		return;
379 	}
380 
381 	/* A SW class is used on pre-NV50 HW to assist with handling the
382 	 * synchronisation of page flips, as well as to implement fences
383 	 * on TNT/TNT2 HW that lacks any kind of support in host.
384 	 */
385 	if (!drm->channel->nvsw.client && device->info.family < NV_DEVICE_INFO_V0_TESLA) {
386 		ret = nvif_object_ctor(&drm->channel->user, "drmNvsw",
387 				       NVDRM_NVSW, nouveau_abi16_swclass(drm),
388 				       NULL, 0, &drm->channel->nvsw);
389 		if (ret == 0) {
390 			struct nvif_push *push = drm->channel->chan.push;
391 			ret = PUSH_WAIT(push, 2);
392 			if (ret == 0)
393 				PUSH_NVSQ(push, NV_SW, 0x0000, drm->channel->nvsw.handle);
394 		}
395 
396 		if (ret) {
397 			NV_ERROR(drm, "failed to allocate sw class, %d\n", ret);
398 			nouveau_accel_gr_fini(drm);
399 			return;
400 		}
401 	}
402 
403 	/* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason,
404 	 * even if notification is never requested, so, allocate a ctxdma on
405 	 * any GPU where it's possible we'll end up using M2MF for BO moves.
406 	 */
407 	if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
408 		ret = nvkm_gpuobj_new(nvxx_device(device), 32, 0, false, NULL,
409 				      &drm->notify);
410 		if (ret) {
411 			NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
412 			nouveau_accel_gr_fini(drm);
413 			return;
414 		}
415 
416 		ret = nvif_object_ctor(&drm->channel->user, "drmM2mfNtfy",
417 				       NvNotify0, NV_DMA_IN_MEMORY,
418 				       &(struct nv_dma_v0) {
419 						.target = NV_DMA_V0_TARGET_VRAM,
420 						.access = NV_DMA_V0_ACCESS_RDWR,
421 						.start = drm->notify->addr,
422 						.limit = drm->notify->addr + 31
423 				       }, sizeof(struct nv_dma_v0),
424 				       &drm->ntfy);
425 		if (ret) {
426 			nouveau_accel_gr_fini(drm);
427 			return;
428 		}
429 	}
430 }
431 
432 static void
433 nouveau_accel_fini(struct nouveau_drm *drm)
434 {
435 	nouveau_accel_ce_fini(drm);
436 	nouveau_accel_gr_fini(drm);
437 	if (drm->fence)
438 		nouveau_fence(drm)->dtor(drm);
439 }
440 
441 static void
442 nouveau_accel_init(struct nouveau_drm *drm)
443 {
444 	struct nvif_device *device = &drm->client.device;
445 	struct nvif_sclass *sclass;
446 	int ret, i, n;
447 
448 	if (nouveau_noaccel)
449 		return;
450 
451 	/* Initialise global support for channels, and synchronisation. */
452 	ret = nouveau_channels_init(drm);
453 	if (ret)
454 		return;
455 
456 	/*XXX: this is crap, but the fence/channel stuff is a little
457 	 *     backwards in some places.  this will be fixed.
458 	 */
459 	ret = n = nvif_object_sclass_get(&device->object, &sclass);
460 	if (ret < 0)
461 		return;
462 
463 	for (ret = -ENOSYS, i = 0; i < n; i++) {
464 		switch (sclass[i].oclass) {
465 		case NV03_CHANNEL_DMA:
466 			ret = nv04_fence_create(drm);
467 			break;
468 		case NV10_CHANNEL_DMA:
469 			ret = nv10_fence_create(drm);
470 			break;
471 		case NV17_CHANNEL_DMA:
472 		case NV40_CHANNEL_DMA:
473 			ret = nv17_fence_create(drm);
474 			break;
475 		case NV50_CHANNEL_GPFIFO:
476 			ret = nv50_fence_create(drm);
477 			break;
478 		case G82_CHANNEL_GPFIFO:
479 			ret = nv84_fence_create(drm);
480 			break;
481 		case FERMI_CHANNEL_GPFIFO:
482 		case KEPLER_CHANNEL_GPFIFO_A:
483 		case KEPLER_CHANNEL_GPFIFO_B:
484 		case MAXWELL_CHANNEL_GPFIFO_A:
485 		case PASCAL_CHANNEL_GPFIFO_A:
486 		case VOLTA_CHANNEL_GPFIFO_A:
487 		case TURING_CHANNEL_GPFIFO_A:
488 		case AMPERE_CHANNEL_GPFIFO_B:
489 			ret = nvc0_fence_create(drm);
490 			break;
491 		default:
492 			break;
493 		}
494 	}
495 
496 	nvif_object_sclass_put(&sclass);
497 	if (ret) {
498 		NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
499 		nouveau_accel_fini(drm);
500 		return;
501 	}
502 
503 	/* Volta requires access to a doorbell register for kickoff. */
504 	if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) {
505 		ret = nvif_user_ctor(device, "drmUsermode");
506 		if (ret)
507 			return;
508 	}
509 
510 	/* Allocate channels we need to support various functions. */
511 	nouveau_accel_gr_init(drm);
512 	nouveau_accel_ce_init(drm);
513 
514 	/* Initialise accelerated TTM buffer moves. */
515 	nouveau_bo_move_init(drm);
516 }
517 
518 static void __printf(2, 3)
519 nouveau_drm_errorf(struct nvif_object *object, const char *fmt, ...)
520 {
521 	struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent);
522 	struct va_format vaf;
523 	va_list va;
524 
525 	va_start(va, fmt);
526 	vaf.fmt = fmt;
527 	vaf.va = &va;
528 	NV_ERROR(drm, "%pV", &vaf);
529 	va_end(va);
530 }
531 
532 static void __printf(2, 3)
533 nouveau_drm_debugf(struct nvif_object *object, const char *fmt, ...)
534 {
535 	struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent);
536 	struct va_format vaf;
537 	va_list va;
538 
539 	va_start(va, fmt);
540 	vaf.fmt = fmt;
541 	vaf.va = &va;
542 	NV_DEBUG(drm, "%pV", &vaf);
543 	va_end(va);
544 }
545 
546 static const struct nvif_parent_func
547 nouveau_parent = {
548 	.debugf = nouveau_drm_debugf,
549 	.errorf = nouveau_drm_errorf,
550 };
551 
552 static int
553 nouveau_drm_device_init(struct drm_device *dev)
554 {
555 	struct nouveau_drm *drm;
556 	int ret;
557 
558 	if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
559 		return -ENOMEM;
560 	dev->dev_private = drm;
561 	drm->dev = dev;
562 
563 	nvif_parent_ctor(&nouveau_parent, &drm->parent);
564 	drm->master.base.object.parent = &drm->parent;
565 
566 	ret = nouveau_cli_init(drm, "DRM-master", &drm->master);
567 	if (ret)
568 		goto fail_alloc;
569 
570 	ret = nouveau_cli_init(drm, "DRM", &drm->client);
571 	if (ret)
572 		goto fail_master;
573 
574 	nvxx_client(&drm->client.base)->debug =
575 		nvkm_dbgopt(nouveau_debug, "DRM");
576 
577 	INIT_LIST_HEAD(&drm->clients);
578 	mutex_init(&drm->clients_lock);
579 	spin_lock_init(&drm->tile.lock);
580 
581 	/* workaround an odd issue on nvc1 by disabling the device's
582 	 * nosnoop capability.  hopefully won't cause issues until a
583 	 * better fix is found - assuming there is one...
584 	 */
585 	if (drm->client.device.info.chipset == 0xc1)
586 		nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
587 
588 	nouveau_vga_init(drm);
589 
590 	ret = nouveau_ttm_init(drm);
591 	if (ret)
592 		goto fail_ttm;
593 
594 	ret = nouveau_bios_init(dev);
595 	if (ret)
596 		goto fail_bios;
597 
598 	nouveau_accel_init(drm);
599 
600 	ret = nouveau_display_create(dev);
601 	if (ret)
602 		goto fail_dispctor;
603 
604 	if (dev->mode_config.num_crtc) {
605 		ret = nouveau_display_init(dev, false, false);
606 		if (ret)
607 			goto fail_dispinit;
608 	}
609 
610 	nouveau_debugfs_init(drm);
611 	nouveau_hwmon_init(dev);
612 	nouveau_svm_init(drm);
613 	nouveau_dmem_init(drm);
614 	nouveau_fbcon_init(dev);
615 	nouveau_led_init(dev);
616 
617 	if (nouveau_pmops_runtime()) {
618 		pm_runtime_use_autosuspend(dev->dev);
619 		pm_runtime_set_autosuspend_delay(dev->dev, 5000);
620 		pm_runtime_set_active(dev->dev);
621 		pm_runtime_allow(dev->dev);
622 		pm_runtime_mark_last_busy(dev->dev);
623 		pm_runtime_put(dev->dev);
624 	}
625 
626 	return 0;
627 
628 fail_dispinit:
629 	nouveau_display_destroy(dev);
630 fail_dispctor:
631 	nouveau_accel_fini(drm);
632 	nouveau_bios_takedown(dev);
633 fail_bios:
634 	nouveau_ttm_fini(drm);
635 fail_ttm:
636 	nouveau_vga_fini(drm);
637 	nouveau_cli_fini(&drm->client);
638 fail_master:
639 	nouveau_cli_fini(&drm->master);
640 fail_alloc:
641 	nvif_parent_dtor(&drm->parent);
642 	kfree(drm);
643 	return ret;
644 }
645 
646 static void
647 nouveau_drm_device_fini(struct drm_device *dev)
648 {
649 	struct nouveau_cli *cli, *temp_cli;
650 	struct nouveau_drm *drm = nouveau_drm(dev);
651 
652 	if (nouveau_pmops_runtime()) {
653 		pm_runtime_get_sync(dev->dev);
654 		pm_runtime_forbid(dev->dev);
655 	}
656 
657 	nouveau_led_fini(dev);
658 	nouveau_fbcon_fini(dev);
659 	nouveau_dmem_fini(drm);
660 	nouveau_svm_fini(drm);
661 	nouveau_hwmon_fini(dev);
662 	nouveau_debugfs_fini(drm);
663 
664 	if (dev->mode_config.num_crtc)
665 		nouveau_display_fini(dev, false, false);
666 	nouveau_display_destroy(dev);
667 
668 	nouveau_accel_fini(drm);
669 	nouveau_bios_takedown(dev);
670 
671 	nouveau_ttm_fini(drm);
672 	nouveau_vga_fini(drm);
673 
674 	/*
675 	 * There may be existing clients from as-yet unclosed files. For now,
676 	 * clean them up here rather than deferring until the file is closed,
677 	 * but this likely not correct if we want to support hot-unplugging
678 	 * properly.
679 	 */
680 	mutex_lock(&drm->clients_lock);
681 	list_for_each_entry_safe(cli, temp_cli, &drm->clients, head) {
682 		list_del(&cli->head);
683 		mutex_lock(&cli->mutex);
684 		if (cli->abi16)
685 			nouveau_abi16_fini(cli->abi16);
686 		mutex_unlock(&cli->mutex);
687 		nouveau_cli_fini(cli);
688 		kfree(cli);
689 	}
690 	mutex_unlock(&drm->clients_lock);
691 
692 	nouveau_cli_fini(&drm->client);
693 	nouveau_cli_fini(&drm->master);
694 	nvif_parent_dtor(&drm->parent);
695 	mutex_destroy(&drm->clients_lock);
696 	kfree(drm);
697 }
698 
699 /*
700  * On some Intel PCIe bridge controllers doing a
701  * D0 -> D3hot -> D3cold -> D0 sequence causes Nvidia GPUs to not reappear.
702  * Skipping the intermediate D3hot step seems to make it work again. This is
703  * probably caused by not meeting the expectation the involved AML code has
704  * when the GPU is put into D3hot state before invoking it.
705  *
706  * This leads to various manifestations of this issue:
707  *  - AML code execution to power on the GPU hits an infinite loop (as the
708  *    code waits on device memory to change).
709  *  - kernel crashes, as all PCI reads return -1, which most code isn't able
710  *    to handle well enough.
711  *
712  * In all cases dmesg will contain at least one line like this:
713  * 'nouveau 0000:01:00.0: Refused to change power state, currently in D3'
714  * followed by a lot of nouveau timeouts.
715  *
716  * In the \_SB.PCI0.PEG0.PG00._OFF code deeper down writes bit 0x80 to the not
717  * documented PCI config space register 0x248 of the Intel PCIe bridge
718  * controller (0x1901) in order to change the state of the PCIe link between
719  * the PCIe port and the GPU. There are alternative code paths using other
720  * registers, which seem to work fine (executed pre Windows 8):
721  *  - 0xbc bit 0x20 (publicly available documentation claims 'reserved')
722  *  - 0xb0 bit 0x10 (link disable)
723  * Changing the conditions inside the firmware by poking into the relevant
724  * addresses does resolve the issue, but it seemed to be ACPI private memory
725  * and not any device accessible memory at all, so there is no portable way of
726  * changing the conditions.
727  * On a XPS 9560 that means bits [0,3] on \CPEX need to be cleared.
728  *
729  * The only systems where this behavior can be seen are hybrid graphics laptops
730  * with a secondary Nvidia Maxwell, Pascal or Turing GPU. It's unclear whether
731  * this issue only occurs in combination with listed Intel PCIe bridge
732  * controllers and the mentioned GPUs or other devices as well.
733  *
734  * documentation on the PCIe bridge controller can be found in the
735  * "7th Generation Intel® Processor Families for H Platforms Datasheet Volume 2"
736  * Section "12 PCI Express* Controller (x16) Registers"
737  */
738 
739 static void quirk_broken_nv_runpm(struct pci_dev *pdev)
740 {
741 	struct drm_device *dev = pci_get_drvdata(pdev);
742 	struct nouveau_drm *drm = nouveau_drm(dev);
743 	struct pci_dev *bridge = pci_upstream_bridge(pdev);
744 
745 	if (!bridge || bridge->vendor != PCI_VENDOR_ID_INTEL)
746 		return;
747 
748 	switch (bridge->device) {
749 	case 0x1901:
750 		drm->old_pm_cap = pdev->pm_cap;
751 		pdev->pm_cap = 0;
752 		NV_INFO(drm, "Disabling PCI power management to avoid bug\n");
753 		break;
754 	}
755 }
756 
757 static int nouveau_drm_probe(struct pci_dev *pdev,
758 			     const struct pci_device_id *pent)
759 {
760 	struct nvkm_device *device;
761 	struct drm_device *drm_dev;
762 	int ret;
763 
764 	if (vga_switcheroo_client_probe_defer(pdev))
765 		return -EPROBE_DEFER;
766 
767 	/* We need to check that the chipset is supported before booting
768 	 * fbdev off the hardware, as there's no way to put it back.
769 	 */
770 	ret = nvkm_device_pci_new(pdev, nouveau_config, "error",
771 				  true, false, 0, &device);
772 	if (ret)
773 		return ret;
774 
775 	nvkm_device_del(&device);
776 
777 	/* Remove conflicting drivers (vesafb, efifb etc). */
778 	ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &driver_pci);
779 	if (ret)
780 		return ret;
781 
782 	ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
783 				  true, true, ~0ULL, &device);
784 	if (ret)
785 		return ret;
786 
787 	pci_set_master(pdev);
788 
789 	if (nouveau_atomic)
790 		driver_pci.driver_features |= DRIVER_ATOMIC;
791 
792 	drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev);
793 	if (IS_ERR(drm_dev)) {
794 		ret = PTR_ERR(drm_dev);
795 		goto fail_nvkm;
796 	}
797 
798 	ret = pci_enable_device(pdev);
799 	if (ret)
800 		goto fail_drm;
801 
802 	pci_set_drvdata(pdev, drm_dev);
803 
804 	ret = nouveau_drm_device_init(drm_dev);
805 	if (ret)
806 		goto fail_pci;
807 
808 	ret = drm_dev_register(drm_dev, pent->driver_data);
809 	if (ret)
810 		goto fail_drm_dev_init;
811 
812 	quirk_broken_nv_runpm(pdev);
813 	return 0;
814 
815 fail_drm_dev_init:
816 	nouveau_drm_device_fini(drm_dev);
817 fail_pci:
818 	pci_disable_device(pdev);
819 fail_drm:
820 	drm_dev_put(drm_dev);
821 fail_nvkm:
822 	nvkm_device_del(&device);
823 	return ret;
824 }
825 
826 void
827 nouveau_drm_device_remove(struct drm_device *dev)
828 {
829 	struct nouveau_drm *drm = nouveau_drm(dev);
830 	struct nvkm_client *client;
831 	struct nvkm_device *device;
832 
833 	drm_dev_unplug(dev);
834 
835 	client = nvxx_client(&drm->client.base);
836 	device = nvkm_device_find(client->device);
837 
838 	nouveau_drm_device_fini(dev);
839 	drm_dev_put(dev);
840 	nvkm_device_del(&device);
841 }
842 
843 static void
844 nouveau_drm_remove(struct pci_dev *pdev)
845 {
846 	struct drm_device *dev = pci_get_drvdata(pdev);
847 	struct nouveau_drm *drm = nouveau_drm(dev);
848 
849 	/* revert our workaround */
850 	if (drm->old_pm_cap)
851 		pdev->pm_cap = drm->old_pm_cap;
852 	nouveau_drm_device_remove(dev);
853 	pci_disable_device(pdev);
854 }
855 
856 static int
857 nouveau_do_suspend(struct drm_device *dev, bool runtime)
858 {
859 	struct nouveau_drm *drm = nouveau_drm(dev);
860 	struct ttm_resource_manager *man;
861 	int ret;
862 
863 	nouveau_svm_suspend(drm);
864 	nouveau_dmem_suspend(drm);
865 	nouveau_led_suspend(dev);
866 
867 	if (dev->mode_config.num_crtc) {
868 		NV_DEBUG(drm, "suspending console...\n");
869 		nouveau_fbcon_set_suspend(dev, 1);
870 		NV_DEBUG(drm, "suspending display...\n");
871 		ret = nouveau_display_suspend(dev, runtime);
872 		if (ret)
873 			return ret;
874 	}
875 
876 	NV_DEBUG(drm, "evicting buffers...\n");
877 
878 	man = ttm_manager_type(&drm->ttm.bdev, TTM_PL_VRAM);
879 	ttm_resource_manager_evict_all(&drm->ttm.bdev, man);
880 
881 	NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
882 	if (drm->cechan) {
883 		ret = nouveau_channel_idle(drm->cechan);
884 		if (ret)
885 			goto fail_display;
886 	}
887 
888 	if (drm->channel) {
889 		ret = nouveau_channel_idle(drm->channel);
890 		if (ret)
891 			goto fail_display;
892 	}
893 
894 	NV_DEBUG(drm, "suspending fence...\n");
895 	if (drm->fence && nouveau_fence(drm)->suspend) {
896 		if (!nouveau_fence(drm)->suspend(drm)) {
897 			ret = -ENOMEM;
898 			goto fail_display;
899 		}
900 	}
901 
902 	NV_DEBUG(drm, "suspending object tree...\n");
903 	ret = nvif_client_suspend(&drm->master.base);
904 	if (ret)
905 		goto fail_client;
906 
907 	return 0;
908 
909 fail_client:
910 	if (drm->fence && nouveau_fence(drm)->resume)
911 		nouveau_fence(drm)->resume(drm);
912 
913 fail_display:
914 	if (dev->mode_config.num_crtc) {
915 		NV_DEBUG(drm, "resuming display...\n");
916 		nouveau_display_resume(dev, runtime);
917 	}
918 	return ret;
919 }
920 
921 static int
922 nouveau_do_resume(struct drm_device *dev, bool runtime)
923 {
924 	int ret = 0;
925 	struct nouveau_drm *drm = nouveau_drm(dev);
926 
927 	NV_DEBUG(drm, "resuming object tree...\n");
928 	ret = nvif_client_resume(&drm->master.base);
929 	if (ret) {
930 		NV_ERROR(drm, "Client resume failed with error: %d\n", ret);
931 		return ret;
932 	}
933 
934 	NV_DEBUG(drm, "resuming fence...\n");
935 	if (drm->fence && nouveau_fence(drm)->resume)
936 		nouveau_fence(drm)->resume(drm);
937 
938 	nouveau_run_vbios_init(dev);
939 
940 	if (dev->mode_config.num_crtc) {
941 		NV_DEBUG(drm, "resuming display...\n");
942 		nouveau_display_resume(dev, runtime);
943 		NV_DEBUG(drm, "resuming console...\n");
944 		nouveau_fbcon_set_suspend(dev, 0);
945 	}
946 
947 	nouveau_led_resume(dev);
948 	nouveau_dmem_resume(drm);
949 	nouveau_svm_resume(drm);
950 	return 0;
951 }
952 
953 int
954 nouveau_pmops_suspend(struct device *dev)
955 {
956 	struct pci_dev *pdev = to_pci_dev(dev);
957 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
958 	int ret;
959 
960 	if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
961 	    drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
962 		return 0;
963 
964 	ret = nouveau_do_suspend(drm_dev, false);
965 	if (ret)
966 		return ret;
967 
968 	pci_save_state(pdev);
969 	pci_disable_device(pdev);
970 	pci_set_power_state(pdev, PCI_D3hot);
971 	udelay(200);
972 	return 0;
973 }
974 
975 int
976 nouveau_pmops_resume(struct device *dev)
977 {
978 	struct pci_dev *pdev = to_pci_dev(dev);
979 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
980 	int ret;
981 
982 	if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
983 	    drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
984 		return 0;
985 
986 	pci_set_power_state(pdev, PCI_D0);
987 	pci_restore_state(pdev);
988 	ret = pci_enable_device(pdev);
989 	if (ret)
990 		return ret;
991 	pci_set_master(pdev);
992 
993 	ret = nouveau_do_resume(drm_dev, false);
994 
995 	/* Monitors may have been connected / disconnected during suspend */
996 	nouveau_display_hpd_resume(drm_dev);
997 
998 	return ret;
999 }
1000 
1001 static int
1002 nouveau_pmops_freeze(struct device *dev)
1003 {
1004 	struct pci_dev *pdev = to_pci_dev(dev);
1005 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
1006 	return nouveau_do_suspend(drm_dev, false);
1007 }
1008 
1009 static int
1010 nouveau_pmops_thaw(struct device *dev)
1011 {
1012 	struct pci_dev *pdev = to_pci_dev(dev);
1013 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
1014 	return nouveau_do_resume(drm_dev, false);
1015 }
1016 
1017 bool
1018 nouveau_pmops_runtime(void)
1019 {
1020 	if (nouveau_runtime_pm == -1)
1021 		return nouveau_is_optimus() || nouveau_is_v1_dsm();
1022 	return nouveau_runtime_pm == 1;
1023 }
1024 
1025 static int
1026 nouveau_pmops_runtime_suspend(struct device *dev)
1027 {
1028 	struct pci_dev *pdev = to_pci_dev(dev);
1029 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
1030 	int ret;
1031 
1032 	if (!nouveau_pmops_runtime()) {
1033 		pm_runtime_forbid(dev);
1034 		return -EBUSY;
1035 	}
1036 
1037 	nouveau_switcheroo_optimus_dsm();
1038 	ret = nouveau_do_suspend(drm_dev, true);
1039 	pci_save_state(pdev);
1040 	pci_disable_device(pdev);
1041 	pci_ignore_hotplug(pdev);
1042 	pci_set_power_state(pdev, PCI_D3cold);
1043 	drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
1044 	return ret;
1045 }
1046 
1047 static int
1048 nouveau_pmops_runtime_resume(struct device *dev)
1049 {
1050 	struct pci_dev *pdev = to_pci_dev(dev);
1051 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
1052 	struct nouveau_drm *drm = nouveau_drm(drm_dev);
1053 	struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
1054 	int ret;
1055 
1056 	if (!nouveau_pmops_runtime()) {
1057 		pm_runtime_forbid(dev);
1058 		return -EBUSY;
1059 	}
1060 
1061 	pci_set_power_state(pdev, PCI_D0);
1062 	pci_restore_state(pdev);
1063 	ret = pci_enable_device(pdev);
1064 	if (ret)
1065 		return ret;
1066 	pci_set_master(pdev);
1067 
1068 	ret = nouveau_do_resume(drm_dev, true);
1069 	if (ret) {
1070 		NV_ERROR(drm, "resume failed with: %d\n", ret);
1071 		return ret;
1072 	}
1073 
1074 	/* do magic */
1075 	nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
1076 	drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
1077 
1078 	/* Monitors may have been connected / disconnected during suspend */
1079 	nouveau_display_hpd_resume(drm_dev);
1080 
1081 	return ret;
1082 }
1083 
1084 static int
1085 nouveau_pmops_runtime_idle(struct device *dev)
1086 {
1087 	if (!nouveau_pmops_runtime()) {
1088 		pm_runtime_forbid(dev);
1089 		return -EBUSY;
1090 	}
1091 
1092 	pm_runtime_mark_last_busy(dev);
1093 	pm_runtime_autosuspend(dev);
1094 	/* we don't want the main rpm_idle to call suspend - we want to autosuspend */
1095 	return 1;
1096 }
1097 
1098 static int
1099 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
1100 {
1101 	struct nouveau_drm *drm = nouveau_drm(dev);
1102 	struct nouveau_cli *cli;
1103 	char name[32], tmpname[TASK_COMM_LEN];
1104 	int ret;
1105 
1106 	/* need to bring up power immediately if opening device */
1107 	ret = pm_runtime_get_sync(dev->dev);
1108 	if (ret < 0 && ret != -EACCES) {
1109 		pm_runtime_put_autosuspend(dev->dev);
1110 		return ret;
1111 	}
1112 
1113 	get_task_comm(tmpname, current);
1114 	snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
1115 
1116 	if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) {
1117 		ret = -ENOMEM;
1118 		goto done;
1119 	}
1120 
1121 	ret = nouveau_cli_init(drm, name, cli);
1122 	if (ret)
1123 		goto done;
1124 
1125 	fpriv->driver_priv = cli;
1126 
1127 	mutex_lock(&drm->clients_lock);
1128 	list_add(&cli->head, &drm->clients);
1129 	mutex_unlock(&drm->clients_lock);
1130 
1131 done:
1132 	if (ret && cli) {
1133 		nouveau_cli_fini(cli);
1134 		kfree(cli);
1135 	}
1136 
1137 	pm_runtime_mark_last_busy(dev->dev);
1138 	pm_runtime_put_autosuspend(dev->dev);
1139 	return ret;
1140 }
1141 
1142 static void
1143 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
1144 {
1145 	struct nouveau_cli *cli = nouveau_cli(fpriv);
1146 	struct nouveau_drm *drm = nouveau_drm(dev);
1147 	int dev_index;
1148 
1149 	/*
1150 	 * The device is gone, and as it currently stands all clients are
1151 	 * cleaned up in the removal codepath. In the future this may change
1152 	 * so that we can support hot-unplugging, but for now we immediately
1153 	 * return to avoid a double-free situation.
1154 	 */
1155 	if (!drm_dev_enter(dev, &dev_index))
1156 		return;
1157 
1158 	pm_runtime_get_sync(dev->dev);
1159 
1160 	mutex_lock(&cli->mutex);
1161 	if (cli->abi16)
1162 		nouveau_abi16_fini(cli->abi16);
1163 	mutex_unlock(&cli->mutex);
1164 
1165 	mutex_lock(&drm->clients_lock);
1166 	list_del(&cli->head);
1167 	mutex_unlock(&drm->clients_lock);
1168 
1169 	nouveau_cli_fini(cli);
1170 	kfree(cli);
1171 	pm_runtime_mark_last_busy(dev->dev);
1172 	pm_runtime_put_autosuspend(dev->dev);
1173 	drm_dev_exit(dev_index);
1174 }
1175 
1176 static const struct drm_ioctl_desc
1177 nouveau_ioctls[] = {
1178 	DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_RENDER_ALLOW),
1179 	DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1180 	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_RENDER_ALLOW),
1181 	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_RENDER_ALLOW),
1182 	DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_RENDER_ALLOW),
1183 	DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_RENDER_ALLOW),
1184 	DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_RENDER_ALLOW),
1185 	DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_INIT, nouveau_svmm_init, DRM_RENDER_ALLOW),
1186 	DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_BIND, nouveau_svmm_bind, DRM_RENDER_ALLOW),
1187 	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_RENDER_ALLOW),
1188 	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_RENDER_ALLOW),
1189 	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_RENDER_ALLOW),
1190 	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_RENDER_ALLOW),
1191 	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_RENDER_ALLOW),
1192 };
1193 
1194 long
1195 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1196 {
1197 	struct drm_file *filp = file->private_data;
1198 	struct drm_device *dev = filp->minor->dev;
1199 	long ret;
1200 
1201 	ret = pm_runtime_get_sync(dev->dev);
1202 	if (ret < 0 && ret != -EACCES) {
1203 		pm_runtime_put_autosuspend(dev->dev);
1204 		return ret;
1205 	}
1206 
1207 	switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
1208 	case DRM_NOUVEAU_NVIF:
1209 		ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
1210 		break;
1211 	default:
1212 		ret = drm_ioctl(file, cmd, arg);
1213 		break;
1214 	}
1215 
1216 	pm_runtime_mark_last_busy(dev->dev);
1217 	pm_runtime_put_autosuspend(dev->dev);
1218 	return ret;
1219 }
1220 
1221 static const struct file_operations
1222 nouveau_driver_fops = {
1223 	.owner = THIS_MODULE,
1224 	.open = drm_open,
1225 	.release = drm_release,
1226 	.unlocked_ioctl = nouveau_drm_ioctl,
1227 	.mmap = drm_gem_mmap,
1228 	.poll = drm_poll,
1229 	.read = drm_read,
1230 #if defined(CONFIG_COMPAT)
1231 	.compat_ioctl = nouveau_compat_ioctl,
1232 #endif
1233 	.llseek = noop_llseek,
1234 };
1235 
1236 static struct drm_driver
1237 driver_stub = {
1238 	.driver_features =
1239 		DRIVER_GEM | DRIVER_MODESET | DRIVER_RENDER
1240 #if defined(CONFIG_NOUVEAU_LEGACY_CTX_SUPPORT)
1241 		| DRIVER_KMS_LEGACY_CONTEXT
1242 #endif
1243 		,
1244 
1245 	.open = nouveau_drm_open,
1246 	.postclose = nouveau_drm_postclose,
1247 	.lastclose = nouveau_vga_lastclose,
1248 
1249 #if defined(CONFIG_DEBUG_FS)
1250 	.debugfs_init = nouveau_drm_debugfs_init,
1251 #endif
1252 
1253 	.ioctls = nouveau_ioctls,
1254 	.num_ioctls = ARRAY_SIZE(nouveau_ioctls),
1255 	.fops = &nouveau_driver_fops,
1256 
1257 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1258 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1259 	.gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
1260 	.gem_prime_mmap = drm_gem_prime_mmap,
1261 
1262 	.dumb_create = nouveau_display_dumb_create,
1263 	.dumb_map_offset = drm_gem_ttm_dumb_map_offset,
1264 
1265 	.name = DRIVER_NAME,
1266 	.desc = DRIVER_DESC,
1267 #ifdef GIT_REVISION
1268 	.date = GIT_REVISION,
1269 #else
1270 	.date = DRIVER_DATE,
1271 #endif
1272 	.major = DRIVER_MAJOR,
1273 	.minor = DRIVER_MINOR,
1274 	.patchlevel = DRIVER_PATCHLEVEL,
1275 };
1276 
1277 static struct pci_device_id
1278 nouveau_drm_pci_table[] = {
1279 	{
1280 		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1281 		.class = PCI_BASE_CLASS_DISPLAY << 16,
1282 		.class_mask  = 0xff << 16,
1283 	},
1284 	{
1285 		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1286 		.class = PCI_BASE_CLASS_DISPLAY << 16,
1287 		.class_mask  = 0xff << 16,
1288 	},
1289 	{}
1290 };
1291 
1292 static void nouveau_display_options(void)
1293 {
1294 	DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1295 
1296 	DRM_DEBUG_DRIVER("... tv_disable   : %d\n", nouveau_tv_disable);
1297 	DRM_DEBUG_DRIVER("... ignorelid    : %d\n", nouveau_ignorelid);
1298 	DRM_DEBUG_DRIVER("... duallink     : %d\n", nouveau_duallink);
1299 	DRM_DEBUG_DRIVER("... nofbaccel    : %d\n", nouveau_nofbaccel);
1300 	DRM_DEBUG_DRIVER("... config       : %s\n", nouveau_config);
1301 	DRM_DEBUG_DRIVER("... debug        : %s\n", nouveau_debug);
1302 	DRM_DEBUG_DRIVER("... noaccel      : %d\n", nouveau_noaccel);
1303 	DRM_DEBUG_DRIVER("... modeset      : %d\n", nouveau_modeset);
1304 	DRM_DEBUG_DRIVER("... runpm        : %d\n", nouveau_runtime_pm);
1305 	DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1306 	DRM_DEBUG_DRIVER("... hdmimhz      : %d\n", nouveau_hdmimhz);
1307 }
1308 
1309 static const struct dev_pm_ops nouveau_pm_ops = {
1310 	.suspend = nouveau_pmops_suspend,
1311 	.resume = nouveau_pmops_resume,
1312 	.freeze = nouveau_pmops_freeze,
1313 	.thaw = nouveau_pmops_thaw,
1314 	.poweroff = nouveau_pmops_freeze,
1315 	.restore = nouveau_pmops_resume,
1316 	.runtime_suspend = nouveau_pmops_runtime_suspend,
1317 	.runtime_resume = nouveau_pmops_runtime_resume,
1318 	.runtime_idle = nouveau_pmops_runtime_idle,
1319 };
1320 
1321 static struct pci_driver
1322 nouveau_drm_pci_driver = {
1323 	.name = "nouveau",
1324 	.id_table = nouveau_drm_pci_table,
1325 	.probe = nouveau_drm_probe,
1326 	.remove = nouveau_drm_remove,
1327 	.driver.pm = &nouveau_pm_ops,
1328 };
1329 
1330 struct drm_device *
1331 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1332 			       struct platform_device *pdev,
1333 			       struct nvkm_device **pdevice)
1334 {
1335 	struct drm_device *drm;
1336 	int err;
1337 
1338 	err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
1339 				    true, true, ~0ULL, pdevice);
1340 	if (err)
1341 		goto err_free;
1342 
1343 	drm = drm_dev_alloc(&driver_platform, &pdev->dev);
1344 	if (IS_ERR(drm)) {
1345 		err = PTR_ERR(drm);
1346 		goto err_free;
1347 	}
1348 
1349 	err = nouveau_drm_device_init(drm);
1350 	if (err)
1351 		goto err_put;
1352 
1353 	platform_set_drvdata(pdev, drm);
1354 
1355 	return drm;
1356 
1357 err_put:
1358 	drm_dev_put(drm);
1359 err_free:
1360 	nvkm_device_del(pdevice);
1361 
1362 	return ERR_PTR(err);
1363 }
1364 
1365 static int __init
1366 nouveau_drm_init(void)
1367 {
1368 	driver_pci = driver_stub;
1369 	driver_platform = driver_stub;
1370 
1371 	nouveau_display_options();
1372 
1373 	if (nouveau_modeset == -1) {
1374 		if (drm_firmware_drivers_only())
1375 			nouveau_modeset = 0;
1376 	}
1377 
1378 	if (!nouveau_modeset)
1379 		return 0;
1380 
1381 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1382 	platform_driver_register(&nouveau_platform_driver);
1383 #endif
1384 
1385 	nouveau_register_dsm_handler();
1386 	nouveau_backlight_ctor();
1387 
1388 #ifdef CONFIG_PCI
1389 	return pci_register_driver(&nouveau_drm_pci_driver);
1390 #else
1391 	return 0;
1392 #endif
1393 }
1394 
1395 static void __exit
1396 nouveau_drm_exit(void)
1397 {
1398 	if (!nouveau_modeset)
1399 		return;
1400 
1401 #ifdef CONFIG_PCI
1402 	pci_unregister_driver(&nouveau_drm_pci_driver);
1403 #endif
1404 	nouveau_backlight_dtor();
1405 	nouveau_unregister_dsm_handler();
1406 
1407 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1408 	platform_driver_unregister(&nouveau_platform_driver);
1409 #endif
1410 	if (IS_ENABLED(CONFIG_DRM_NOUVEAU_SVM))
1411 		mmu_notifier_synchronize();
1412 }
1413 
1414 module_init(nouveau_drm_init);
1415 module_exit(nouveau_drm_exit);
1416 
1417 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
1418 MODULE_AUTHOR(DRIVER_AUTHOR);
1419 MODULE_DESCRIPTION(DRIVER_DESC);
1420 MODULE_LICENSE("GPL and additional rights");
1421