1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 25 #include <linux/console.h> 26 #include <linux/delay.h> 27 #include <linux/module.h> 28 #include <linux/pci.h> 29 #include <linux/pm_runtime.h> 30 #include <linux/vga_switcheroo.h> 31 32 #include <drm/drmP.h> 33 #include <drm/drm_crtc_helper.h> 34 35 #include <core/gpuobj.h> 36 #include <core/option.h> 37 #include <core/pci.h> 38 #include <core/tegra.h> 39 40 #include <nvif/driver.h> 41 #include <nvif/fifo.h> 42 #include <nvif/user.h> 43 44 #include <nvif/class.h> 45 #include <nvif/cl0002.h> 46 #include <nvif/cla06f.h> 47 #include <nvif/if0004.h> 48 49 #include "nouveau_drv.h" 50 #include "nouveau_dma.h" 51 #include "nouveau_ttm.h" 52 #include "nouveau_gem.h" 53 #include "nouveau_vga.h" 54 #include "nouveau_led.h" 55 #include "nouveau_hwmon.h" 56 #include "nouveau_acpi.h" 57 #include "nouveau_bios.h" 58 #include "nouveau_ioctl.h" 59 #include "nouveau_abi16.h" 60 #include "nouveau_fbcon.h" 61 #include "nouveau_fence.h" 62 #include "nouveau_debugfs.h" 63 #include "nouveau_usif.h" 64 #include "nouveau_connector.h" 65 #include "nouveau_platform.h" 66 67 MODULE_PARM_DESC(config, "option string to pass to driver core"); 68 static char *nouveau_config; 69 module_param_named(config, nouveau_config, charp, 0400); 70 71 MODULE_PARM_DESC(debug, "debug string to pass to driver core"); 72 static char *nouveau_debug; 73 module_param_named(debug, nouveau_debug, charp, 0400); 74 75 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); 76 static int nouveau_noaccel = 0; 77 module_param_named(noaccel, nouveau_noaccel, int, 0400); 78 79 MODULE_PARM_DESC(modeset, "enable driver (default: auto, " 80 "0 = disabled, 1 = enabled, 2 = headless)"); 81 int nouveau_modeset = -1; 82 module_param_named(modeset, nouveau_modeset, int, 0400); 83 84 MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)"); 85 static int nouveau_atomic = 0; 86 module_param_named(atomic, nouveau_atomic, int, 0400); 87 88 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); 89 static int nouveau_runtime_pm = -1; 90 module_param_named(runpm, nouveau_runtime_pm, int, 0400); 91 92 static struct drm_driver driver_stub; 93 static struct drm_driver driver_pci; 94 static struct drm_driver driver_platform; 95 96 static u64 97 nouveau_pci_name(struct pci_dev *pdev) 98 { 99 u64 name = (u64)pci_domain_nr(pdev->bus) << 32; 100 name |= pdev->bus->number << 16; 101 name |= PCI_SLOT(pdev->devfn) << 8; 102 return name | PCI_FUNC(pdev->devfn); 103 } 104 105 static u64 106 nouveau_platform_name(struct platform_device *platformdev) 107 { 108 return platformdev->id; 109 } 110 111 static u64 112 nouveau_name(struct drm_device *dev) 113 { 114 if (dev->pdev) 115 return nouveau_pci_name(dev->pdev); 116 else 117 return nouveau_platform_name(to_platform_device(dev->dev)); 118 } 119 120 static inline bool 121 nouveau_cli_work_ready(struct dma_fence *fence) 122 { 123 if (!dma_fence_is_signaled(fence)) 124 return false; 125 dma_fence_put(fence); 126 return true; 127 } 128 129 static void 130 nouveau_cli_work(struct work_struct *w) 131 { 132 struct nouveau_cli *cli = container_of(w, typeof(*cli), work); 133 struct nouveau_cli_work *work, *wtmp; 134 mutex_lock(&cli->lock); 135 list_for_each_entry_safe(work, wtmp, &cli->worker, head) { 136 if (!work->fence || nouveau_cli_work_ready(work->fence)) { 137 list_del(&work->head); 138 work->func(work); 139 } 140 } 141 mutex_unlock(&cli->lock); 142 } 143 144 static void 145 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb) 146 { 147 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb); 148 schedule_work(&work->cli->work); 149 } 150 151 void 152 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence, 153 struct nouveau_cli_work *work) 154 { 155 work->fence = dma_fence_get(fence); 156 work->cli = cli; 157 mutex_lock(&cli->lock); 158 list_add_tail(&work->head, &cli->worker); 159 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence)) 160 nouveau_cli_work_fence(fence, &work->cb); 161 mutex_unlock(&cli->lock); 162 } 163 164 static void 165 nouveau_cli_fini(struct nouveau_cli *cli) 166 { 167 /* All our channels are dead now, which means all the fences they 168 * own are signalled, and all callback functions have been called. 169 * 170 * So, after flushing the workqueue, there should be nothing left. 171 */ 172 flush_work(&cli->work); 173 WARN_ON(!list_empty(&cli->worker)); 174 175 usif_client_fini(cli); 176 nouveau_vmm_fini(&cli->vmm); 177 nvif_mmu_fini(&cli->mmu); 178 nvif_device_fini(&cli->device); 179 mutex_lock(&cli->drm->master.lock); 180 nvif_client_fini(&cli->base); 181 mutex_unlock(&cli->drm->master.lock); 182 } 183 184 static int 185 nouveau_cli_init(struct nouveau_drm *drm, const char *sname, 186 struct nouveau_cli *cli) 187 { 188 static const struct nvif_mclass 189 mems[] = { 190 { NVIF_CLASS_MEM_GF100, -1 }, 191 { NVIF_CLASS_MEM_NV50 , -1 }, 192 { NVIF_CLASS_MEM_NV04 , -1 }, 193 {} 194 }; 195 static const struct nvif_mclass 196 mmus[] = { 197 { NVIF_CLASS_MMU_GF100, -1 }, 198 { NVIF_CLASS_MMU_NV50 , -1 }, 199 { NVIF_CLASS_MMU_NV04 , -1 }, 200 {} 201 }; 202 static const struct nvif_mclass 203 vmms[] = { 204 { NVIF_CLASS_VMM_GP100, -1 }, 205 { NVIF_CLASS_VMM_GM200, -1 }, 206 { NVIF_CLASS_VMM_GF100, -1 }, 207 { NVIF_CLASS_VMM_NV50 , -1 }, 208 { NVIF_CLASS_VMM_NV04 , -1 }, 209 {} 210 }; 211 u64 device = nouveau_name(drm->dev); 212 int ret; 213 214 snprintf(cli->name, sizeof(cli->name), "%s", sname); 215 cli->drm = drm; 216 mutex_init(&cli->mutex); 217 usif_client_init(cli); 218 219 INIT_WORK(&cli->work, nouveau_cli_work); 220 INIT_LIST_HEAD(&cli->worker); 221 mutex_init(&cli->lock); 222 223 if (cli == &drm->master) { 224 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug, 225 cli->name, device, &cli->base); 226 } else { 227 mutex_lock(&drm->master.lock); 228 ret = nvif_client_init(&drm->master.base, cli->name, device, 229 &cli->base); 230 mutex_unlock(&drm->master.lock); 231 } 232 if (ret) { 233 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret); 234 goto done; 235 } 236 237 ret = nvif_device_init(&cli->base.object, 0, NV_DEVICE, 238 &(struct nv_device_v0) { 239 .device = ~0, 240 }, sizeof(struct nv_device_v0), 241 &cli->device); 242 if (ret) { 243 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret); 244 goto done; 245 } 246 247 ret = nvif_mclass(&cli->device.object, mmus); 248 if (ret < 0) { 249 NV_PRINTK(err, cli, "No supported MMU class\n"); 250 goto done; 251 } 252 253 ret = nvif_mmu_init(&cli->device.object, mmus[ret].oclass, &cli->mmu); 254 if (ret) { 255 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret); 256 goto done; 257 } 258 259 ret = nvif_mclass(&cli->mmu.object, vmms); 260 if (ret < 0) { 261 NV_PRINTK(err, cli, "No supported VMM class\n"); 262 goto done; 263 } 264 265 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm); 266 if (ret) { 267 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret); 268 goto done; 269 } 270 271 ret = nvif_mclass(&cli->mmu.object, mems); 272 if (ret < 0) { 273 NV_PRINTK(err, cli, "No supported MEM class\n"); 274 goto done; 275 } 276 277 cli->mem = &mems[ret]; 278 return 0; 279 done: 280 if (ret) 281 nouveau_cli_fini(cli); 282 return ret; 283 } 284 285 static void 286 nouveau_accel_fini(struct nouveau_drm *drm) 287 { 288 nouveau_channel_idle(drm->channel); 289 nvif_object_fini(&drm->ntfy); 290 nvkm_gpuobj_del(&drm->notify); 291 nvif_notify_fini(&drm->flip); 292 nvif_object_fini(&drm->nvsw); 293 nouveau_channel_del(&drm->channel); 294 295 nouveau_channel_idle(drm->cechan); 296 nvif_object_fini(&drm->ttm.copy); 297 nouveau_channel_del(&drm->cechan); 298 299 if (drm->fence) 300 nouveau_fence(drm)->dtor(drm); 301 } 302 303 static void 304 nouveau_accel_init(struct nouveau_drm *drm) 305 { 306 struct nvif_device *device = &drm->client.device; 307 struct nvif_sclass *sclass; 308 u32 arg0, arg1; 309 int ret, i, n; 310 311 if (nouveau_noaccel) 312 return; 313 314 ret = nouveau_channels_init(drm); 315 if (ret) 316 return; 317 318 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) { 319 ret = nvif_user_init(device); 320 if (ret) 321 return; 322 } 323 324 /* initialise synchronisation routines */ 325 /*XXX: this is crap, but the fence/channel stuff is a little 326 * backwards in some places. this will be fixed. 327 */ 328 ret = n = nvif_object_sclass_get(&device->object, &sclass); 329 if (ret < 0) 330 return; 331 332 for (ret = -ENOSYS, i = 0; i < n; i++) { 333 switch (sclass[i].oclass) { 334 case NV03_CHANNEL_DMA: 335 ret = nv04_fence_create(drm); 336 break; 337 case NV10_CHANNEL_DMA: 338 ret = nv10_fence_create(drm); 339 break; 340 case NV17_CHANNEL_DMA: 341 case NV40_CHANNEL_DMA: 342 ret = nv17_fence_create(drm); 343 break; 344 case NV50_CHANNEL_GPFIFO: 345 ret = nv50_fence_create(drm); 346 break; 347 case G82_CHANNEL_GPFIFO: 348 ret = nv84_fence_create(drm); 349 break; 350 case FERMI_CHANNEL_GPFIFO: 351 case KEPLER_CHANNEL_GPFIFO_A: 352 case KEPLER_CHANNEL_GPFIFO_B: 353 case MAXWELL_CHANNEL_GPFIFO_A: 354 case PASCAL_CHANNEL_GPFIFO_A: 355 case VOLTA_CHANNEL_GPFIFO_A: 356 ret = nvc0_fence_create(drm); 357 break; 358 default: 359 break; 360 } 361 } 362 363 nvif_object_sclass_put(&sclass); 364 if (ret) { 365 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); 366 nouveau_accel_fini(drm); 367 return; 368 } 369 370 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { 371 ret = nouveau_channel_new(drm, &drm->client.device, 372 nvif_fifo_runlist_ce(device), 0, 373 &drm->cechan); 374 if (ret) 375 NV_ERROR(drm, "failed to create ce channel, %d\n", ret); 376 377 arg0 = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_GR); 378 arg1 = 1; 379 } else 380 if (device->info.chipset >= 0xa3 && 381 device->info.chipset != 0xaa && 382 device->info.chipset != 0xac) { 383 ret = nouveau_channel_new(drm, &drm->client.device, 384 NvDmaFB, NvDmaTT, &drm->cechan); 385 if (ret) 386 NV_ERROR(drm, "failed to create ce channel, %d\n", ret); 387 388 arg0 = NvDmaFB; 389 arg1 = NvDmaTT; 390 } else { 391 arg0 = NvDmaFB; 392 arg1 = NvDmaTT; 393 } 394 395 ret = nouveau_channel_new(drm, &drm->client.device, 396 arg0, arg1, &drm->channel); 397 if (ret) { 398 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); 399 nouveau_accel_fini(drm); 400 return; 401 } 402 403 if (device->info.family < NV_DEVICE_INFO_V0_TESLA) { 404 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW, 405 nouveau_abi16_swclass(drm), NULL, 0, 406 &drm->nvsw); 407 if (ret == 0) { 408 ret = RING_SPACE(drm->channel, 2); 409 if (ret == 0) { 410 BEGIN_NV04(drm->channel, NvSubSw, 0, 1); 411 OUT_RING (drm->channel, drm->nvsw.handle); 412 } 413 414 ret = nvif_notify_init(&drm->nvsw, 415 nouveau_flip_complete, 416 false, NV04_NVSW_NTFY_UEVENT, 417 NULL, 0, 0, &drm->flip); 418 if (ret == 0) 419 ret = nvif_notify_get(&drm->flip); 420 if (ret) { 421 nouveau_accel_fini(drm); 422 return; 423 } 424 } 425 426 if (ret) { 427 NV_ERROR(drm, "failed to allocate sw class, %d\n", ret); 428 nouveau_accel_fini(drm); 429 return; 430 } 431 } 432 433 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { 434 ret = nvkm_gpuobj_new(nvxx_device(&drm->client.device), 32, 0, 435 false, NULL, &drm->notify); 436 if (ret) { 437 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); 438 nouveau_accel_fini(drm); 439 return; 440 } 441 442 ret = nvif_object_init(&drm->channel->user, NvNotify0, 443 NV_DMA_IN_MEMORY, 444 &(struct nv_dma_v0) { 445 .target = NV_DMA_V0_TARGET_VRAM, 446 .access = NV_DMA_V0_ACCESS_RDWR, 447 .start = drm->notify->addr, 448 .limit = drm->notify->addr + 31 449 }, sizeof(struct nv_dma_v0), 450 &drm->ntfy); 451 if (ret) { 452 nouveau_accel_fini(drm); 453 return; 454 } 455 } 456 457 458 nouveau_bo_move_init(drm); 459 } 460 461 static int 462 nouveau_drm_device_init(struct drm_device *dev) 463 { 464 struct nouveau_drm *drm; 465 int ret; 466 467 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL))) 468 return -ENOMEM; 469 dev->dev_private = drm; 470 drm->dev = dev; 471 472 ret = nouveau_cli_init(drm, "DRM-master", &drm->master); 473 if (ret) 474 goto fail_alloc; 475 476 ret = nouveau_cli_init(drm, "DRM", &drm->client); 477 if (ret) 478 goto fail_master; 479 480 dev->irq_enabled = true; 481 482 nvxx_client(&drm->client.base)->debug = 483 nvkm_dbgopt(nouveau_debug, "DRM"); 484 485 INIT_LIST_HEAD(&drm->clients); 486 spin_lock_init(&drm->tile.lock); 487 488 /* workaround an odd issue on nvc1 by disabling the device's 489 * nosnoop capability. hopefully won't cause issues until a 490 * better fix is found - assuming there is one... 491 */ 492 if (drm->client.device.info.chipset == 0xc1) 493 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000); 494 495 nouveau_vga_init(drm); 496 497 ret = nouveau_ttm_init(drm); 498 if (ret) 499 goto fail_ttm; 500 501 ret = nouveau_bios_init(dev); 502 if (ret) 503 goto fail_bios; 504 505 ret = nouveau_display_create(dev); 506 if (ret) 507 goto fail_dispctor; 508 509 if (dev->mode_config.num_crtc) { 510 ret = nouveau_display_init(dev); 511 if (ret) 512 goto fail_dispinit; 513 } 514 515 nouveau_debugfs_init(drm); 516 nouveau_hwmon_init(dev); 517 nouveau_accel_init(drm); 518 nouveau_fbcon_init(dev); 519 nouveau_led_init(dev); 520 521 if (nouveau_pmops_runtime()) { 522 pm_runtime_use_autosuspend(dev->dev); 523 pm_runtime_set_autosuspend_delay(dev->dev, 5000); 524 pm_runtime_set_active(dev->dev); 525 pm_runtime_allow(dev->dev); 526 pm_runtime_mark_last_busy(dev->dev); 527 pm_runtime_put(dev->dev); 528 } 529 530 return 0; 531 532 fail_dispinit: 533 nouveau_display_destroy(dev); 534 fail_dispctor: 535 nouveau_bios_takedown(dev); 536 fail_bios: 537 nouveau_ttm_fini(drm); 538 fail_ttm: 539 nouveau_vga_fini(drm); 540 nouveau_cli_fini(&drm->client); 541 fail_master: 542 nouveau_cli_fini(&drm->master); 543 fail_alloc: 544 kfree(drm); 545 return ret; 546 } 547 548 static void 549 nouveau_drm_device_fini(struct drm_device *dev) 550 { 551 struct nouveau_drm *drm = nouveau_drm(dev); 552 553 if (nouveau_pmops_runtime()) { 554 pm_runtime_get_sync(dev->dev); 555 pm_runtime_forbid(dev->dev); 556 } 557 558 nouveau_led_fini(dev); 559 nouveau_fbcon_fini(dev); 560 nouveau_accel_fini(drm); 561 nouveau_hwmon_fini(dev); 562 nouveau_debugfs_fini(drm); 563 564 if (dev->mode_config.num_crtc) 565 nouveau_display_fini(dev, false, false); 566 nouveau_display_destroy(dev); 567 568 nouveau_bios_takedown(dev); 569 570 nouveau_ttm_fini(drm); 571 nouveau_vga_fini(drm); 572 573 nouveau_cli_fini(&drm->client); 574 nouveau_cli_fini(&drm->master); 575 kfree(drm); 576 } 577 578 static int nouveau_drm_probe(struct pci_dev *pdev, 579 const struct pci_device_id *pent) 580 { 581 struct nvkm_device *device; 582 struct drm_device *drm_dev; 583 struct apertures_struct *aper; 584 bool boot = false; 585 int ret; 586 587 if (vga_switcheroo_client_probe_defer(pdev)) 588 return -EPROBE_DEFER; 589 590 /* We need to check that the chipset is supported before booting 591 * fbdev off the hardware, as there's no way to put it back. 592 */ 593 ret = nvkm_device_pci_new(pdev, NULL, "error", true, false, 0, &device); 594 if (ret) 595 return ret; 596 597 nvkm_device_del(&device); 598 599 /* Remove conflicting drivers (vesafb, efifb etc). */ 600 aper = alloc_apertures(3); 601 if (!aper) 602 return -ENOMEM; 603 604 aper->ranges[0].base = pci_resource_start(pdev, 1); 605 aper->ranges[0].size = pci_resource_len(pdev, 1); 606 aper->count = 1; 607 608 if (pci_resource_len(pdev, 2)) { 609 aper->ranges[aper->count].base = pci_resource_start(pdev, 2); 610 aper->ranges[aper->count].size = pci_resource_len(pdev, 2); 611 aper->count++; 612 } 613 614 if (pci_resource_len(pdev, 3)) { 615 aper->ranges[aper->count].base = pci_resource_start(pdev, 3); 616 aper->ranges[aper->count].size = pci_resource_len(pdev, 3); 617 aper->count++; 618 } 619 620 #ifdef CONFIG_X86 621 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 622 #endif 623 if (nouveau_modeset != 2) 624 drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot); 625 kfree(aper); 626 627 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug, 628 true, true, ~0ULL, &device); 629 if (ret) 630 return ret; 631 632 pci_set_master(pdev); 633 634 if (nouveau_atomic) 635 driver_pci.driver_features |= DRIVER_ATOMIC; 636 637 drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev); 638 if (IS_ERR(drm_dev)) { 639 ret = PTR_ERR(drm_dev); 640 goto fail_nvkm; 641 } 642 643 ret = pci_enable_device(pdev); 644 if (ret) 645 goto fail_drm; 646 647 drm_dev->pdev = pdev; 648 pci_set_drvdata(pdev, drm_dev); 649 650 ret = nouveau_drm_device_init(drm_dev); 651 if (ret) 652 goto fail_pci; 653 654 ret = drm_dev_register(drm_dev, pent->driver_data); 655 if (ret) 656 goto fail_drm_dev_init; 657 658 return 0; 659 660 fail_drm_dev_init: 661 nouveau_drm_device_fini(drm_dev); 662 fail_pci: 663 pci_disable_device(pdev); 664 fail_drm: 665 drm_dev_put(drm_dev); 666 fail_nvkm: 667 nvkm_device_del(&device); 668 return ret; 669 } 670 671 void 672 nouveau_drm_device_remove(struct drm_device *dev) 673 { 674 struct pci_dev *pdev = dev->pdev; 675 struct nouveau_drm *drm = nouveau_drm(dev); 676 struct nvkm_client *client; 677 struct nvkm_device *device; 678 679 drm_dev_unregister(dev); 680 681 dev->irq_enabled = false; 682 client = nvxx_client(&drm->client.base); 683 device = nvkm_device_find(client->device); 684 685 nouveau_drm_device_fini(dev); 686 pci_disable_device(pdev); 687 drm_dev_put(dev); 688 nvkm_device_del(&device); 689 } 690 691 static void 692 nouveau_drm_remove(struct pci_dev *pdev) 693 { 694 struct drm_device *dev = pci_get_drvdata(pdev); 695 696 nouveau_drm_device_remove(dev); 697 } 698 699 static int 700 nouveau_do_suspend(struct drm_device *dev, bool runtime) 701 { 702 struct nouveau_drm *drm = nouveau_drm(dev); 703 int ret; 704 705 nouveau_led_suspend(dev); 706 707 if (dev->mode_config.num_crtc) { 708 NV_DEBUG(drm, "suspending console...\n"); 709 nouveau_fbcon_set_suspend(dev, 1); 710 NV_DEBUG(drm, "suspending display...\n"); 711 ret = nouveau_display_suspend(dev, runtime); 712 if (ret) 713 return ret; 714 } 715 716 NV_DEBUG(drm, "evicting buffers...\n"); 717 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); 718 719 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n"); 720 if (drm->cechan) { 721 ret = nouveau_channel_idle(drm->cechan); 722 if (ret) 723 goto fail_display; 724 } 725 726 if (drm->channel) { 727 ret = nouveau_channel_idle(drm->channel); 728 if (ret) 729 goto fail_display; 730 } 731 732 NV_DEBUG(drm, "suspending fence...\n"); 733 if (drm->fence && nouveau_fence(drm)->suspend) { 734 if (!nouveau_fence(drm)->suspend(drm)) { 735 ret = -ENOMEM; 736 goto fail_display; 737 } 738 } 739 740 NV_DEBUG(drm, "suspending object tree...\n"); 741 ret = nvif_client_suspend(&drm->master.base); 742 if (ret) 743 goto fail_client; 744 745 return 0; 746 747 fail_client: 748 if (drm->fence && nouveau_fence(drm)->resume) 749 nouveau_fence(drm)->resume(drm); 750 751 fail_display: 752 if (dev->mode_config.num_crtc) { 753 NV_DEBUG(drm, "resuming display...\n"); 754 nouveau_display_resume(dev, runtime); 755 } 756 return ret; 757 } 758 759 static int 760 nouveau_do_resume(struct drm_device *dev, bool runtime) 761 { 762 struct nouveau_drm *drm = nouveau_drm(dev); 763 764 NV_DEBUG(drm, "resuming object tree...\n"); 765 nvif_client_resume(&drm->master.base); 766 767 NV_DEBUG(drm, "resuming fence...\n"); 768 if (drm->fence && nouveau_fence(drm)->resume) 769 nouveau_fence(drm)->resume(drm); 770 771 nouveau_run_vbios_init(dev); 772 773 if (dev->mode_config.num_crtc) { 774 NV_DEBUG(drm, "resuming display...\n"); 775 nouveau_display_resume(dev, runtime); 776 NV_DEBUG(drm, "resuming console...\n"); 777 nouveau_fbcon_set_suspend(dev, 0); 778 } 779 780 nouveau_led_resume(dev); 781 782 return 0; 783 } 784 785 int 786 nouveau_pmops_suspend(struct device *dev) 787 { 788 struct pci_dev *pdev = to_pci_dev(dev); 789 struct drm_device *drm_dev = pci_get_drvdata(pdev); 790 int ret; 791 792 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || 793 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 794 return 0; 795 796 ret = nouveau_do_suspend(drm_dev, false); 797 if (ret) 798 return ret; 799 800 pci_save_state(pdev); 801 pci_disable_device(pdev); 802 pci_set_power_state(pdev, PCI_D3hot); 803 udelay(200); 804 return 0; 805 } 806 807 int 808 nouveau_pmops_resume(struct device *dev) 809 { 810 struct pci_dev *pdev = to_pci_dev(dev); 811 struct drm_device *drm_dev = pci_get_drvdata(pdev); 812 int ret; 813 814 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || 815 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 816 return 0; 817 818 pci_set_power_state(pdev, PCI_D0); 819 pci_restore_state(pdev); 820 ret = pci_enable_device(pdev); 821 if (ret) 822 return ret; 823 pci_set_master(pdev); 824 825 ret = nouveau_do_resume(drm_dev, false); 826 827 /* Monitors may have been connected / disconnected during suspend */ 828 schedule_work(&nouveau_drm(drm_dev)->hpd_work); 829 830 return ret; 831 } 832 833 static int 834 nouveau_pmops_freeze(struct device *dev) 835 { 836 struct pci_dev *pdev = to_pci_dev(dev); 837 struct drm_device *drm_dev = pci_get_drvdata(pdev); 838 return nouveau_do_suspend(drm_dev, false); 839 } 840 841 static int 842 nouveau_pmops_thaw(struct device *dev) 843 { 844 struct pci_dev *pdev = to_pci_dev(dev); 845 struct drm_device *drm_dev = pci_get_drvdata(pdev); 846 return nouveau_do_resume(drm_dev, false); 847 } 848 849 bool 850 nouveau_pmops_runtime(void) 851 { 852 if (nouveau_runtime_pm == -1) 853 return nouveau_is_optimus() || nouveau_is_v1_dsm(); 854 return nouveau_runtime_pm == 1; 855 } 856 857 static int 858 nouveau_pmops_runtime_suspend(struct device *dev) 859 { 860 struct pci_dev *pdev = to_pci_dev(dev); 861 struct drm_device *drm_dev = pci_get_drvdata(pdev); 862 int ret; 863 864 if (!nouveau_pmops_runtime()) { 865 pm_runtime_forbid(dev); 866 return -EBUSY; 867 } 868 869 nouveau_switcheroo_optimus_dsm(); 870 ret = nouveau_do_suspend(drm_dev, true); 871 pci_save_state(pdev); 872 pci_disable_device(pdev); 873 pci_ignore_hotplug(pdev); 874 pci_set_power_state(pdev, PCI_D3cold); 875 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 876 return ret; 877 } 878 879 static int 880 nouveau_pmops_runtime_resume(struct device *dev) 881 { 882 struct pci_dev *pdev = to_pci_dev(dev); 883 struct drm_device *drm_dev = pci_get_drvdata(pdev); 884 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device; 885 int ret; 886 887 if (!nouveau_pmops_runtime()) { 888 pm_runtime_forbid(dev); 889 return -EBUSY; 890 } 891 892 pci_set_power_state(pdev, PCI_D0); 893 pci_restore_state(pdev); 894 ret = pci_enable_device(pdev); 895 if (ret) 896 return ret; 897 pci_set_master(pdev); 898 899 ret = nouveau_do_resume(drm_dev, true); 900 901 /* do magic */ 902 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25)); 903 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 904 905 /* Monitors may have been connected / disconnected during suspend */ 906 schedule_work(&nouveau_drm(drm_dev)->hpd_work); 907 908 return ret; 909 } 910 911 static int 912 nouveau_pmops_runtime_idle(struct device *dev) 913 { 914 if (!nouveau_pmops_runtime()) { 915 pm_runtime_forbid(dev); 916 return -EBUSY; 917 } 918 919 pm_runtime_mark_last_busy(dev); 920 pm_runtime_autosuspend(dev); 921 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 922 return 1; 923 } 924 925 static int 926 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) 927 { 928 struct nouveau_drm *drm = nouveau_drm(dev); 929 struct nouveau_cli *cli; 930 char name[32], tmpname[TASK_COMM_LEN]; 931 int ret; 932 933 /* need to bring up power immediately if opening device */ 934 ret = pm_runtime_get_sync(dev->dev); 935 if (ret < 0 && ret != -EACCES) 936 return ret; 937 938 get_task_comm(tmpname, current); 939 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); 940 941 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) { 942 ret = -ENOMEM; 943 goto done; 944 } 945 946 ret = nouveau_cli_init(drm, name, cli); 947 if (ret) 948 goto done; 949 950 cli->base.super = false; 951 952 fpriv->driver_priv = cli; 953 954 mutex_lock(&drm->client.mutex); 955 list_add(&cli->head, &drm->clients); 956 mutex_unlock(&drm->client.mutex); 957 958 done: 959 if (ret && cli) { 960 nouveau_cli_fini(cli); 961 kfree(cli); 962 } 963 964 pm_runtime_mark_last_busy(dev->dev); 965 pm_runtime_put_autosuspend(dev->dev); 966 return ret; 967 } 968 969 static void 970 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) 971 { 972 struct nouveau_cli *cli = nouveau_cli(fpriv); 973 struct nouveau_drm *drm = nouveau_drm(dev); 974 975 pm_runtime_get_sync(dev->dev); 976 977 mutex_lock(&cli->mutex); 978 if (cli->abi16) 979 nouveau_abi16_fini(cli->abi16); 980 mutex_unlock(&cli->mutex); 981 982 mutex_lock(&drm->client.mutex); 983 list_del(&cli->head); 984 mutex_unlock(&drm->client.mutex); 985 986 nouveau_cli_fini(cli); 987 kfree(cli); 988 pm_runtime_mark_last_busy(dev->dev); 989 pm_runtime_put_autosuspend(dev->dev); 990 } 991 992 static const struct drm_ioctl_desc 993 nouveau_ioctls[] = { 994 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW), 995 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 996 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW), 997 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW), 998 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW), 999 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW), 1000 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW), 1001 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW), 1002 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW), 1003 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW), 1004 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW), 1005 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW), 1006 }; 1007 1008 long 1009 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 1010 { 1011 struct drm_file *filp = file->private_data; 1012 struct drm_device *dev = filp->minor->dev; 1013 long ret; 1014 1015 ret = pm_runtime_get_sync(dev->dev); 1016 if (ret < 0 && ret != -EACCES) 1017 return ret; 1018 1019 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) { 1020 case DRM_NOUVEAU_NVIF: 1021 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd)); 1022 break; 1023 default: 1024 ret = drm_ioctl(file, cmd, arg); 1025 break; 1026 } 1027 1028 pm_runtime_mark_last_busy(dev->dev); 1029 pm_runtime_put_autosuspend(dev->dev); 1030 return ret; 1031 } 1032 1033 static const struct file_operations 1034 nouveau_driver_fops = { 1035 .owner = THIS_MODULE, 1036 .open = drm_open, 1037 .release = drm_release, 1038 .unlocked_ioctl = nouveau_drm_ioctl, 1039 .mmap = nouveau_ttm_mmap, 1040 .poll = drm_poll, 1041 .read = drm_read, 1042 #if defined(CONFIG_COMPAT) 1043 .compat_ioctl = nouveau_compat_ioctl, 1044 #endif 1045 .llseek = noop_llseek, 1046 }; 1047 1048 static struct drm_driver 1049 driver_stub = { 1050 .driver_features = 1051 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER | 1052 DRIVER_KMS_LEGACY_CONTEXT, 1053 1054 .open = nouveau_drm_open, 1055 .postclose = nouveau_drm_postclose, 1056 .lastclose = nouveau_vga_lastclose, 1057 1058 #if defined(CONFIG_DEBUG_FS) 1059 .debugfs_init = nouveau_drm_debugfs_init, 1060 #endif 1061 1062 .enable_vblank = nouveau_display_vblank_enable, 1063 .disable_vblank = nouveau_display_vblank_disable, 1064 .get_scanout_position = nouveau_display_scanoutpos, 1065 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos, 1066 1067 .ioctls = nouveau_ioctls, 1068 .num_ioctls = ARRAY_SIZE(nouveau_ioctls), 1069 .fops = &nouveau_driver_fops, 1070 1071 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 1072 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 1073 .gem_prime_export = drm_gem_prime_export, 1074 .gem_prime_import = drm_gem_prime_import, 1075 .gem_prime_pin = nouveau_gem_prime_pin, 1076 .gem_prime_res_obj = nouveau_gem_prime_res_obj, 1077 .gem_prime_unpin = nouveau_gem_prime_unpin, 1078 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table, 1079 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, 1080 .gem_prime_vmap = nouveau_gem_prime_vmap, 1081 .gem_prime_vunmap = nouveau_gem_prime_vunmap, 1082 1083 .gem_free_object_unlocked = nouveau_gem_object_del, 1084 .gem_open_object = nouveau_gem_object_open, 1085 .gem_close_object = nouveau_gem_object_close, 1086 1087 .dumb_create = nouveau_display_dumb_create, 1088 .dumb_map_offset = nouveau_display_dumb_map_offset, 1089 1090 .name = DRIVER_NAME, 1091 .desc = DRIVER_DESC, 1092 #ifdef GIT_REVISION 1093 .date = GIT_REVISION, 1094 #else 1095 .date = DRIVER_DATE, 1096 #endif 1097 .major = DRIVER_MAJOR, 1098 .minor = DRIVER_MINOR, 1099 .patchlevel = DRIVER_PATCHLEVEL, 1100 }; 1101 1102 static struct pci_device_id 1103 nouveau_drm_pci_table[] = { 1104 { 1105 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), 1106 .class = PCI_BASE_CLASS_DISPLAY << 16, 1107 .class_mask = 0xff << 16, 1108 }, 1109 { 1110 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), 1111 .class = PCI_BASE_CLASS_DISPLAY << 16, 1112 .class_mask = 0xff << 16, 1113 }, 1114 {} 1115 }; 1116 1117 static void nouveau_display_options(void) 1118 { 1119 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n"); 1120 1121 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable); 1122 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid); 1123 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink); 1124 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel); 1125 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config); 1126 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug); 1127 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel); 1128 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset); 1129 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm); 1130 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf); 1131 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz); 1132 } 1133 1134 static const struct dev_pm_ops nouveau_pm_ops = { 1135 .suspend = nouveau_pmops_suspend, 1136 .resume = nouveau_pmops_resume, 1137 .freeze = nouveau_pmops_freeze, 1138 .thaw = nouveau_pmops_thaw, 1139 .poweroff = nouveau_pmops_freeze, 1140 .restore = nouveau_pmops_resume, 1141 .runtime_suspend = nouveau_pmops_runtime_suspend, 1142 .runtime_resume = nouveau_pmops_runtime_resume, 1143 .runtime_idle = nouveau_pmops_runtime_idle, 1144 }; 1145 1146 static struct pci_driver 1147 nouveau_drm_pci_driver = { 1148 .name = "nouveau", 1149 .id_table = nouveau_drm_pci_table, 1150 .probe = nouveau_drm_probe, 1151 .remove = nouveau_drm_remove, 1152 .driver.pm = &nouveau_pm_ops, 1153 }; 1154 1155 struct drm_device * 1156 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, 1157 struct platform_device *pdev, 1158 struct nvkm_device **pdevice) 1159 { 1160 struct drm_device *drm; 1161 int err; 1162 1163 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug, 1164 true, true, ~0ULL, pdevice); 1165 if (err) 1166 goto err_free; 1167 1168 drm = drm_dev_alloc(&driver_platform, &pdev->dev); 1169 if (IS_ERR(drm)) { 1170 err = PTR_ERR(drm); 1171 goto err_free; 1172 } 1173 1174 platform_set_drvdata(pdev, drm); 1175 1176 return drm; 1177 1178 err_free: 1179 nvkm_device_del(pdevice); 1180 1181 return ERR_PTR(err); 1182 } 1183 1184 static int __init 1185 nouveau_drm_init(void) 1186 { 1187 driver_pci = driver_stub; 1188 driver_platform = driver_stub; 1189 1190 nouveau_display_options(); 1191 1192 if (nouveau_modeset == -1) { 1193 if (vgacon_text_force()) 1194 nouveau_modeset = 0; 1195 } 1196 1197 if (!nouveau_modeset) 1198 return 0; 1199 1200 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1201 platform_driver_register(&nouveau_platform_driver); 1202 #endif 1203 1204 nouveau_register_dsm_handler(); 1205 nouveau_backlight_ctor(); 1206 1207 #ifdef CONFIG_PCI 1208 return pci_register_driver(&nouveau_drm_pci_driver); 1209 #else 1210 return 0; 1211 #endif 1212 } 1213 1214 static void __exit 1215 nouveau_drm_exit(void) 1216 { 1217 if (!nouveau_modeset) 1218 return; 1219 1220 #ifdef CONFIG_PCI 1221 pci_unregister_driver(&nouveau_drm_pci_driver); 1222 #endif 1223 nouveau_backlight_dtor(); 1224 nouveau_unregister_dsm_handler(); 1225 1226 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1227 platform_driver_unregister(&nouveau_platform_driver); 1228 #endif 1229 } 1230 1231 module_init(nouveau_drm_init); 1232 module_exit(nouveau_drm_exit); 1233 1234 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); 1235 MODULE_AUTHOR(DRIVER_AUTHOR); 1236 MODULE_DESCRIPTION(DRIVER_DESC); 1237 MODULE_LICENSE("GPL and additional rights"); 1238