1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 
25 #include <linux/delay.h>
26 #include <linux/module.h>
27 #include <linux/pci.h>
28 #include <linux/pm_runtime.h>
29 #include <linux/vga_switcheroo.h>
30 #include <linux/mmu_notifier.h>
31 
32 #include <drm/drm_aperture.h>
33 #include <drm/drm_crtc_helper.h>
34 #include <drm/drm_drv.h>
35 #include <drm/drm_gem_ttm_helper.h>
36 #include <drm/drm_ioctl.h>
37 #include <drm/drm_vblank.h>
38 
39 #include <core/gpuobj.h>
40 #include <core/option.h>
41 #include <core/pci.h>
42 #include <core/tegra.h>
43 
44 #include <nvif/driver.h>
45 #include <nvif/fifo.h>
46 #include <nvif/push006c.h>
47 #include <nvif/user.h>
48 
49 #include <nvif/class.h>
50 #include <nvif/cl0002.h>
51 #include <nvif/cla06f.h>
52 
53 #include "nouveau_drv.h"
54 #include "nouveau_dma.h"
55 #include "nouveau_ttm.h"
56 #include "nouveau_gem.h"
57 #include "nouveau_vga.h"
58 #include "nouveau_led.h"
59 #include "nouveau_hwmon.h"
60 #include "nouveau_acpi.h"
61 #include "nouveau_bios.h"
62 #include "nouveau_ioctl.h"
63 #include "nouveau_abi16.h"
64 #include "nouveau_fbcon.h"
65 #include "nouveau_fence.h"
66 #include "nouveau_debugfs.h"
67 #include "nouveau_usif.h"
68 #include "nouveau_connector.h"
69 #include "nouveau_platform.h"
70 #include "nouveau_svm.h"
71 #include "nouveau_dmem.h"
72 
73 MODULE_PARM_DESC(config, "option string to pass to driver core");
74 static char *nouveau_config;
75 module_param_named(config, nouveau_config, charp, 0400);
76 
77 MODULE_PARM_DESC(debug, "debug string to pass to driver core");
78 static char *nouveau_debug;
79 module_param_named(debug, nouveau_debug, charp, 0400);
80 
81 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
82 static int nouveau_noaccel = 0;
83 module_param_named(noaccel, nouveau_noaccel, int, 0400);
84 
85 MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
86 		          "0 = disabled, 1 = enabled, 2 = headless)");
87 int nouveau_modeset = -1;
88 module_param_named(modeset, nouveau_modeset, int, 0400);
89 
90 MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)");
91 static int nouveau_atomic = 0;
92 module_param_named(atomic, nouveau_atomic, int, 0400);
93 
94 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
95 static int nouveau_runtime_pm = -1;
96 module_param_named(runpm, nouveau_runtime_pm, int, 0400);
97 
98 static struct drm_driver driver_stub;
99 static struct drm_driver driver_pci;
100 static struct drm_driver driver_platform;
101 
102 static u64
103 nouveau_pci_name(struct pci_dev *pdev)
104 {
105 	u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
106 	name |= pdev->bus->number << 16;
107 	name |= PCI_SLOT(pdev->devfn) << 8;
108 	return name | PCI_FUNC(pdev->devfn);
109 }
110 
111 static u64
112 nouveau_platform_name(struct platform_device *platformdev)
113 {
114 	return platformdev->id;
115 }
116 
117 static u64
118 nouveau_name(struct drm_device *dev)
119 {
120 	if (dev_is_pci(dev->dev))
121 		return nouveau_pci_name(to_pci_dev(dev->dev));
122 	else
123 		return nouveau_platform_name(to_platform_device(dev->dev));
124 }
125 
126 static inline bool
127 nouveau_cli_work_ready(struct dma_fence *fence)
128 {
129 	if (!dma_fence_is_signaled(fence))
130 		return false;
131 	dma_fence_put(fence);
132 	return true;
133 }
134 
135 static void
136 nouveau_cli_work(struct work_struct *w)
137 {
138 	struct nouveau_cli *cli = container_of(w, typeof(*cli), work);
139 	struct nouveau_cli_work *work, *wtmp;
140 	mutex_lock(&cli->lock);
141 	list_for_each_entry_safe(work, wtmp, &cli->worker, head) {
142 		if (!work->fence || nouveau_cli_work_ready(work->fence)) {
143 			list_del(&work->head);
144 			work->func(work);
145 		}
146 	}
147 	mutex_unlock(&cli->lock);
148 }
149 
150 static void
151 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb)
152 {
153 	struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb);
154 	schedule_work(&work->cli->work);
155 }
156 
157 void
158 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,
159 		       struct nouveau_cli_work *work)
160 {
161 	work->fence = dma_fence_get(fence);
162 	work->cli = cli;
163 	mutex_lock(&cli->lock);
164 	list_add_tail(&work->head, &cli->worker);
165 	if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))
166 		nouveau_cli_work_fence(fence, &work->cb);
167 	mutex_unlock(&cli->lock);
168 }
169 
170 static void
171 nouveau_cli_fini(struct nouveau_cli *cli)
172 {
173 	/* All our channels are dead now, which means all the fences they
174 	 * own are signalled, and all callback functions have been called.
175 	 *
176 	 * So, after flushing the workqueue, there should be nothing left.
177 	 */
178 	flush_work(&cli->work);
179 	WARN_ON(!list_empty(&cli->worker));
180 
181 	usif_client_fini(cli);
182 	nouveau_vmm_fini(&cli->svm);
183 	nouveau_vmm_fini(&cli->vmm);
184 	nvif_mmu_dtor(&cli->mmu);
185 	nvif_device_dtor(&cli->device);
186 	mutex_lock(&cli->drm->master.lock);
187 	nvif_client_dtor(&cli->base);
188 	mutex_unlock(&cli->drm->master.lock);
189 }
190 
191 static int
192 nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
193 		 struct nouveau_cli *cli)
194 {
195 	static const struct nvif_mclass
196 	mems[] = {
197 		{ NVIF_CLASS_MEM_GF100, -1 },
198 		{ NVIF_CLASS_MEM_NV50 , -1 },
199 		{ NVIF_CLASS_MEM_NV04 , -1 },
200 		{}
201 	};
202 	static const struct nvif_mclass
203 	mmus[] = {
204 		{ NVIF_CLASS_MMU_GF100, -1 },
205 		{ NVIF_CLASS_MMU_NV50 , -1 },
206 		{ NVIF_CLASS_MMU_NV04 , -1 },
207 		{}
208 	};
209 	static const struct nvif_mclass
210 	vmms[] = {
211 		{ NVIF_CLASS_VMM_GP100, -1 },
212 		{ NVIF_CLASS_VMM_GM200, -1 },
213 		{ NVIF_CLASS_VMM_GF100, -1 },
214 		{ NVIF_CLASS_VMM_NV50 , -1 },
215 		{ NVIF_CLASS_VMM_NV04 , -1 },
216 		{}
217 	};
218 	u64 device = nouveau_name(drm->dev);
219 	int ret;
220 
221 	snprintf(cli->name, sizeof(cli->name), "%s", sname);
222 	cli->drm = drm;
223 	mutex_init(&cli->mutex);
224 	usif_client_init(cli);
225 
226 	INIT_WORK(&cli->work, nouveau_cli_work);
227 	INIT_LIST_HEAD(&cli->worker);
228 	mutex_init(&cli->lock);
229 
230 	if (cli == &drm->master) {
231 		ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
232 				       cli->name, device, &cli->base);
233 	} else {
234 		mutex_lock(&drm->master.lock);
235 		ret = nvif_client_ctor(&drm->master.base, cli->name, device,
236 				       &cli->base);
237 		mutex_unlock(&drm->master.lock);
238 	}
239 	if (ret) {
240 		NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret);
241 		goto done;
242 	}
243 
244 	ret = nvif_device_ctor(&cli->base.object, "drmDevice", 0, NV_DEVICE,
245 			       &(struct nv_device_v0) {
246 					.device = ~0,
247 					.priv = true,
248 			       }, sizeof(struct nv_device_v0),
249 			       &cli->device);
250 	if (ret) {
251 		NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret);
252 		goto done;
253 	}
254 
255 	ret = nvif_mclass(&cli->device.object, mmus);
256 	if (ret < 0) {
257 		NV_PRINTK(err, cli, "No supported MMU class\n");
258 		goto done;
259 	}
260 
261 	ret = nvif_mmu_ctor(&cli->device.object, "drmMmu", mmus[ret].oclass,
262 			    &cli->mmu);
263 	if (ret) {
264 		NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret);
265 		goto done;
266 	}
267 
268 	ret = nvif_mclass(&cli->mmu.object, vmms);
269 	if (ret < 0) {
270 		NV_PRINTK(err, cli, "No supported VMM class\n");
271 		goto done;
272 	}
273 
274 	ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm);
275 	if (ret) {
276 		NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret);
277 		goto done;
278 	}
279 
280 	ret = nvif_mclass(&cli->mmu.object, mems);
281 	if (ret < 0) {
282 		NV_PRINTK(err, cli, "No supported MEM class\n");
283 		goto done;
284 	}
285 
286 	cli->mem = &mems[ret];
287 	return 0;
288 done:
289 	if (ret)
290 		nouveau_cli_fini(cli);
291 	return ret;
292 }
293 
294 static void
295 nouveau_accel_ce_fini(struct nouveau_drm *drm)
296 {
297 	nouveau_channel_idle(drm->cechan);
298 	nvif_object_dtor(&drm->ttm.copy);
299 	nouveau_channel_del(&drm->cechan);
300 }
301 
302 static void
303 nouveau_accel_ce_init(struct nouveau_drm *drm)
304 {
305 	struct nvif_device *device = &drm->client.device;
306 	int ret = 0;
307 
308 	/* Allocate channel that has access to a (preferably async) copy
309 	 * engine, to use for TTM buffer moves.
310 	 */
311 	if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
312 		ret = nouveau_channel_new(drm, device,
313 					  nvif_fifo_runlist_ce(device), 0,
314 					  true, &drm->cechan);
315 	} else
316 	if (device->info.chipset >= 0xa3 &&
317 	    device->info.chipset != 0xaa &&
318 	    device->info.chipset != 0xac) {
319 		/* Prior to Kepler, there's only a single runlist, so all
320 		 * engines can be accessed from any channel.
321 		 *
322 		 * We still want to use a separate channel though.
323 		 */
324 		ret = nouveau_channel_new(drm, device, NvDmaFB, NvDmaTT, false,
325 					  &drm->cechan);
326 	}
327 
328 	if (ret)
329 		NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
330 }
331 
332 static void
333 nouveau_accel_gr_fini(struct nouveau_drm *drm)
334 {
335 	nouveau_channel_idle(drm->channel);
336 	nvif_object_dtor(&drm->ntfy);
337 	nvkm_gpuobj_del(&drm->notify);
338 	nouveau_channel_del(&drm->channel);
339 }
340 
341 static void
342 nouveau_accel_gr_init(struct nouveau_drm *drm)
343 {
344 	struct nvif_device *device = &drm->client.device;
345 	u32 arg0, arg1;
346 	int ret;
347 
348 	if (device->info.family >= NV_DEVICE_INFO_V0_AMPERE)
349 		return;
350 
351 	/* Allocate channel that has access to the graphics engine. */
352 	if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
353 		arg0 = nvif_fifo_runlist(device, NV_DEVICE_HOST_RUNLIST_ENGINES_GR);
354 		arg1 = 1;
355 	} else {
356 		arg0 = NvDmaFB;
357 		arg1 = NvDmaTT;
358 	}
359 
360 	ret = nouveau_channel_new(drm, device, arg0, arg1, false,
361 				  &drm->channel);
362 	if (ret) {
363 		NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
364 		nouveau_accel_gr_fini(drm);
365 		return;
366 	}
367 
368 	/* A SW class is used on pre-NV50 HW to assist with handling the
369 	 * synchronisation of page flips, as well as to implement fences
370 	 * on TNT/TNT2 HW that lacks any kind of support in host.
371 	 */
372 	if (!drm->channel->nvsw.client && device->info.family < NV_DEVICE_INFO_V0_TESLA) {
373 		ret = nvif_object_ctor(&drm->channel->user, "drmNvsw",
374 				       NVDRM_NVSW, nouveau_abi16_swclass(drm),
375 				       NULL, 0, &drm->channel->nvsw);
376 		if (ret == 0) {
377 			struct nvif_push *push = drm->channel->chan.push;
378 			ret = PUSH_WAIT(push, 2);
379 			if (ret == 0)
380 				PUSH_NVSQ(push, NV_SW, 0x0000, drm->channel->nvsw.handle);
381 		}
382 
383 		if (ret) {
384 			NV_ERROR(drm, "failed to allocate sw class, %d\n", ret);
385 			nouveau_accel_gr_fini(drm);
386 			return;
387 		}
388 	}
389 
390 	/* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason,
391 	 * even if notification is never requested, so, allocate a ctxdma on
392 	 * any GPU where it's possible we'll end up using M2MF for BO moves.
393 	 */
394 	if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
395 		ret = nvkm_gpuobj_new(nvxx_device(device), 32, 0, false, NULL,
396 				      &drm->notify);
397 		if (ret) {
398 			NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
399 			nouveau_accel_gr_fini(drm);
400 			return;
401 		}
402 
403 		ret = nvif_object_ctor(&drm->channel->user, "drmM2mfNtfy",
404 				       NvNotify0, NV_DMA_IN_MEMORY,
405 				       &(struct nv_dma_v0) {
406 						.target = NV_DMA_V0_TARGET_VRAM,
407 						.access = NV_DMA_V0_ACCESS_RDWR,
408 						.start = drm->notify->addr,
409 						.limit = drm->notify->addr + 31
410 				       }, sizeof(struct nv_dma_v0),
411 				       &drm->ntfy);
412 		if (ret) {
413 			nouveau_accel_gr_fini(drm);
414 			return;
415 		}
416 	}
417 }
418 
419 static void
420 nouveau_accel_fini(struct nouveau_drm *drm)
421 {
422 	nouveau_accel_ce_fini(drm);
423 	nouveau_accel_gr_fini(drm);
424 	if (drm->fence)
425 		nouveau_fence(drm)->dtor(drm);
426 }
427 
428 static void
429 nouveau_accel_init(struct nouveau_drm *drm)
430 {
431 	struct nvif_device *device = &drm->client.device;
432 	struct nvif_sclass *sclass;
433 	int ret, i, n;
434 
435 	if (nouveau_noaccel)
436 		return;
437 
438 	/* Initialise global support for channels, and synchronisation. */
439 	ret = nouveau_channels_init(drm);
440 	if (ret)
441 		return;
442 
443 	/*XXX: this is crap, but the fence/channel stuff is a little
444 	 *     backwards in some places.  this will be fixed.
445 	 */
446 	ret = n = nvif_object_sclass_get(&device->object, &sclass);
447 	if (ret < 0)
448 		return;
449 
450 	for (ret = -ENOSYS, i = 0; i < n; i++) {
451 		switch (sclass[i].oclass) {
452 		case NV03_CHANNEL_DMA:
453 			ret = nv04_fence_create(drm);
454 			break;
455 		case NV10_CHANNEL_DMA:
456 			ret = nv10_fence_create(drm);
457 			break;
458 		case NV17_CHANNEL_DMA:
459 		case NV40_CHANNEL_DMA:
460 			ret = nv17_fence_create(drm);
461 			break;
462 		case NV50_CHANNEL_GPFIFO:
463 			ret = nv50_fence_create(drm);
464 			break;
465 		case G82_CHANNEL_GPFIFO:
466 			ret = nv84_fence_create(drm);
467 			break;
468 		case FERMI_CHANNEL_GPFIFO:
469 		case KEPLER_CHANNEL_GPFIFO_A:
470 		case KEPLER_CHANNEL_GPFIFO_B:
471 		case MAXWELL_CHANNEL_GPFIFO_A:
472 		case PASCAL_CHANNEL_GPFIFO_A:
473 		case VOLTA_CHANNEL_GPFIFO_A:
474 		case TURING_CHANNEL_GPFIFO_A:
475 		case AMPERE_CHANNEL_GPFIFO_B:
476 			ret = nvc0_fence_create(drm);
477 			break;
478 		default:
479 			break;
480 		}
481 	}
482 
483 	nvif_object_sclass_put(&sclass);
484 	if (ret) {
485 		NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
486 		nouveau_accel_fini(drm);
487 		return;
488 	}
489 
490 	/* Volta requires access to a doorbell register for kickoff. */
491 	if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) {
492 		ret = nvif_user_ctor(device, "drmUsermode");
493 		if (ret)
494 			return;
495 	}
496 
497 	/* Allocate channels we need to support various functions. */
498 	nouveau_accel_gr_init(drm);
499 	nouveau_accel_ce_init(drm);
500 
501 	/* Initialise accelerated TTM buffer moves. */
502 	nouveau_bo_move_init(drm);
503 }
504 
505 static void __printf(2, 3)
506 nouveau_drm_errorf(struct nvif_object *object, const char *fmt, ...)
507 {
508 	struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent);
509 	struct va_format vaf;
510 	va_list va;
511 
512 	va_start(va, fmt);
513 	vaf.fmt = fmt;
514 	vaf.va = &va;
515 	NV_ERROR(drm, "%pV", &vaf);
516 	va_end(va);
517 }
518 
519 static void __printf(2, 3)
520 nouveau_drm_debugf(struct nvif_object *object, const char *fmt, ...)
521 {
522 	struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent);
523 	struct va_format vaf;
524 	va_list va;
525 
526 	va_start(va, fmt);
527 	vaf.fmt = fmt;
528 	vaf.va = &va;
529 	NV_DEBUG(drm, "%pV", &vaf);
530 	va_end(va);
531 }
532 
533 static const struct nvif_parent_func
534 nouveau_parent = {
535 	.debugf = nouveau_drm_debugf,
536 	.errorf = nouveau_drm_errorf,
537 };
538 
539 static int
540 nouveau_drm_device_init(struct drm_device *dev)
541 {
542 	struct nouveau_drm *drm;
543 	int ret;
544 
545 	if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
546 		return -ENOMEM;
547 	dev->dev_private = drm;
548 	drm->dev = dev;
549 
550 	nvif_parent_ctor(&nouveau_parent, &drm->parent);
551 	drm->master.base.object.parent = &drm->parent;
552 
553 	ret = nouveau_cli_init(drm, "DRM-master", &drm->master);
554 	if (ret)
555 		goto fail_alloc;
556 
557 	ret = nouveau_cli_init(drm, "DRM", &drm->client);
558 	if (ret)
559 		goto fail_master;
560 
561 	nvxx_client(&drm->client.base)->debug =
562 		nvkm_dbgopt(nouveau_debug, "DRM");
563 
564 	INIT_LIST_HEAD(&drm->clients);
565 	mutex_init(&drm->clients_lock);
566 	spin_lock_init(&drm->tile.lock);
567 
568 	/* workaround an odd issue on nvc1 by disabling the device's
569 	 * nosnoop capability.  hopefully won't cause issues until a
570 	 * better fix is found - assuming there is one...
571 	 */
572 	if (drm->client.device.info.chipset == 0xc1)
573 		nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
574 
575 	nouveau_vga_init(drm);
576 
577 	ret = nouveau_ttm_init(drm);
578 	if (ret)
579 		goto fail_ttm;
580 
581 	ret = nouveau_bios_init(dev);
582 	if (ret)
583 		goto fail_bios;
584 
585 	nouveau_accel_init(drm);
586 
587 	ret = nouveau_display_create(dev);
588 	if (ret)
589 		goto fail_dispctor;
590 
591 	if (dev->mode_config.num_crtc) {
592 		ret = nouveau_display_init(dev, false, false);
593 		if (ret)
594 			goto fail_dispinit;
595 	}
596 
597 	nouveau_debugfs_init(drm);
598 	nouveau_hwmon_init(dev);
599 	nouveau_svm_init(drm);
600 	nouveau_dmem_init(drm);
601 	nouveau_fbcon_init(dev);
602 	nouveau_led_init(dev);
603 
604 	if (nouveau_pmops_runtime()) {
605 		pm_runtime_use_autosuspend(dev->dev);
606 		pm_runtime_set_autosuspend_delay(dev->dev, 5000);
607 		pm_runtime_set_active(dev->dev);
608 		pm_runtime_allow(dev->dev);
609 		pm_runtime_mark_last_busy(dev->dev);
610 		pm_runtime_put(dev->dev);
611 	}
612 
613 	return 0;
614 
615 fail_dispinit:
616 	nouveau_display_destroy(dev);
617 fail_dispctor:
618 	nouveau_accel_fini(drm);
619 	nouveau_bios_takedown(dev);
620 fail_bios:
621 	nouveau_ttm_fini(drm);
622 fail_ttm:
623 	nouveau_vga_fini(drm);
624 	nouveau_cli_fini(&drm->client);
625 fail_master:
626 	nouveau_cli_fini(&drm->master);
627 fail_alloc:
628 	nvif_parent_dtor(&drm->parent);
629 	kfree(drm);
630 	return ret;
631 }
632 
633 static void
634 nouveau_drm_device_fini(struct drm_device *dev)
635 {
636 	struct nouveau_cli *cli, *temp_cli;
637 	struct nouveau_drm *drm = nouveau_drm(dev);
638 
639 	if (nouveau_pmops_runtime()) {
640 		pm_runtime_get_sync(dev->dev);
641 		pm_runtime_forbid(dev->dev);
642 	}
643 
644 	nouveau_led_fini(dev);
645 	nouveau_fbcon_fini(dev);
646 	nouveau_dmem_fini(drm);
647 	nouveau_svm_fini(drm);
648 	nouveau_hwmon_fini(dev);
649 	nouveau_debugfs_fini(drm);
650 
651 	if (dev->mode_config.num_crtc)
652 		nouveau_display_fini(dev, false, false);
653 	nouveau_display_destroy(dev);
654 
655 	nouveau_accel_fini(drm);
656 	nouveau_bios_takedown(dev);
657 
658 	nouveau_ttm_fini(drm);
659 	nouveau_vga_fini(drm);
660 
661 	/*
662 	 * There may be existing clients from as-yet unclosed files. For now,
663 	 * clean them up here rather than deferring until the file is closed,
664 	 * but this likely not correct if we want to support hot-unplugging
665 	 * properly.
666 	 */
667 	mutex_lock(&drm->clients_lock);
668 	list_for_each_entry_safe(cli, temp_cli, &drm->clients, head) {
669 		list_del(&cli->head);
670 		mutex_lock(&cli->mutex);
671 		if (cli->abi16)
672 			nouveau_abi16_fini(cli->abi16);
673 		mutex_unlock(&cli->mutex);
674 		nouveau_cli_fini(cli);
675 		kfree(cli);
676 	}
677 	mutex_unlock(&drm->clients_lock);
678 
679 	nouveau_cli_fini(&drm->client);
680 	nouveau_cli_fini(&drm->master);
681 	nvif_parent_dtor(&drm->parent);
682 	mutex_destroy(&drm->clients_lock);
683 	kfree(drm);
684 }
685 
686 /*
687  * On some Intel PCIe bridge controllers doing a
688  * D0 -> D3hot -> D3cold -> D0 sequence causes Nvidia GPUs to not reappear.
689  * Skipping the intermediate D3hot step seems to make it work again. This is
690  * probably caused by not meeting the expectation the involved AML code has
691  * when the GPU is put into D3hot state before invoking it.
692  *
693  * This leads to various manifestations of this issue:
694  *  - AML code execution to power on the GPU hits an infinite loop (as the
695  *    code waits on device memory to change).
696  *  - kernel crashes, as all PCI reads return -1, which most code isn't able
697  *    to handle well enough.
698  *
699  * In all cases dmesg will contain at least one line like this:
700  * 'nouveau 0000:01:00.0: Refused to change power state, currently in D3'
701  * followed by a lot of nouveau timeouts.
702  *
703  * In the \_SB.PCI0.PEG0.PG00._OFF code deeper down writes bit 0x80 to the not
704  * documented PCI config space register 0x248 of the Intel PCIe bridge
705  * controller (0x1901) in order to change the state of the PCIe link between
706  * the PCIe port and the GPU. There are alternative code paths using other
707  * registers, which seem to work fine (executed pre Windows 8):
708  *  - 0xbc bit 0x20 (publicly available documentation claims 'reserved')
709  *  - 0xb0 bit 0x10 (link disable)
710  * Changing the conditions inside the firmware by poking into the relevant
711  * addresses does resolve the issue, but it seemed to be ACPI private memory
712  * and not any device accessible memory at all, so there is no portable way of
713  * changing the conditions.
714  * On a XPS 9560 that means bits [0,3] on \CPEX need to be cleared.
715  *
716  * The only systems where this behavior can be seen are hybrid graphics laptops
717  * with a secondary Nvidia Maxwell, Pascal or Turing GPU. It's unclear whether
718  * this issue only occurs in combination with listed Intel PCIe bridge
719  * controllers and the mentioned GPUs or other devices as well.
720  *
721  * documentation on the PCIe bridge controller can be found in the
722  * "7th Generation Intel® Processor Families for H Platforms Datasheet Volume 2"
723  * Section "12 PCI Express* Controller (x16) Registers"
724  */
725 
726 static void quirk_broken_nv_runpm(struct pci_dev *pdev)
727 {
728 	struct drm_device *dev = pci_get_drvdata(pdev);
729 	struct nouveau_drm *drm = nouveau_drm(dev);
730 	struct pci_dev *bridge = pci_upstream_bridge(pdev);
731 
732 	if (!bridge || bridge->vendor != PCI_VENDOR_ID_INTEL)
733 		return;
734 
735 	switch (bridge->device) {
736 	case 0x1901:
737 		drm->old_pm_cap = pdev->pm_cap;
738 		pdev->pm_cap = 0;
739 		NV_INFO(drm, "Disabling PCI power management to avoid bug\n");
740 		break;
741 	}
742 }
743 
744 static int nouveau_drm_probe(struct pci_dev *pdev,
745 			     const struct pci_device_id *pent)
746 {
747 	struct nvkm_device *device;
748 	struct drm_device *drm_dev;
749 	int ret;
750 
751 	if (vga_switcheroo_client_probe_defer(pdev))
752 		return -EPROBE_DEFER;
753 
754 	/* We need to check that the chipset is supported before booting
755 	 * fbdev off the hardware, as there's no way to put it back.
756 	 */
757 	ret = nvkm_device_pci_new(pdev, nouveau_config, "error",
758 				  true, false, 0, &device);
759 	if (ret)
760 		return ret;
761 
762 	nvkm_device_del(&device);
763 
764 	/* Remove conflicting drivers (vesafb, efifb etc). */
765 	ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &driver_pci);
766 	if (ret)
767 		return ret;
768 
769 	ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
770 				  true, true, ~0ULL, &device);
771 	if (ret)
772 		return ret;
773 
774 	pci_set_master(pdev);
775 
776 	if (nouveau_atomic)
777 		driver_pci.driver_features |= DRIVER_ATOMIC;
778 
779 	drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev);
780 	if (IS_ERR(drm_dev)) {
781 		ret = PTR_ERR(drm_dev);
782 		goto fail_nvkm;
783 	}
784 
785 	ret = pci_enable_device(pdev);
786 	if (ret)
787 		goto fail_drm;
788 
789 	pci_set_drvdata(pdev, drm_dev);
790 
791 	ret = nouveau_drm_device_init(drm_dev);
792 	if (ret)
793 		goto fail_pci;
794 
795 	ret = drm_dev_register(drm_dev, pent->driver_data);
796 	if (ret)
797 		goto fail_drm_dev_init;
798 
799 	quirk_broken_nv_runpm(pdev);
800 	return 0;
801 
802 fail_drm_dev_init:
803 	nouveau_drm_device_fini(drm_dev);
804 fail_pci:
805 	pci_disable_device(pdev);
806 fail_drm:
807 	drm_dev_put(drm_dev);
808 fail_nvkm:
809 	nvkm_device_del(&device);
810 	return ret;
811 }
812 
813 void
814 nouveau_drm_device_remove(struct drm_device *dev)
815 {
816 	struct nouveau_drm *drm = nouveau_drm(dev);
817 	struct nvkm_client *client;
818 	struct nvkm_device *device;
819 
820 	drm_dev_unplug(dev);
821 
822 	client = nvxx_client(&drm->client.base);
823 	device = nvkm_device_find(client->device);
824 
825 	nouveau_drm_device_fini(dev);
826 	drm_dev_put(dev);
827 	nvkm_device_del(&device);
828 }
829 
830 static void
831 nouveau_drm_remove(struct pci_dev *pdev)
832 {
833 	struct drm_device *dev = pci_get_drvdata(pdev);
834 	struct nouveau_drm *drm = nouveau_drm(dev);
835 
836 	/* revert our workaround */
837 	if (drm->old_pm_cap)
838 		pdev->pm_cap = drm->old_pm_cap;
839 	nouveau_drm_device_remove(dev);
840 	pci_disable_device(pdev);
841 }
842 
843 static int
844 nouveau_do_suspend(struct drm_device *dev, bool runtime)
845 {
846 	struct nouveau_drm *drm = nouveau_drm(dev);
847 	struct ttm_resource_manager *man;
848 	int ret;
849 
850 	nouveau_svm_suspend(drm);
851 	nouveau_dmem_suspend(drm);
852 	nouveau_led_suspend(dev);
853 
854 	if (dev->mode_config.num_crtc) {
855 		NV_DEBUG(drm, "suspending console...\n");
856 		nouveau_fbcon_set_suspend(dev, 1);
857 		NV_DEBUG(drm, "suspending display...\n");
858 		ret = nouveau_display_suspend(dev, runtime);
859 		if (ret)
860 			return ret;
861 	}
862 
863 	NV_DEBUG(drm, "evicting buffers...\n");
864 
865 	man = ttm_manager_type(&drm->ttm.bdev, TTM_PL_VRAM);
866 	ttm_resource_manager_evict_all(&drm->ttm.bdev, man);
867 
868 	NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
869 	if (drm->cechan) {
870 		ret = nouveau_channel_idle(drm->cechan);
871 		if (ret)
872 			goto fail_display;
873 	}
874 
875 	if (drm->channel) {
876 		ret = nouveau_channel_idle(drm->channel);
877 		if (ret)
878 			goto fail_display;
879 	}
880 
881 	NV_DEBUG(drm, "suspending fence...\n");
882 	if (drm->fence && nouveau_fence(drm)->suspend) {
883 		if (!nouveau_fence(drm)->suspend(drm)) {
884 			ret = -ENOMEM;
885 			goto fail_display;
886 		}
887 	}
888 
889 	NV_DEBUG(drm, "suspending object tree...\n");
890 	ret = nvif_client_suspend(&drm->master.base);
891 	if (ret)
892 		goto fail_client;
893 
894 	return 0;
895 
896 fail_client:
897 	if (drm->fence && nouveau_fence(drm)->resume)
898 		nouveau_fence(drm)->resume(drm);
899 
900 fail_display:
901 	if (dev->mode_config.num_crtc) {
902 		NV_DEBUG(drm, "resuming display...\n");
903 		nouveau_display_resume(dev, runtime);
904 	}
905 	return ret;
906 }
907 
908 static int
909 nouveau_do_resume(struct drm_device *dev, bool runtime)
910 {
911 	int ret = 0;
912 	struct nouveau_drm *drm = nouveau_drm(dev);
913 
914 	NV_DEBUG(drm, "resuming object tree...\n");
915 	ret = nvif_client_resume(&drm->master.base);
916 	if (ret) {
917 		NV_ERROR(drm, "Client resume failed with error: %d\n", ret);
918 		return ret;
919 	}
920 
921 	NV_DEBUG(drm, "resuming fence...\n");
922 	if (drm->fence && nouveau_fence(drm)->resume)
923 		nouveau_fence(drm)->resume(drm);
924 
925 	nouveau_run_vbios_init(dev);
926 
927 	if (dev->mode_config.num_crtc) {
928 		NV_DEBUG(drm, "resuming display...\n");
929 		nouveau_display_resume(dev, runtime);
930 		NV_DEBUG(drm, "resuming console...\n");
931 		nouveau_fbcon_set_suspend(dev, 0);
932 	}
933 
934 	nouveau_led_resume(dev);
935 	nouveau_dmem_resume(drm);
936 	nouveau_svm_resume(drm);
937 	return 0;
938 }
939 
940 int
941 nouveau_pmops_suspend(struct device *dev)
942 {
943 	struct pci_dev *pdev = to_pci_dev(dev);
944 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
945 	int ret;
946 
947 	if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
948 	    drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
949 		return 0;
950 
951 	ret = nouveau_do_suspend(drm_dev, false);
952 	if (ret)
953 		return ret;
954 
955 	pci_save_state(pdev);
956 	pci_disable_device(pdev);
957 	pci_set_power_state(pdev, PCI_D3hot);
958 	udelay(200);
959 	return 0;
960 }
961 
962 int
963 nouveau_pmops_resume(struct device *dev)
964 {
965 	struct pci_dev *pdev = to_pci_dev(dev);
966 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
967 	int ret;
968 
969 	if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
970 	    drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
971 		return 0;
972 
973 	pci_set_power_state(pdev, PCI_D0);
974 	pci_restore_state(pdev);
975 	ret = pci_enable_device(pdev);
976 	if (ret)
977 		return ret;
978 	pci_set_master(pdev);
979 
980 	ret = nouveau_do_resume(drm_dev, false);
981 
982 	/* Monitors may have been connected / disconnected during suspend */
983 	nouveau_display_hpd_resume(drm_dev);
984 
985 	return ret;
986 }
987 
988 static int
989 nouveau_pmops_freeze(struct device *dev)
990 {
991 	struct pci_dev *pdev = to_pci_dev(dev);
992 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
993 	return nouveau_do_suspend(drm_dev, false);
994 }
995 
996 static int
997 nouveau_pmops_thaw(struct device *dev)
998 {
999 	struct pci_dev *pdev = to_pci_dev(dev);
1000 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
1001 	return nouveau_do_resume(drm_dev, false);
1002 }
1003 
1004 bool
1005 nouveau_pmops_runtime(void)
1006 {
1007 	if (nouveau_runtime_pm == -1)
1008 		return nouveau_is_optimus() || nouveau_is_v1_dsm();
1009 	return nouveau_runtime_pm == 1;
1010 }
1011 
1012 static int
1013 nouveau_pmops_runtime_suspend(struct device *dev)
1014 {
1015 	struct pci_dev *pdev = to_pci_dev(dev);
1016 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
1017 	int ret;
1018 
1019 	if (!nouveau_pmops_runtime()) {
1020 		pm_runtime_forbid(dev);
1021 		return -EBUSY;
1022 	}
1023 
1024 	nouveau_switcheroo_optimus_dsm();
1025 	ret = nouveau_do_suspend(drm_dev, true);
1026 	pci_save_state(pdev);
1027 	pci_disable_device(pdev);
1028 	pci_ignore_hotplug(pdev);
1029 	pci_set_power_state(pdev, PCI_D3cold);
1030 	drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
1031 	return ret;
1032 }
1033 
1034 static int
1035 nouveau_pmops_runtime_resume(struct device *dev)
1036 {
1037 	struct pci_dev *pdev = to_pci_dev(dev);
1038 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
1039 	struct nouveau_drm *drm = nouveau_drm(drm_dev);
1040 	struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
1041 	int ret;
1042 
1043 	if (!nouveau_pmops_runtime()) {
1044 		pm_runtime_forbid(dev);
1045 		return -EBUSY;
1046 	}
1047 
1048 	pci_set_power_state(pdev, PCI_D0);
1049 	pci_restore_state(pdev);
1050 	ret = pci_enable_device(pdev);
1051 	if (ret)
1052 		return ret;
1053 	pci_set_master(pdev);
1054 
1055 	ret = nouveau_do_resume(drm_dev, true);
1056 	if (ret) {
1057 		NV_ERROR(drm, "resume failed with: %d\n", ret);
1058 		return ret;
1059 	}
1060 
1061 	/* do magic */
1062 	nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
1063 	drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
1064 
1065 	/* Monitors may have been connected / disconnected during suspend */
1066 	nouveau_display_hpd_resume(drm_dev);
1067 
1068 	return ret;
1069 }
1070 
1071 static int
1072 nouveau_pmops_runtime_idle(struct device *dev)
1073 {
1074 	if (!nouveau_pmops_runtime()) {
1075 		pm_runtime_forbid(dev);
1076 		return -EBUSY;
1077 	}
1078 
1079 	pm_runtime_mark_last_busy(dev);
1080 	pm_runtime_autosuspend(dev);
1081 	/* we don't want the main rpm_idle to call suspend - we want to autosuspend */
1082 	return 1;
1083 }
1084 
1085 static int
1086 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
1087 {
1088 	struct nouveau_drm *drm = nouveau_drm(dev);
1089 	struct nouveau_cli *cli;
1090 	char name[32], tmpname[TASK_COMM_LEN];
1091 	int ret;
1092 
1093 	/* need to bring up power immediately if opening device */
1094 	ret = pm_runtime_get_sync(dev->dev);
1095 	if (ret < 0 && ret != -EACCES) {
1096 		pm_runtime_put_autosuspend(dev->dev);
1097 		return ret;
1098 	}
1099 
1100 	get_task_comm(tmpname, current);
1101 	snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
1102 
1103 	if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) {
1104 		ret = -ENOMEM;
1105 		goto done;
1106 	}
1107 
1108 	ret = nouveau_cli_init(drm, name, cli);
1109 	if (ret)
1110 		goto done;
1111 
1112 	fpriv->driver_priv = cli;
1113 
1114 	mutex_lock(&drm->clients_lock);
1115 	list_add(&cli->head, &drm->clients);
1116 	mutex_unlock(&drm->clients_lock);
1117 
1118 done:
1119 	if (ret && cli) {
1120 		nouveau_cli_fini(cli);
1121 		kfree(cli);
1122 	}
1123 
1124 	pm_runtime_mark_last_busy(dev->dev);
1125 	pm_runtime_put_autosuspend(dev->dev);
1126 	return ret;
1127 }
1128 
1129 static void
1130 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
1131 {
1132 	struct nouveau_cli *cli = nouveau_cli(fpriv);
1133 	struct nouveau_drm *drm = nouveau_drm(dev);
1134 	int dev_index;
1135 
1136 	/*
1137 	 * The device is gone, and as it currently stands all clients are
1138 	 * cleaned up in the removal codepath. In the future this may change
1139 	 * so that we can support hot-unplugging, but for now we immediately
1140 	 * return to avoid a double-free situation.
1141 	 */
1142 	if (!drm_dev_enter(dev, &dev_index))
1143 		return;
1144 
1145 	pm_runtime_get_sync(dev->dev);
1146 
1147 	mutex_lock(&cli->mutex);
1148 	if (cli->abi16)
1149 		nouveau_abi16_fini(cli->abi16);
1150 	mutex_unlock(&cli->mutex);
1151 
1152 	mutex_lock(&drm->clients_lock);
1153 	list_del(&cli->head);
1154 	mutex_unlock(&drm->clients_lock);
1155 
1156 	nouveau_cli_fini(cli);
1157 	kfree(cli);
1158 	pm_runtime_mark_last_busy(dev->dev);
1159 	pm_runtime_put_autosuspend(dev->dev);
1160 	drm_dev_exit(dev_index);
1161 }
1162 
1163 static const struct drm_ioctl_desc
1164 nouveau_ioctls[] = {
1165 	DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_RENDER_ALLOW),
1166 	DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1167 	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_RENDER_ALLOW),
1168 	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_RENDER_ALLOW),
1169 	DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_RENDER_ALLOW),
1170 	DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_RENDER_ALLOW),
1171 	DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_RENDER_ALLOW),
1172 	DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_INIT, nouveau_svmm_init, DRM_RENDER_ALLOW),
1173 	DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_BIND, nouveau_svmm_bind, DRM_RENDER_ALLOW),
1174 	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_RENDER_ALLOW),
1175 	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_RENDER_ALLOW),
1176 	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_RENDER_ALLOW),
1177 	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_RENDER_ALLOW),
1178 	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_RENDER_ALLOW),
1179 };
1180 
1181 long
1182 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1183 {
1184 	struct drm_file *filp = file->private_data;
1185 	struct drm_device *dev = filp->minor->dev;
1186 	long ret;
1187 
1188 	ret = pm_runtime_get_sync(dev->dev);
1189 	if (ret < 0 && ret != -EACCES) {
1190 		pm_runtime_put_autosuspend(dev->dev);
1191 		return ret;
1192 	}
1193 
1194 	switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
1195 	case DRM_NOUVEAU_NVIF:
1196 		ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
1197 		break;
1198 	default:
1199 		ret = drm_ioctl(file, cmd, arg);
1200 		break;
1201 	}
1202 
1203 	pm_runtime_mark_last_busy(dev->dev);
1204 	pm_runtime_put_autosuspend(dev->dev);
1205 	return ret;
1206 }
1207 
1208 static const struct file_operations
1209 nouveau_driver_fops = {
1210 	.owner = THIS_MODULE,
1211 	.open = drm_open,
1212 	.release = drm_release,
1213 	.unlocked_ioctl = nouveau_drm_ioctl,
1214 	.mmap = drm_gem_mmap,
1215 	.poll = drm_poll,
1216 	.read = drm_read,
1217 #if defined(CONFIG_COMPAT)
1218 	.compat_ioctl = nouveau_compat_ioctl,
1219 #endif
1220 	.llseek = noop_llseek,
1221 };
1222 
1223 static struct drm_driver
1224 driver_stub = {
1225 	.driver_features =
1226 		DRIVER_GEM | DRIVER_MODESET | DRIVER_RENDER
1227 #if defined(CONFIG_NOUVEAU_LEGACY_CTX_SUPPORT)
1228 		| DRIVER_KMS_LEGACY_CONTEXT
1229 #endif
1230 		,
1231 
1232 	.open = nouveau_drm_open,
1233 	.postclose = nouveau_drm_postclose,
1234 	.lastclose = nouveau_vga_lastclose,
1235 
1236 #if defined(CONFIG_DEBUG_FS)
1237 	.debugfs_init = nouveau_drm_debugfs_init,
1238 #endif
1239 
1240 	.ioctls = nouveau_ioctls,
1241 	.num_ioctls = ARRAY_SIZE(nouveau_ioctls),
1242 	.fops = &nouveau_driver_fops,
1243 
1244 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1245 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1246 	.gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
1247 	.gem_prime_mmap = drm_gem_prime_mmap,
1248 
1249 	.dumb_create = nouveau_display_dumb_create,
1250 	.dumb_map_offset = drm_gem_ttm_dumb_map_offset,
1251 
1252 	.name = DRIVER_NAME,
1253 	.desc = DRIVER_DESC,
1254 #ifdef GIT_REVISION
1255 	.date = GIT_REVISION,
1256 #else
1257 	.date = DRIVER_DATE,
1258 #endif
1259 	.major = DRIVER_MAJOR,
1260 	.minor = DRIVER_MINOR,
1261 	.patchlevel = DRIVER_PATCHLEVEL,
1262 };
1263 
1264 static struct pci_device_id
1265 nouveau_drm_pci_table[] = {
1266 	{
1267 		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1268 		.class = PCI_BASE_CLASS_DISPLAY << 16,
1269 		.class_mask  = 0xff << 16,
1270 	},
1271 	{
1272 		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1273 		.class = PCI_BASE_CLASS_DISPLAY << 16,
1274 		.class_mask  = 0xff << 16,
1275 	},
1276 	{}
1277 };
1278 
1279 static void nouveau_display_options(void)
1280 {
1281 	DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1282 
1283 	DRM_DEBUG_DRIVER("... tv_disable   : %d\n", nouveau_tv_disable);
1284 	DRM_DEBUG_DRIVER("... ignorelid    : %d\n", nouveau_ignorelid);
1285 	DRM_DEBUG_DRIVER("... duallink     : %d\n", nouveau_duallink);
1286 	DRM_DEBUG_DRIVER("... nofbaccel    : %d\n", nouveau_nofbaccel);
1287 	DRM_DEBUG_DRIVER("... config       : %s\n", nouveau_config);
1288 	DRM_DEBUG_DRIVER("... debug        : %s\n", nouveau_debug);
1289 	DRM_DEBUG_DRIVER("... noaccel      : %d\n", nouveau_noaccel);
1290 	DRM_DEBUG_DRIVER("... modeset      : %d\n", nouveau_modeset);
1291 	DRM_DEBUG_DRIVER("... runpm        : %d\n", nouveau_runtime_pm);
1292 	DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1293 	DRM_DEBUG_DRIVER("... hdmimhz      : %d\n", nouveau_hdmimhz);
1294 }
1295 
1296 static const struct dev_pm_ops nouveau_pm_ops = {
1297 	.suspend = nouveau_pmops_suspend,
1298 	.resume = nouveau_pmops_resume,
1299 	.freeze = nouveau_pmops_freeze,
1300 	.thaw = nouveau_pmops_thaw,
1301 	.poweroff = nouveau_pmops_freeze,
1302 	.restore = nouveau_pmops_resume,
1303 	.runtime_suspend = nouveau_pmops_runtime_suspend,
1304 	.runtime_resume = nouveau_pmops_runtime_resume,
1305 	.runtime_idle = nouveau_pmops_runtime_idle,
1306 };
1307 
1308 static struct pci_driver
1309 nouveau_drm_pci_driver = {
1310 	.name = "nouveau",
1311 	.id_table = nouveau_drm_pci_table,
1312 	.probe = nouveau_drm_probe,
1313 	.remove = nouveau_drm_remove,
1314 	.driver.pm = &nouveau_pm_ops,
1315 };
1316 
1317 struct drm_device *
1318 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1319 			       struct platform_device *pdev,
1320 			       struct nvkm_device **pdevice)
1321 {
1322 	struct drm_device *drm;
1323 	int err;
1324 
1325 	err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
1326 				    true, true, ~0ULL, pdevice);
1327 	if (err)
1328 		goto err_free;
1329 
1330 	drm = drm_dev_alloc(&driver_platform, &pdev->dev);
1331 	if (IS_ERR(drm)) {
1332 		err = PTR_ERR(drm);
1333 		goto err_free;
1334 	}
1335 
1336 	err = nouveau_drm_device_init(drm);
1337 	if (err)
1338 		goto err_put;
1339 
1340 	platform_set_drvdata(pdev, drm);
1341 
1342 	return drm;
1343 
1344 err_put:
1345 	drm_dev_put(drm);
1346 err_free:
1347 	nvkm_device_del(pdevice);
1348 
1349 	return ERR_PTR(err);
1350 }
1351 
1352 static int __init
1353 nouveau_drm_init(void)
1354 {
1355 	driver_pci = driver_stub;
1356 	driver_platform = driver_stub;
1357 
1358 	nouveau_display_options();
1359 
1360 	if (nouveau_modeset == -1) {
1361 		if (drm_firmware_drivers_only())
1362 			nouveau_modeset = 0;
1363 	}
1364 
1365 	if (!nouveau_modeset)
1366 		return 0;
1367 
1368 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1369 	platform_driver_register(&nouveau_platform_driver);
1370 #endif
1371 
1372 	nouveau_register_dsm_handler();
1373 	nouveau_backlight_ctor();
1374 
1375 #ifdef CONFIG_PCI
1376 	return pci_register_driver(&nouveau_drm_pci_driver);
1377 #else
1378 	return 0;
1379 #endif
1380 }
1381 
1382 static void __exit
1383 nouveau_drm_exit(void)
1384 {
1385 	if (!nouveau_modeset)
1386 		return;
1387 
1388 #ifdef CONFIG_PCI
1389 	pci_unregister_driver(&nouveau_drm_pci_driver);
1390 #endif
1391 	nouveau_backlight_dtor();
1392 	nouveau_unregister_dsm_handler();
1393 
1394 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1395 	platform_driver_unregister(&nouveau_platform_driver);
1396 #endif
1397 	if (IS_ENABLED(CONFIG_DRM_NOUVEAU_SVM))
1398 		mmu_notifier_synchronize();
1399 }
1400 
1401 module_init(nouveau_drm_init);
1402 module_exit(nouveau_drm_exit);
1403 
1404 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
1405 MODULE_AUTHOR(DRIVER_AUTHOR);
1406 MODULE_DESCRIPTION(DRIVER_DESC);
1407 MODULE_LICENSE("GPL and additional rights");
1408