1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 25 #include <linux/console.h> 26 #include <linux/delay.h> 27 #include <linux/module.h> 28 #include <linux/pci.h> 29 #include <linux/pm_runtime.h> 30 #include <linux/vga_switcheroo.h> 31 32 #include <drm/drm_crtc_helper.h> 33 #include <drm/drm_ioctl.h> 34 #include <drm/drm_vblank.h> 35 36 #include <core/gpuobj.h> 37 #include <core/option.h> 38 #include <core/pci.h> 39 #include <core/tegra.h> 40 41 #include <nvif/driver.h> 42 #include <nvif/fifo.h> 43 #include <nvif/user.h> 44 45 #include <nvif/class.h> 46 #include <nvif/cl0002.h> 47 #include <nvif/cla06f.h> 48 49 #include "nouveau_drv.h" 50 #include "nouveau_dma.h" 51 #include "nouveau_ttm.h" 52 #include "nouveau_gem.h" 53 #include "nouveau_vga.h" 54 #include "nouveau_led.h" 55 #include "nouveau_hwmon.h" 56 #include "nouveau_acpi.h" 57 #include "nouveau_bios.h" 58 #include "nouveau_ioctl.h" 59 #include "nouveau_abi16.h" 60 #include "nouveau_fbcon.h" 61 #include "nouveau_fence.h" 62 #include "nouveau_debugfs.h" 63 #include "nouveau_usif.h" 64 #include "nouveau_connector.h" 65 #include "nouveau_platform.h" 66 #include "nouveau_svm.h" 67 #include "nouveau_dmem.h" 68 69 MODULE_PARM_DESC(config, "option string to pass to driver core"); 70 static char *nouveau_config; 71 module_param_named(config, nouveau_config, charp, 0400); 72 73 MODULE_PARM_DESC(debug, "debug string to pass to driver core"); 74 static char *nouveau_debug; 75 module_param_named(debug, nouveau_debug, charp, 0400); 76 77 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); 78 static int nouveau_noaccel = 0; 79 module_param_named(noaccel, nouveau_noaccel, int, 0400); 80 81 MODULE_PARM_DESC(modeset, "enable driver (default: auto, " 82 "0 = disabled, 1 = enabled, 2 = headless)"); 83 int nouveau_modeset = -1; 84 module_param_named(modeset, nouveau_modeset, int, 0400); 85 86 MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)"); 87 static int nouveau_atomic = 0; 88 module_param_named(atomic, nouveau_atomic, int, 0400); 89 90 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); 91 static int nouveau_runtime_pm = -1; 92 module_param_named(runpm, nouveau_runtime_pm, int, 0400); 93 94 static struct drm_driver driver_stub; 95 static struct drm_driver driver_pci; 96 static struct drm_driver driver_platform; 97 98 static u64 99 nouveau_pci_name(struct pci_dev *pdev) 100 { 101 u64 name = (u64)pci_domain_nr(pdev->bus) << 32; 102 name |= pdev->bus->number << 16; 103 name |= PCI_SLOT(pdev->devfn) << 8; 104 return name | PCI_FUNC(pdev->devfn); 105 } 106 107 static u64 108 nouveau_platform_name(struct platform_device *platformdev) 109 { 110 return platformdev->id; 111 } 112 113 static u64 114 nouveau_name(struct drm_device *dev) 115 { 116 if (dev->pdev) 117 return nouveau_pci_name(dev->pdev); 118 else 119 return nouveau_platform_name(to_platform_device(dev->dev)); 120 } 121 122 static inline bool 123 nouveau_cli_work_ready(struct dma_fence *fence) 124 { 125 if (!dma_fence_is_signaled(fence)) 126 return false; 127 dma_fence_put(fence); 128 return true; 129 } 130 131 static void 132 nouveau_cli_work(struct work_struct *w) 133 { 134 struct nouveau_cli *cli = container_of(w, typeof(*cli), work); 135 struct nouveau_cli_work *work, *wtmp; 136 mutex_lock(&cli->lock); 137 list_for_each_entry_safe(work, wtmp, &cli->worker, head) { 138 if (!work->fence || nouveau_cli_work_ready(work->fence)) { 139 list_del(&work->head); 140 work->func(work); 141 } 142 } 143 mutex_unlock(&cli->lock); 144 } 145 146 static void 147 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb) 148 { 149 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb); 150 schedule_work(&work->cli->work); 151 } 152 153 void 154 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence, 155 struct nouveau_cli_work *work) 156 { 157 work->fence = dma_fence_get(fence); 158 work->cli = cli; 159 mutex_lock(&cli->lock); 160 list_add_tail(&work->head, &cli->worker); 161 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence)) 162 nouveau_cli_work_fence(fence, &work->cb); 163 mutex_unlock(&cli->lock); 164 } 165 166 static void 167 nouveau_cli_fini(struct nouveau_cli *cli) 168 { 169 /* All our channels are dead now, which means all the fences they 170 * own are signalled, and all callback functions have been called. 171 * 172 * So, after flushing the workqueue, there should be nothing left. 173 */ 174 flush_work(&cli->work); 175 WARN_ON(!list_empty(&cli->worker)); 176 177 usif_client_fini(cli); 178 nouveau_vmm_fini(&cli->svm); 179 nouveau_vmm_fini(&cli->vmm); 180 nvif_mmu_fini(&cli->mmu); 181 nvif_device_fini(&cli->device); 182 mutex_lock(&cli->drm->master.lock); 183 nvif_client_fini(&cli->base); 184 mutex_unlock(&cli->drm->master.lock); 185 } 186 187 static int 188 nouveau_cli_init(struct nouveau_drm *drm, const char *sname, 189 struct nouveau_cli *cli) 190 { 191 static const struct nvif_mclass 192 mems[] = { 193 { NVIF_CLASS_MEM_GF100, -1 }, 194 { NVIF_CLASS_MEM_NV50 , -1 }, 195 { NVIF_CLASS_MEM_NV04 , -1 }, 196 {} 197 }; 198 static const struct nvif_mclass 199 mmus[] = { 200 { NVIF_CLASS_MMU_GF100, -1 }, 201 { NVIF_CLASS_MMU_NV50 , -1 }, 202 { NVIF_CLASS_MMU_NV04 , -1 }, 203 {} 204 }; 205 static const struct nvif_mclass 206 vmms[] = { 207 { NVIF_CLASS_VMM_GP100, -1 }, 208 { NVIF_CLASS_VMM_GM200, -1 }, 209 { NVIF_CLASS_VMM_GF100, -1 }, 210 { NVIF_CLASS_VMM_NV50 , -1 }, 211 { NVIF_CLASS_VMM_NV04 , -1 }, 212 {} 213 }; 214 u64 device = nouveau_name(drm->dev); 215 int ret; 216 217 snprintf(cli->name, sizeof(cli->name), "%s", sname); 218 cli->drm = drm; 219 mutex_init(&cli->mutex); 220 usif_client_init(cli); 221 222 INIT_WORK(&cli->work, nouveau_cli_work); 223 INIT_LIST_HEAD(&cli->worker); 224 mutex_init(&cli->lock); 225 226 if (cli == &drm->master) { 227 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug, 228 cli->name, device, &cli->base); 229 } else { 230 mutex_lock(&drm->master.lock); 231 ret = nvif_client_init(&drm->master.base, cli->name, device, 232 &cli->base); 233 mutex_unlock(&drm->master.lock); 234 } 235 if (ret) { 236 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret); 237 goto done; 238 } 239 240 ret = nvif_device_init(&cli->base.object, 0, NV_DEVICE, 241 &(struct nv_device_v0) { 242 .device = ~0, 243 }, sizeof(struct nv_device_v0), 244 &cli->device); 245 if (ret) { 246 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret); 247 goto done; 248 } 249 250 ret = nvif_mclass(&cli->device.object, mmus); 251 if (ret < 0) { 252 NV_PRINTK(err, cli, "No supported MMU class\n"); 253 goto done; 254 } 255 256 ret = nvif_mmu_init(&cli->device.object, mmus[ret].oclass, &cli->mmu); 257 if (ret) { 258 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret); 259 goto done; 260 } 261 262 ret = nvif_mclass(&cli->mmu.object, vmms); 263 if (ret < 0) { 264 NV_PRINTK(err, cli, "No supported VMM class\n"); 265 goto done; 266 } 267 268 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm); 269 if (ret) { 270 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret); 271 goto done; 272 } 273 274 ret = nvif_mclass(&cli->mmu.object, mems); 275 if (ret < 0) { 276 NV_PRINTK(err, cli, "No supported MEM class\n"); 277 goto done; 278 } 279 280 cli->mem = &mems[ret]; 281 return 0; 282 done: 283 if (ret) 284 nouveau_cli_fini(cli); 285 return ret; 286 } 287 288 static void 289 nouveau_accel_ce_fini(struct nouveau_drm *drm) 290 { 291 nouveau_channel_idle(drm->cechan); 292 nvif_object_fini(&drm->ttm.copy); 293 nouveau_channel_del(&drm->cechan); 294 } 295 296 static void 297 nouveau_accel_ce_init(struct nouveau_drm *drm) 298 { 299 struct nvif_device *device = &drm->client.device; 300 int ret = 0; 301 302 /* Allocate channel that has access to a (preferably async) copy 303 * engine, to use for TTM buffer moves. 304 */ 305 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { 306 ret = nouveau_channel_new(drm, device, 307 nvif_fifo_runlist_ce(device), 0, 308 true, &drm->cechan); 309 } else 310 if (device->info.chipset >= 0xa3 && 311 device->info.chipset != 0xaa && 312 device->info.chipset != 0xac) { 313 /* Prior to Kepler, there's only a single runlist, so all 314 * engines can be accessed from any channel. 315 * 316 * We still want to use a separate channel though. 317 */ 318 ret = nouveau_channel_new(drm, device, NvDmaFB, NvDmaTT, false, 319 &drm->cechan); 320 } 321 322 if (ret) 323 NV_ERROR(drm, "failed to create ce channel, %d\n", ret); 324 } 325 326 static void 327 nouveau_accel_gr_fini(struct nouveau_drm *drm) 328 { 329 nouveau_channel_idle(drm->channel); 330 nvif_object_fini(&drm->ntfy); 331 nvkm_gpuobj_del(&drm->notify); 332 nvif_object_fini(&drm->nvsw); 333 nouveau_channel_del(&drm->channel); 334 } 335 336 static void 337 nouveau_accel_gr_init(struct nouveau_drm *drm) 338 { 339 struct nvif_device *device = &drm->client.device; 340 u32 arg0, arg1; 341 int ret; 342 343 /* Allocate channel that has access to the graphics engine. */ 344 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { 345 arg0 = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_GR); 346 arg1 = 1; 347 } else { 348 arg0 = NvDmaFB; 349 arg1 = NvDmaTT; 350 } 351 352 ret = nouveau_channel_new(drm, device, arg0, arg1, false, 353 &drm->channel); 354 if (ret) { 355 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); 356 nouveau_accel_gr_fini(drm); 357 return; 358 } 359 360 /* A SW class is used on pre-NV50 HW to assist with handling the 361 * synchronisation of page flips, as well as to implement fences 362 * on TNT/TNT2 HW that lacks any kind of support in host. 363 */ 364 if (device->info.family < NV_DEVICE_INFO_V0_TESLA) { 365 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW, 366 nouveau_abi16_swclass(drm), NULL, 0, 367 &drm->nvsw); 368 if (ret == 0) { 369 ret = RING_SPACE(drm->channel, 2); 370 if (ret == 0) { 371 BEGIN_NV04(drm->channel, NvSubSw, 0, 1); 372 OUT_RING (drm->channel, drm->nvsw.handle); 373 } 374 } 375 376 if (ret) { 377 NV_ERROR(drm, "failed to allocate sw class, %d\n", ret); 378 nouveau_accel_gr_fini(drm); 379 return; 380 } 381 } 382 383 /* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason, 384 * even if notification is never requested, so, allocate a ctxdma on 385 * any GPU where it's possible we'll end up using M2MF for BO moves. 386 */ 387 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { 388 ret = nvkm_gpuobj_new(nvxx_device(device), 32, 0, false, NULL, 389 &drm->notify); 390 if (ret) { 391 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); 392 nouveau_accel_gr_fini(drm); 393 return; 394 } 395 396 ret = nvif_object_init(&drm->channel->user, NvNotify0, 397 NV_DMA_IN_MEMORY, 398 &(struct nv_dma_v0) { 399 .target = NV_DMA_V0_TARGET_VRAM, 400 .access = NV_DMA_V0_ACCESS_RDWR, 401 .start = drm->notify->addr, 402 .limit = drm->notify->addr + 31 403 }, sizeof(struct nv_dma_v0), 404 &drm->ntfy); 405 if (ret) { 406 nouveau_accel_gr_fini(drm); 407 return; 408 } 409 } 410 } 411 412 static void 413 nouveau_accel_fini(struct nouveau_drm *drm) 414 { 415 nouveau_accel_ce_fini(drm); 416 nouveau_accel_gr_fini(drm); 417 if (drm->fence) 418 nouveau_fence(drm)->dtor(drm); 419 } 420 421 static void 422 nouveau_accel_init(struct nouveau_drm *drm) 423 { 424 struct nvif_device *device = &drm->client.device; 425 struct nvif_sclass *sclass; 426 int ret, i, n; 427 428 if (nouveau_noaccel) 429 return; 430 431 /* Initialise global support for channels, and synchronisation. */ 432 ret = nouveau_channels_init(drm); 433 if (ret) 434 return; 435 436 /*XXX: this is crap, but the fence/channel stuff is a little 437 * backwards in some places. this will be fixed. 438 */ 439 ret = n = nvif_object_sclass_get(&device->object, &sclass); 440 if (ret < 0) 441 return; 442 443 for (ret = -ENOSYS, i = 0; i < n; i++) { 444 switch (sclass[i].oclass) { 445 case NV03_CHANNEL_DMA: 446 ret = nv04_fence_create(drm); 447 break; 448 case NV10_CHANNEL_DMA: 449 ret = nv10_fence_create(drm); 450 break; 451 case NV17_CHANNEL_DMA: 452 case NV40_CHANNEL_DMA: 453 ret = nv17_fence_create(drm); 454 break; 455 case NV50_CHANNEL_GPFIFO: 456 ret = nv50_fence_create(drm); 457 break; 458 case G82_CHANNEL_GPFIFO: 459 ret = nv84_fence_create(drm); 460 break; 461 case FERMI_CHANNEL_GPFIFO: 462 case KEPLER_CHANNEL_GPFIFO_A: 463 case KEPLER_CHANNEL_GPFIFO_B: 464 case MAXWELL_CHANNEL_GPFIFO_A: 465 case PASCAL_CHANNEL_GPFIFO_A: 466 case VOLTA_CHANNEL_GPFIFO_A: 467 case TURING_CHANNEL_GPFIFO_A: 468 ret = nvc0_fence_create(drm); 469 break; 470 default: 471 break; 472 } 473 } 474 475 nvif_object_sclass_put(&sclass); 476 if (ret) { 477 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); 478 nouveau_accel_fini(drm); 479 return; 480 } 481 482 /* Volta requires access to a doorbell register for kickoff. */ 483 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) { 484 ret = nvif_user_init(device); 485 if (ret) 486 return; 487 } 488 489 /* Allocate channels we need to support various functions. */ 490 nouveau_accel_gr_init(drm); 491 nouveau_accel_ce_init(drm); 492 493 /* Initialise accelerated TTM buffer moves. */ 494 nouveau_bo_move_init(drm); 495 } 496 497 static int 498 nouveau_drm_device_init(struct drm_device *dev) 499 { 500 struct nouveau_drm *drm; 501 int ret; 502 503 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL))) 504 return -ENOMEM; 505 dev->dev_private = drm; 506 drm->dev = dev; 507 508 ret = nouveau_cli_init(drm, "DRM-master", &drm->master); 509 if (ret) 510 goto fail_alloc; 511 512 ret = nouveau_cli_init(drm, "DRM", &drm->client); 513 if (ret) 514 goto fail_master; 515 516 dev->irq_enabled = true; 517 518 nvxx_client(&drm->client.base)->debug = 519 nvkm_dbgopt(nouveau_debug, "DRM"); 520 521 INIT_LIST_HEAD(&drm->clients); 522 spin_lock_init(&drm->tile.lock); 523 524 /* workaround an odd issue on nvc1 by disabling the device's 525 * nosnoop capability. hopefully won't cause issues until a 526 * better fix is found - assuming there is one... 527 */ 528 if (drm->client.device.info.chipset == 0xc1) 529 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000); 530 531 nouveau_vga_init(drm); 532 533 ret = nouveau_ttm_init(drm); 534 if (ret) 535 goto fail_ttm; 536 537 ret = nouveau_bios_init(dev); 538 if (ret) 539 goto fail_bios; 540 541 nouveau_accel_init(drm); 542 543 ret = nouveau_display_create(dev); 544 if (ret) 545 goto fail_dispctor; 546 547 if (dev->mode_config.num_crtc) { 548 ret = nouveau_display_init(dev, false, false); 549 if (ret) 550 goto fail_dispinit; 551 } 552 553 nouveau_debugfs_init(drm); 554 nouveau_hwmon_init(dev); 555 nouveau_svm_init(drm); 556 nouveau_dmem_init(drm); 557 nouveau_fbcon_init(dev); 558 nouveau_led_init(dev); 559 560 if (nouveau_pmops_runtime()) { 561 pm_runtime_use_autosuspend(dev->dev); 562 pm_runtime_set_autosuspend_delay(dev->dev, 5000); 563 pm_runtime_set_active(dev->dev); 564 pm_runtime_allow(dev->dev); 565 pm_runtime_mark_last_busy(dev->dev); 566 pm_runtime_put(dev->dev); 567 } 568 569 return 0; 570 571 fail_dispinit: 572 nouveau_display_destroy(dev); 573 fail_dispctor: 574 nouveau_accel_fini(drm); 575 nouveau_bios_takedown(dev); 576 fail_bios: 577 nouveau_ttm_fini(drm); 578 fail_ttm: 579 nouveau_vga_fini(drm); 580 nouveau_cli_fini(&drm->client); 581 fail_master: 582 nouveau_cli_fini(&drm->master); 583 fail_alloc: 584 kfree(drm); 585 return ret; 586 } 587 588 static void 589 nouveau_drm_device_fini(struct drm_device *dev) 590 { 591 struct nouveau_drm *drm = nouveau_drm(dev); 592 593 if (nouveau_pmops_runtime()) { 594 pm_runtime_get_sync(dev->dev); 595 pm_runtime_forbid(dev->dev); 596 } 597 598 nouveau_led_fini(dev); 599 nouveau_fbcon_fini(dev); 600 nouveau_dmem_fini(drm); 601 nouveau_svm_fini(drm); 602 nouveau_hwmon_fini(dev); 603 nouveau_debugfs_fini(drm); 604 605 if (dev->mode_config.num_crtc) 606 nouveau_display_fini(dev, false, false); 607 nouveau_display_destroy(dev); 608 609 nouveau_accel_fini(drm); 610 nouveau_bios_takedown(dev); 611 612 nouveau_ttm_fini(drm); 613 nouveau_vga_fini(drm); 614 615 nouveau_cli_fini(&drm->client); 616 nouveau_cli_fini(&drm->master); 617 kfree(drm); 618 } 619 620 static int nouveau_drm_probe(struct pci_dev *pdev, 621 const struct pci_device_id *pent) 622 { 623 struct nvkm_device *device; 624 struct drm_device *drm_dev; 625 struct apertures_struct *aper; 626 bool boot = false; 627 int ret; 628 629 if (vga_switcheroo_client_probe_defer(pdev)) 630 return -EPROBE_DEFER; 631 632 /* We need to check that the chipset is supported before booting 633 * fbdev off the hardware, as there's no way to put it back. 634 */ 635 ret = nvkm_device_pci_new(pdev, nouveau_config, "error", 636 true, false, 0, &device); 637 if (ret) 638 return ret; 639 640 nvkm_device_del(&device); 641 642 /* Remove conflicting drivers (vesafb, efifb etc). */ 643 aper = alloc_apertures(3); 644 if (!aper) 645 return -ENOMEM; 646 647 aper->ranges[0].base = pci_resource_start(pdev, 1); 648 aper->ranges[0].size = pci_resource_len(pdev, 1); 649 aper->count = 1; 650 651 if (pci_resource_len(pdev, 2)) { 652 aper->ranges[aper->count].base = pci_resource_start(pdev, 2); 653 aper->ranges[aper->count].size = pci_resource_len(pdev, 2); 654 aper->count++; 655 } 656 657 if (pci_resource_len(pdev, 3)) { 658 aper->ranges[aper->count].base = pci_resource_start(pdev, 3); 659 aper->ranges[aper->count].size = pci_resource_len(pdev, 3); 660 aper->count++; 661 } 662 663 #ifdef CONFIG_X86 664 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 665 #endif 666 if (nouveau_modeset != 2) 667 drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot); 668 kfree(aper); 669 670 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug, 671 true, true, ~0ULL, &device); 672 if (ret) 673 return ret; 674 675 pci_set_master(pdev); 676 677 if (nouveau_atomic) 678 driver_pci.driver_features |= DRIVER_ATOMIC; 679 680 drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev); 681 if (IS_ERR(drm_dev)) { 682 ret = PTR_ERR(drm_dev); 683 goto fail_nvkm; 684 } 685 686 ret = pci_enable_device(pdev); 687 if (ret) 688 goto fail_drm; 689 690 drm_dev->pdev = pdev; 691 pci_set_drvdata(pdev, drm_dev); 692 693 ret = nouveau_drm_device_init(drm_dev); 694 if (ret) 695 goto fail_pci; 696 697 ret = drm_dev_register(drm_dev, pent->driver_data); 698 if (ret) 699 goto fail_drm_dev_init; 700 701 return 0; 702 703 fail_drm_dev_init: 704 nouveau_drm_device_fini(drm_dev); 705 fail_pci: 706 pci_disable_device(pdev); 707 fail_drm: 708 drm_dev_put(drm_dev); 709 fail_nvkm: 710 nvkm_device_del(&device); 711 return ret; 712 } 713 714 void 715 nouveau_drm_device_remove(struct drm_device *dev) 716 { 717 struct pci_dev *pdev = dev->pdev; 718 struct nouveau_drm *drm = nouveau_drm(dev); 719 struct nvkm_client *client; 720 struct nvkm_device *device; 721 722 drm_dev_unregister(dev); 723 724 dev->irq_enabled = false; 725 client = nvxx_client(&drm->client.base); 726 device = nvkm_device_find(client->device); 727 728 nouveau_drm_device_fini(dev); 729 pci_disable_device(pdev); 730 drm_dev_put(dev); 731 nvkm_device_del(&device); 732 } 733 734 static void 735 nouveau_drm_remove(struct pci_dev *pdev) 736 { 737 struct drm_device *dev = pci_get_drvdata(pdev); 738 739 nouveau_drm_device_remove(dev); 740 } 741 742 static int 743 nouveau_do_suspend(struct drm_device *dev, bool runtime) 744 { 745 struct nouveau_drm *drm = nouveau_drm(dev); 746 int ret; 747 748 nouveau_svm_suspend(drm); 749 nouveau_dmem_suspend(drm); 750 nouveau_led_suspend(dev); 751 752 if (dev->mode_config.num_crtc) { 753 NV_DEBUG(drm, "suspending console...\n"); 754 nouveau_fbcon_set_suspend(dev, 1); 755 NV_DEBUG(drm, "suspending display...\n"); 756 ret = nouveau_display_suspend(dev, runtime); 757 if (ret) 758 return ret; 759 } 760 761 NV_DEBUG(drm, "evicting buffers...\n"); 762 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); 763 764 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n"); 765 if (drm->cechan) { 766 ret = nouveau_channel_idle(drm->cechan); 767 if (ret) 768 goto fail_display; 769 } 770 771 if (drm->channel) { 772 ret = nouveau_channel_idle(drm->channel); 773 if (ret) 774 goto fail_display; 775 } 776 777 NV_DEBUG(drm, "suspending fence...\n"); 778 if (drm->fence && nouveau_fence(drm)->suspend) { 779 if (!nouveau_fence(drm)->suspend(drm)) { 780 ret = -ENOMEM; 781 goto fail_display; 782 } 783 } 784 785 NV_DEBUG(drm, "suspending object tree...\n"); 786 ret = nvif_client_suspend(&drm->master.base); 787 if (ret) 788 goto fail_client; 789 790 return 0; 791 792 fail_client: 793 if (drm->fence && nouveau_fence(drm)->resume) 794 nouveau_fence(drm)->resume(drm); 795 796 fail_display: 797 if (dev->mode_config.num_crtc) { 798 NV_DEBUG(drm, "resuming display...\n"); 799 nouveau_display_resume(dev, runtime); 800 } 801 return ret; 802 } 803 804 static int 805 nouveau_do_resume(struct drm_device *dev, bool runtime) 806 { 807 int ret = 0; 808 struct nouveau_drm *drm = nouveau_drm(dev); 809 810 NV_DEBUG(drm, "resuming object tree...\n"); 811 ret = nvif_client_resume(&drm->master.base); 812 if (ret) { 813 NV_ERROR(drm, "Client resume failed with error: %d\n", ret); 814 return ret; 815 } 816 817 NV_DEBUG(drm, "resuming fence...\n"); 818 if (drm->fence && nouveau_fence(drm)->resume) 819 nouveau_fence(drm)->resume(drm); 820 821 nouveau_run_vbios_init(dev); 822 823 if (dev->mode_config.num_crtc) { 824 NV_DEBUG(drm, "resuming display...\n"); 825 nouveau_display_resume(dev, runtime); 826 NV_DEBUG(drm, "resuming console...\n"); 827 nouveau_fbcon_set_suspend(dev, 0); 828 } 829 830 nouveau_led_resume(dev); 831 nouveau_dmem_resume(drm); 832 nouveau_svm_resume(drm); 833 return 0; 834 } 835 836 int 837 nouveau_pmops_suspend(struct device *dev) 838 { 839 struct pci_dev *pdev = to_pci_dev(dev); 840 struct drm_device *drm_dev = pci_get_drvdata(pdev); 841 int ret; 842 843 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || 844 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 845 return 0; 846 847 ret = nouveau_do_suspend(drm_dev, false); 848 if (ret) 849 return ret; 850 851 pci_save_state(pdev); 852 pci_disable_device(pdev); 853 pci_set_power_state(pdev, PCI_D3hot); 854 udelay(200); 855 return 0; 856 } 857 858 int 859 nouveau_pmops_resume(struct device *dev) 860 { 861 struct pci_dev *pdev = to_pci_dev(dev); 862 struct drm_device *drm_dev = pci_get_drvdata(pdev); 863 int ret; 864 865 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || 866 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 867 return 0; 868 869 pci_set_power_state(pdev, PCI_D0); 870 pci_restore_state(pdev); 871 ret = pci_enable_device(pdev); 872 if (ret) 873 return ret; 874 pci_set_master(pdev); 875 876 ret = nouveau_do_resume(drm_dev, false); 877 878 /* Monitors may have been connected / disconnected during suspend */ 879 schedule_work(&nouveau_drm(drm_dev)->hpd_work); 880 881 return ret; 882 } 883 884 static int 885 nouveau_pmops_freeze(struct device *dev) 886 { 887 struct pci_dev *pdev = to_pci_dev(dev); 888 struct drm_device *drm_dev = pci_get_drvdata(pdev); 889 return nouveau_do_suspend(drm_dev, false); 890 } 891 892 static int 893 nouveau_pmops_thaw(struct device *dev) 894 { 895 struct pci_dev *pdev = to_pci_dev(dev); 896 struct drm_device *drm_dev = pci_get_drvdata(pdev); 897 return nouveau_do_resume(drm_dev, false); 898 } 899 900 bool 901 nouveau_pmops_runtime(void) 902 { 903 if (nouveau_runtime_pm == -1) 904 return nouveau_is_optimus() || nouveau_is_v1_dsm(); 905 return nouveau_runtime_pm == 1; 906 } 907 908 static int 909 nouveau_pmops_runtime_suspend(struct device *dev) 910 { 911 struct pci_dev *pdev = to_pci_dev(dev); 912 struct drm_device *drm_dev = pci_get_drvdata(pdev); 913 int ret; 914 915 if (!nouveau_pmops_runtime()) { 916 pm_runtime_forbid(dev); 917 return -EBUSY; 918 } 919 920 nouveau_switcheroo_optimus_dsm(); 921 ret = nouveau_do_suspend(drm_dev, true); 922 pci_save_state(pdev); 923 pci_disable_device(pdev); 924 pci_ignore_hotplug(pdev); 925 pci_set_power_state(pdev, PCI_D3cold); 926 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 927 return ret; 928 } 929 930 static int 931 nouveau_pmops_runtime_resume(struct device *dev) 932 { 933 struct pci_dev *pdev = to_pci_dev(dev); 934 struct drm_device *drm_dev = pci_get_drvdata(pdev); 935 struct nouveau_drm *drm = nouveau_drm(drm_dev); 936 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device; 937 int ret; 938 939 if (!nouveau_pmops_runtime()) { 940 pm_runtime_forbid(dev); 941 return -EBUSY; 942 } 943 944 pci_set_power_state(pdev, PCI_D0); 945 pci_restore_state(pdev); 946 ret = pci_enable_device(pdev); 947 if (ret) 948 return ret; 949 pci_set_master(pdev); 950 951 ret = nouveau_do_resume(drm_dev, true); 952 if (ret) { 953 NV_ERROR(drm, "resume failed with: %d\n", ret); 954 return ret; 955 } 956 957 /* do magic */ 958 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25)); 959 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 960 961 /* Monitors may have been connected / disconnected during suspend */ 962 schedule_work(&nouveau_drm(drm_dev)->hpd_work); 963 964 return ret; 965 } 966 967 static int 968 nouveau_pmops_runtime_idle(struct device *dev) 969 { 970 if (!nouveau_pmops_runtime()) { 971 pm_runtime_forbid(dev); 972 return -EBUSY; 973 } 974 975 pm_runtime_mark_last_busy(dev); 976 pm_runtime_autosuspend(dev); 977 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 978 return 1; 979 } 980 981 static int 982 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) 983 { 984 struct nouveau_drm *drm = nouveau_drm(dev); 985 struct nouveau_cli *cli; 986 char name[32], tmpname[TASK_COMM_LEN]; 987 int ret; 988 989 /* need to bring up power immediately if opening device */ 990 ret = pm_runtime_get_sync(dev->dev); 991 if (ret < 0 && ret != -EACCES) 992 return ret; 993 994 get_task_comm(tmpname, current); 995 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); 996 997 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) { 998 ret = -ENOMEM; 999 goto done; 1000 } 1001 1002 ret = nouveau_cli_init(drm, name, cli); 1003 if (ret) 1004 goto done; 1005 1006 cli->base.super = false; 1007 1008 fpriv->driver_priv = cli; 1009 1010 mutex_lock(&drm->client.mutex); 1011 list_add(&cli->head, &drm->clients); 1012 mutex_unlock(&drm->client.mutex); 1013 1014 done: 1015 if (ret && cli) { 1016 nouveau_cli_fini(cli); 1017 kfree(cli); 1018 } 1019 1020 pm_runtime_mark_last_busy(dev->dev); 1021 pm_runtime_put_autosuspend(dev->dev); 1022 return ret; 1023 } 1024 1025 static void 1026 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) 1027 { 1028 struct nouveau_cli *cli = nouveau_cli(fpriv); 1029 struct nouveau_drm *drm = nouveau_drm(dev); 1030 1031 pm_runtime_get_sync(dev->dev); 1032 1033 mutex_lock(&cli->mutex); 1034 if (cli->abi16) 1035 nouveau_abi16_fini(cli->abi16); 1036 mutex_unlock(&cli->mutex); 1037 1038 mutex_lock(&drm->client.mutex); 1039 list_del(&cli->head); 1040 mutex_unlock(&drm->client.mutex); 1041 1042 nouveau_cli_fini(cli); 1043 kfree(cli); 1044 pm_runtime_mark_last_busy(dev->dev); 1045 pm_runtime_put_autosuspend(dev->dev); 1046 } 1047 1048 static const struct drm_ioctl_desc 1049 nouveau_ioctls[] = { 1050 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_RENDER_ALLOW), 1051 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 1052 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_RENDER_ALLOW), 1053 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_RENDER_ALLOW), 1054 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_RENDER_ALLOW), 1055 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_RENDER_ALLOW), 1056 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_RENDER_ALLOW), 1057 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_INIT, nouveau_svmm_init, DRM_RENDER_ALLOW), 1058 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_BIND, nouveau_svmm_bind, DRM_RENDER_ALLOW), 1059 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_RENDER_ALLOW), 1060 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_RENDER_ALLOW), 1061 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_RENDER_ALLOW), 1062 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_RENDER_ALLOW), 1063 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_RENDER_ALLOW), 1064 }; 1065 1066 long 1067 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 1068 { 1069 struct drm_file *filp = file->private_data; 1070 struct drm_device *dev = filp->minor->dev; 1071 long ret; 1072 1073 ret = pm_runtime_get_sync(dev->dev); 1074 if (ret < 0 && ret != -EACCES) 1075 return ret; 1076 1077 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) { 1078 case DRM_NOUVEAU_NVIF: 1079 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd)); 1080 break; 1081 default: 1082 ret = drm_ioctl(file, cmd, arg); 1083 break; 1084 } 1085 1086 pm_runtime_mark_last_busy(dev->dev); 1087 pm_runtime_put_autosuspend(dev->dev); 1088 return ret; 1089 } 1090 1091 static const struct file_operations 1092 nouveau_driver_fops = { 1093 .owner = THIS_MODULE, 1094 .open = drm_open, 1095 .release = drm_release, 1096 .unlocked_ioctl = nouveau_drm_ioctl, 1097 .mmap = nouveau_ttm_mmap, 1098 .poll = drm_poll, 1099 .read = drm_read, 1100 #if defined(CONFIG_COMPAT) 1101 .compat_ioctl = nouveau_compat_ioctl, 1102 #endif 1103 .llseek = noop_llseek, 1104 }; 1105 1106 static struct drm_driver 1107 driver_stub = { 1108 .driver_features = 1109 DRIVER_GEM | DRIVER_MODESET | DRIVER_RENDER 1110 #if defined(CONFIG_NOUVEAU_LEGACY_CTX_SUPPORT) 1111 | DRIVER_KMS_LEGACY_CONTEXT 1112 #endif 1113 , 1114 1115 .open = nouveau_drm_open, 1116 .postclose = nouveau_drm_postclose, 1117 .lastclose = nouveau_vga_lastclose, 1118 1119 #if defined(CONFIG_DEBUG_FS) 1120 .debugfs_init = nouveau_drm_debugfs_init, 1121 #endif 1122 1123 .enable_vblank = nouveau_display_vblank_enable, 1124 .disable_vblank = nouveau_display_vblank_disable, 1125 .get_scanout_position = nouveau_display_scanoutpos, 1126 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos, 1127 1128 .ioctls = nouveau_ioctls, 1129 .num_ioctls = ARRAY_SIZE(nouveau_ioctls), 1130 .fops = &nouveau_driver_fops, 1131 1132 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 1133 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 1134 .gem_prime_pin = nouveau_gem_prime_pin, 1135 .gem_prime_unpin = nouveau_gem_prime_unpin, 1136 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table, 1137 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, 1138 .gem_prime_vmap = nouveau_gem_prime_vmap, 1139 .gem_prime_vunmap = nouveau_gem_prime_vunmap, 1140 1141 .gem_free_object_unlocked = nouveau_gem_object_del, 1142 .gem_open_object = nouveau_gem_object_open, 1143 .gem_close_object = nouveau_gem_object_close, 1144 1145 .dumb_create = nouveau_display_dumb_create, 1146 .dumb_map_offset = nouveau_display_dumb_map_offset, 1147 1148 .name = DRIVER_NAME, 1149 .desc = DRIVER_DESC, 1150 #ifdef GIT_REVISION 1151 .date = GIT_REVISION, 1152 #else 1153 .date = DRIVER_DATE, 1154 #endif 1155 .major = DRIVER_MAJOR, 1156 .minor = DRIVER_MINOR, 1157 .patchlevel = DRIVER_PATCHLEVEL, 1158 }; 1159 1160 static struct pci_device_id 1161 nouveau_drm_pci_table[] = { 1162 { 1163 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), 1164 .class = PCI_BASE_CLASS_DISPLAY << 16, 1165 .class_mask = 0xff << 16, 1166 }, 1167 { 1168 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), 1169 .class = PCI_BASE_CLASS_DISPLAY << 16, 1170 .class_mask = 0xff << 16, 1171 }, 1172 {} 1173 }; 1174 1175 static void nouveau_display_options(void) 1176 { 1177 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n"); 1178 1179 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable); 1180 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid); 1181 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink); 1182 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel); 1183 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config); 1184 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug); 1185 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel); 1186 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset); 1187 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm); 1188 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf); 1189 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz); 1190 } 1191 1192 static const struct dev_pm_ops nouveau_pm_ops = { 1193 .suspend = nouveau_pmops_suspend, 1194 .resume = nouveau_pmops_resume, 1195 .freeze = nouveau_pmops_freeze, 1196 .thaw = nouveau_pmops_thaw, 1197 .poweroff = nouveau_pmops_freeze, 1198 .restore = nouveau_pmops_resume, 1199 .runtime_suspend = nouveau_pmops_runtime_suspend, 1200 .runtime_resume = nouveau_pmops_runtime_resume, 1201 .runtime_idle = nouveau_pmops_runtime_idle, 1202 }; 1203 1204 static struct pci_driver 1205 nouveau_drm_pci_driver = { 1206 .name = "nouveau", 1207 .id_table = nouveau_drm_pci_table, 1208 .probe = nouveau_drm_probe, 1209 .remove = nouveau_drm_remove, 1210 .driver.pm = &nouveau_pm_ops, 1211 }; 1212 1213 struct drm_device * 1214 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, 1215 struct platform_device *pdev, 1216 struct nvkm_device **pdevice) 1217 { 1218 struct drm_device *drm; 1219 int err; 1220 1221 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug, 1222 true, true, ~0ULL, pdevice); 1223 if (err) 1224 goto err_free; 1225 1226 drm = drm_dev_alloc(&driver_platform, &pdev->dev); 1227 if (IS_ERR(drm)) { 1228 err = PTR_ERR(drm); 1229 goto err_free; 1230 } 1231 1232 err = nouveau_drm_device_init(drm); 1233 if (err) 1234 goto err_put; 1235 1236 platform_set_drvdata(pdev, drm); 1237 1238 return drm; 1239 1240 err_put: 1241 drm_dev_put(drm); 1242 err_free: 1243 nvkm_device_del(pdevice); 1244 1245 return ERR_PTR(err); 1246 } 1247 1248 static int __init 1249 nouveau_drm_init(void) 1250 { 1251 driver_pci = driver_stub; 1252 driver_platform = driver_stub; 1253 1254 nouveau_display_options(); 1255 1256 if (nouveau_modeset == -1) { 1257 if (vgacon_text_force()) 1258 nouveau_modeset = 0; 1259 } 1260 1261 if (!nouveau_modeset) 1262 return 0; 1263 1264 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1265 platform_driver_register(&nouveau_platform_driver); 1266 #endif 1267 1268 nouveau_register_dsm_handler(); 1269 nouveau_backlight_ctor(); 1270 1271 #ifdef CONFIG_PCI 1272 return pci_register_driver(&nouveau_drm_pci_driver); 1273 #else 1274 return 0; 1275 #endif 1276 } 1277 1278 static void __exit 1279 nouveau_drm_exit(void) 1280 { 1281 if (!nouveau_modeset) 1282 return; 1283 1284 #ifdef CONFIG_PCI 1285 pci_unregister_driver(&nouveau_drm_pci_driver); 1286 #endif 1287 nouveau_backlight_dtor(); 1288 nouveau_unregister_dsm_handler(); 1289 1290 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1291 platform_driver_unregister(&nouveau_platform_driver); 1292 #endif 1293 } 1294 1295 module_init(nouveau_drm_init); 1296 module_exit(nouveau_drm_exit); 1297 1298 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); 1299 MODULE_AUTHOR(DRIVER_AUTHOR); 1300 MODULE_DESCRIPTION(DRIVER_DESC); 1301 MODULE_LICENSE("GPL and additional rights"); 1302