1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 25 #include <linux/console.h> 26 #include <linux/delay.h> 27 #include <linux/module.h> 28 #include <linux/pci.h> 29 #include <linux/pm_runtime.h> 30 #include <linux/vga_switcheroo.h> 31 32 #include <drm/drmP.h> 33 #include <drm/drm_crtc_helper.h> 34 35 #include <core/gpuobj.h> 36 #include <core/option.h> 37 #include <core/pci.h> 38 #include <core/tegra.h> 39 40 #include <nvif/driver.h> 41 42 #include <nvif/class.h> 43 #include <nvif/cl0002.h> 44 #include <nvif/cla06f.h> 45 #include <nvif/if0004.h> 46 47 #include "nouveau_drv.h" 48 #include "nouveau_dma.h" 49 #include "nouveau_ttm.h" 50 #include "nouveau_gem.h" 51 #include "nouveau_vga.h" 52 #include "nouveau_led.h" 53 #include "nouveau_hwmon.h" 54 #include "nouveau_acpi.h" 55 #include "nouveau_bios.h" 56 #include "nouveau_ioctl.h" 57 #include "nouveau_abi16.h" 58 #include "nouveau_fbcon.h" 59 #include "nouveau_fence.h" 60 #include "nouveau_debugfs.h" 61 #include "nouveau_usif.h" 62 #include "nouveau_connector.h" 63 #include "nouveau_platform.h" 64 65 MODULE_PARM_DESC(config, "option string to pass to driver core"); 66 static char *nouveau_config; 67 module_param_named(config, nouveau_config, charp, 0400); 68 69 MODULE_PARM_DESC(debug, "debug string to pass to driver core"); 70 static char *nouveau_debug; 71 module_param_named(debug, nouveau_debug, charp, 0400); 72 73 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); 74 static int nouveau_noaccel = 0; 75 module_param_named(noaccel, nouveau_noaccel, int, 0400); 76 77 MODULE_PARM_DESC(modeset, "enable driver (default: auto, " 78 "0 = disabled, 1 = enabled, 2 = headless)"); 79 int nouveau_modeset = -1; 80 module_param_named(modeset, nouveau_modeset, int, 0400); 81 82 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); 83 static int nouveau_runtime_pm = -1; 84 module_param_named(runpm, nouveau_runtime_pm, int, 0400); 85 86 static struct drm_driver driver_stub; 87 static struct drm_driver driver_pci; 88 static struct drm_driver driver_platform; 89 90 static u64 91 nouveau_pci_name(struct pci_dev *pdev) 92 { 93 u64 name = (u64)pci_domain_nr(pdev->bus) << 32; 94 name |= pdev->bus->number << 16; 95 name |= PCI_SLOT(pdev->devfn) << 8; 96 return name | PCI_FUNC(pdev->devfn); 97 } 98 99 static u64 100 nouveau_platform_name(struct platform_device *platformdev) 101 { 102 return platformdev->id; 103 } 104 105 static u64 106 nouveau_name(struct drm_device *dev) 107 { 108 if (dev->pdev) 109 return nouveau_pci_name(dev->pdev); 110 else 111 return nouveau_platform_name(to_platform_device(dev->dev)); 112 } 113 114 static inline bool 115 nouveau_cli_work_ready(struct dma_fence *fence, bool wait) 116 { 117 if (!dma_fence_is_signaled(fence)) { 118 if (!wait) 119 return false; 120 WARN_ON(dma_fence_wait_timeout(fence, false, 2 * HZ) <= 0); 121 } 122 dma_fence_put(fence); 123 return true; 124 } 125 126 static void 127 nouveau_cli_work_flush(struct nouveau_cli *cli, bool wait) 128 { 129 struct nouveau_cli_work *work, *wtmp; 130 mutex_lock(&cli->lock); 131 list_for_each_entry_safe(work, wtmp, &cli->worker, head) { 132 if (!work->fence || nouveau_cli_work_ready(work->fence, wait)) { 133 list_del(&work->head); 134 work->func(work); 135 } 136 } 137 mutex_unlock(&cli->lock); 138 } 139 140 static void 141 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb) 142 { 143 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb); 144 schedule_work(&work->cli->work); 145 } 146 147 void 148 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence, 149 struct nouveau_cli_work *work) 150 { 151 work->fence = dma_fence_get(fence); 152 work->cli = cli; 153 mutex_lock(&cli->lock); 154 list_add_tail(&work->head, &cli->worker); 155 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence)) 156 nouveau_cli_work_fence(fence, &work->cb); 157 mutex_unlock(&cli->lock); 158 } 159 160 static void 161 nouveau_cli_work(struct work_struct *w) 162 { 163 struct nouveau_cli *cli = container_of(w, typeof(*cli), work); 164 nouveau_cli_work_flush(cli, false); 165 } 166 167 static void 168 nouveau_cli_fini(struct nouveau_cli *cli) 169 { 170 nouveau_cli_work_flush(cli, true); 171 usif_client_fini(cli); 172 nouveau_vmm_fini(&cli->vmm); 173 nvif_mmu_fini(&cli->mmu); 174 nvif_device_fini(&cli->device); 175 mutex_lock(&cli->drm->master.lock); 176 nvif_client_fini(&cli->base); 177 mutex_unlock(&cli->drm->master.lock); 178 } 179 180 static int 181 nouveau_cli_init(struct nouveau_drm *drm, const char *sname, 182 struct nouveau_cli *cli) 183 { 184 static const struct nvif_mclass 185 mems[] = { 186 { NVIF_CLASS_MEM_GF100, -1 }, 187 { NVIF_CLASS_MEM_NV50 , -1 }, 188 { NVIF_CLASS_MEM_NV04 , -1 }, 189 {} 190 }; 191 static const struct nvif_mclass 192 mmus[] = { 193 { NVIF_CLASS_MMU_GF100, -1 }, 194 { NVIF_CLASS_MMU_NV50 , -1 }, 195 { NVIF_CLASS_MMU_NV04 , -1 }, 196 {} 197 }; 198 static const struct nvif_mclass 199 vmms[] = { 200 { NVIF_CLASS_VMM_GP100, -1 }, 201 { NVIF_CLASS_VMM_GM200, -1 }, 202 { NVIF_CLASS_VMM_GF100, -1 }, 203 { NVIF_CLASS_VMM_NV50 , -1 }, 204 { NVIF_CLASS_VMM_NV04 , -1 }, 205 {} 206 }; 207 u64 device = nouveau_name(drm->dev); 208 int ret; 209 210 snprintf(cli->name, sizeof(cli->name), "%s", sname); 211 cli->drm = drm; 212 mutex_init(&cli->mutex); 213 usif_client_init(cli); 214 215 INIT_WORK(&cli->work, nouveau_cli_work); 216 INIT_LIST_HEAD(&cli->worker); 217 mutex_init(&cli->lock); 218 219 if (cli == &drm->master) { 220 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug, 221 cli->name, device, &cli->base); 222 } else { 223 mutex_lock(&drm->master.lock); 224 ret = nvif_client_init(&drm->master.base, cli->name, device, 225 &cli->base); 226 mutex_unlock(&drm->master.lock); 227 } 228 if (ret) { 229 NV_ERROR(drm, "Client allocation failed: %d\n", ret); 230 goto done; 231 } 232 233 ret = nvif_device_init(&cli->base.object, 0, NV_DEVICE, 234 &(struct nv_device_v0) { 235 .device = ~0, 236 }, sizeof(struct nv_device_v0), 237 &cli->device); 238 if (ret) { 239 NV_ERROR(drm, "Device allocation failed: %d\n", ret); 240 goto done; 241 } 242 243 ret = nvif_mclass(&cli->device.object, mmus); 244 if (ret < 0) { 245 NV_ERROR(drm, "No supported MMU class\n"); 246 goto done; 247 } 248 249 ret = nvif_mmu_init(&cli->device.object, mmus[ret].oclass, &cli->mmu); 250 if (ret) { 251 NV_ERROR(drm, "MMU allocation failed: %d\n", ret); 252 goto done; 253 } 254 255 ret = nvif_mclass(&cli->mmu.object, vmms); 256 if (ret < 0) { 257 NV_ERROR(drm, "No supported VMM class\n"); 258 goto done; 259 } 260 261 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm); 262 if (ret) { 263 NV_ERROR(drm, "VMM allocation failed: %d\n", ret); 264 goto done; 265 } 266 267 ret = nvif_mclass(&cli->mmu.object, mems); 268 if (ret < 0) { 269 NV_ERROR(drm, "No supported MEM class\n"); 270 goto done; 271 } 272 273 cli->mem = &mems[ret]; 274 return 0; 275 done: 276 if (ret) 277 nouveau_cli_fini(cli); 278 return ret; 279 } 280 281 static void 282 nouveau_accel_fini(struct nouveau_drm *drm) 283 { 284 nouveau_channel_idle(drm->channel); 285 nvif_object_fini(&drm->ntfy); 286 nvkm_gpuobj_del(&drm->notify); 287 nvif_notify_fini(&drm->flip); 288 nvif_object_fini(&drm->nvsw); 289 nouveau_channel_del(&drm->channel); 290 291 nouveau_channel_idle(drm->cechan); 292 nvif_object_fini(&drm->ttm.copy); 293 nouveau_channel_del(&drm->cechan); 294 295 if (drm->fence) 296 nouveau_fence(drm)->dtor(drm); 297 } 298 299 static void 300 nouveau_accel_init(struct nouveau_drm *drm) 301 { 302 struct nvif_device *device = &drm->client.device; 303 struct nvif_sclass *sclass; 304 u32 arg0, arg1; 305 int ret, i, n; 306 307 if (nouveau_noaccel) 308 return; 309 310 /* initialise synchronisation routines */ 311 /*XXX: this is crap, but the fence/channel stuff is a little 312 * backwards in some places. this will be fixed. 313 */ 314 ret = n = nvif_object_sclass_get(&device->object, &sclass); 315 if (ret < 0) 316 return; 317 318 for (ret = -ENOSYS, i = 0; i < n; i++) { 319 switch (sclass[i].oclass) { 320 case NV03_CHANNEL_DMA: 321 ret = nv04_fence_create(drm); 322 break; 323 case NV10_CHANNEL_DMA: 324 ret = nv10_fence_create(drm); 325 break; 326 case NV17_CHANNEL_DMA: 327 case NV40_CHANNEL_DMA: 328 ret = nv17_fence_create(drm); 329 break; 330 case NV50_CHANNEL_GPFIFO: 331 ret = nv50_fence_create(drm); 332 break; 333 case G82_CHANNEL_GPFIFO: 334 ret = nv84_fence_create(drm); 335 break; 336 case FERMI_CHANNEL_GPFIFO: 337 case KEPLER_CHANNEL_GPFIFO_A: 338 case KEPLER_CHANNEL_GPFIFO_B: 339 case MAXWELL_CHANNEL_GPFIFO_A: 340 case PASCAL_CHANNEL_GPFIFO_A: 341 ret = nvc0_fence_create(drm); 342 break; 343 default: 344 break; 345 } 346 } 347 348 nvif_object_sclass_put(&sclass); 349 if (ret) { 350 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); 351 nouveau_accel_fini(drm); 352 return; 353 } 354 355 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { 356 ret = nouveau_channel_new(drm, &drm->client.device, 357 NVA06F_V0_ENGINE_CE0 | 358 NVA06F_V0_ENGINE_CE1, 359 0, &drm->cechan); 360 if (ret) 361 NV_ERROR(drm, "failed to create ce channel, %d\n", ret); 362 363 arg0 = NVA06F_V0_ENGINE_GR; 364 arg1 = 1; 365 } else 366 if (device->info.chipset >= 0xa3 && 367 device->info.chipset != 0xaa && 368 device->info.chipset != 0xac) { 369 ret = nouveau_channel_new(drm, &drm->client.device, 370 NvDmaFB, NvDmaTT, &drm->cechan); 371 if (ret) 372 NV_ERROR(drm, "failed to create ce channel, %d\n", ret); 373 374 arg0 = NvDmaFB; 375 arg1 = NvDmaTT; 376 } else { 377 arg0 = NvDmaFB; 378 arg1 = NvDmaTT; 379 } 380 381 ret = nouveau_channel_new(drm, &drm->client.device, 382 arg0, arg1, &drm->channel); 383 if (ret) { 384 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); 385 nouveau_accel_fini(drm); 386 return; 387 } 388 389 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW, 390 nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw); 391 if (ret == 0) { 392 ret = RING_SPACE(drm->channel, 2); 393 if (ret == 0) { 394 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { 395 BEGIN_NV04(drm->channel, NvSubSw, 0, 1); 396 OUT_RING (drm->channel, NVDRM_NVSW); 397 } else 398 if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) { 399 BEGIN_NVC0(drm->channel, FermiSw, 0, 1); 400 OUT_RING (drm->channel, 0x001f0000); 401 } 402 } 403 404 ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete, 405 false, NV04_NVSW_NTFY_UEVENT, 406 NULL, 0, 0, &drm->flip); 407 if (ret == 0) 408 ret = nvif_notify_get(&drm->flip); 409 if (ret) { 410 nouveau_accel_fini(drm); 411 return; 412 } 413 } 414 415 if (ret) { 416 NV_ERROR(drm, "failed to allocate software object, %d\n", ret); 417 nouveau_accel_fini(drm); 418 return; 419 } 420 421 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { 422 ret = nvkm_gpuobj_new(nvxx_device(&drm->client.device), 32, 0, 423 false, NULL, &drm->notify); 424 if (ret) { 425 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); 426 nouveau_accel_fini(drm); 427 return; 428 } 429 430 ret = nvif_object_init(&drm->channel->user, NvNotify0, 431 NV_DMA_IN_MEMORY, 432 &(struct nv_dma_v0) { 433 .target = NV_DMA_V0_TARGET_VRAM, 434 .access = NV_DMA_V0_ACCESS_RDWR, 435 .start = drm->notify->addr, 436 .limit = drm->notify->addr + 31 437 }, sizeof(struct nv_dma_v0), 438 &drm->ntfy); 439 if (ret) { 440 nouveau_accel_fini(drm); 441 return; 442 } 443 } 444 445 446 nouveau_bo_move_init(drm); 447 } 448 449 static int nouveau_drm_probe(struct pci_dev *pdev, 450 const struct pci_device_id *pent) 451 { 452 struct nvkm_device *device; 453 struct apertures_struct *aper; 454 bool boot = false; 455 int ret; 456 457 if (vga_switcheroo_client_probe_defer(pdev)) 458 return -EPROBE_DEFER; 459 460 /* We need to check that the chipset is supported before booting 461 * fbdev off the hardware, as there's no way to put it back. 462 */ 463 ret = nvkm_device_pci_new(pdev, NULL, "error", true, false, 0, &device); 464 if (ret) 465 return ret; 466 467 nvkm_device_del(&device); 468 469 /* Remove conflicting drivers (vesafb, efifb etc). */ 470 aper = alloc_apertures(3); 471 if (!aper) 472 return -ENOMEM; 473 474 aper->ranges[0].base = pci_resource_start(pdev, 1); 475 aper->ranges[0].size = pci_resource_len(pdev, 1); 476 aper->count = 1; 477 478 if (pci_resource_len(pdev, 2)) { 479 aper->ranges[aper->count].base = pci_resource_start(pdev, 2); 480 aper->ranges[aper->count].size = pci_resource_len(pdev, 2); 481 aper->count++; 482 } 483 484 if (pci_resource_len(pdev, 3)) { 485 aper->ranges[aper->count].base = pci_resource_start(pdev, 3); 486 aper->ranges[aper->count].size = pci_resource_len(pdev, 3); 487 aper->count++; 488 } 489 490 #ifdef CONFIG_X86 491 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 492 #endif 493 if (nouveau_modeset != 2) 494 drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot); 495 kfree(aper); 496 497 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug, 498 true, true, ~0ULL, &device); 499 if (ret) 500 return ret; 501 502 pci_set_master(pdev); 503 504 ret = drm_get_pci_dev(pdev, pent, &driver_pci); 505 if (ret) { 506 nvkm_device_del(&device); 507 return ret; 508 } 509 510 return 0; 511 } 512 513 static int 514 nouveau_drm_load(struct drm_device *dev, unsigned long flags) 515 { 516 struct nouveau_drm *drm; 517 int ret; 518 519 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL))) 520 return -ENOMEM; 521 dev->dev_private = drm; 522 drm->dev = dev; 523 524 ret = nouveau_cli_init(drm, "DRM-master", &drm->master); 525 if (ret) 526 return ret; 527 528 ret = nouveau_cli_init(drm, "DRM", &drm->client); 529 if (ret) 530 return ret; 531 532 dev->irq_enabled = true; 533 534 nvxx_client(&drm->client.base)->debug = 535 nvkm_dbgopt(nouveau_debug, "DRM"); 536 537 INIT_LIST_HEAD(&drm->clients); 538 spin_lock_init(&drm->tile.lock); 539 540 /* workaround an odd issue on nvc1 by disabling the device's 541 * nosnoop capability. hopefully won't cause issues until a 542 * better fix is found - assuming there is one... 543 */ 544 if (drm->client.device.info.chipset == 0xc1) 545 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000); 546 547 nouveau_vga_init(drm); 548 549 ret = nouveau_ttm_init(drm); 550 if (ret) 551 goto fail_ttm; 552 553 ret = nouveau_bios_init(dev); 554 if (ret) 555 goto fail_bios; 556 557 ret = nouveau_display_create(dev); 558 if (ret) 559 goto fail_dispctor; 560 561 if (dev->mode_config.num_crtc) { 562 ret = nouveau_display_init(dev); 563 if (ret) 564 goto fail_dispinit; 565 } 566 567 nouveau_debugfs_init(drm); 568 nouveau_hwmon_init(dev); 569 nouveau_accel_init(drm); 570 nouveau_fbcon_init(dev); 571 nouveau_led_init(dev); 572 573 if (nouveau_pmops_runtime()) { 574 pm_runtime_use_autosuspend(dev->dev); 575 pm_runtime_set_autosuspend_delay(dev->dev, 5000); 576 pm_runtime_set_active(dev->dev); 577 pm_runtime_allow(dev->dev); 578 pm_runtime_mark_last_busy(dev->dev); 579 pm_runtime_put(dev->dev); 580 } else { 581 /* enable polling for external displays */ 582 drm_kms_helper_poll_enable(dev); 583 } 584 return 0; 585 586 fail_dispinit: 587 nouveau_display_destroy(dev); 588 fail_dispctor: 589 nouveau_bios_takedown(dev); 590 fail_bios: 591 nouveau_ttm_fini(drm); 592 fail_ttm: 593 nouveau_vga_fini(drm); 594 nouveau_cli_fini(&drm->client); 595 nouveau_cli_fini(&drm->master); 596 kfree(drm); 597 return ret; 598 } 599 600 static void 601 nouveau_drm_unload(struct drm_device *dev) 602 { 603 struct nouveau_drm *drm = nouveau_drm(dev); 604 605 if (nouveau_pmops_runtime()) { 606 pm_runtime_get_sync(dev->dev); 607 pm_runtime_forbid(dev->dev); 608 } 609 610 nouveau_led_fini(dev); 611 nouveau_fbcon_fini(dev); 612 nouveau_accel_fini(drm); 613 nouveau_hwmon_fini(dev); 614 nouveau_debugfs_fini(drm); 615 616 if (dev->mode_config.num_crtc) 617 nouveau_display_fini(dev, false); 618 nouveau_display_destroy(dev); 619 620 nouveau_bios_takedown(dev); 621 622 nouveau_ttm_fini(drm); 623 nouveau_vga_fini(drm); 624 625 nouveau_cli_fini(&drm->client); 626 nouveau_cli_fini(&drm->master); 627 kfree(drm); 628 } 629 630 void 631 nouveau_drm_device_remove(struct drm_device *dev) 632 { 633 struct nouveau_drm *drm = nouveau_drm(dev); 634 struct nvkm_client *client; 635 struct nvkm_device *device; 636 637 dev->irq_enabled = false; 638 client = nvxx_client(&drm->client.base); 639 device = nvkm_device_find(client->device); 640 drm_put_dev(dev); 641 642 nvkm_device_del(&device); 643 } 644 645 static void 646 nouveau_drm_remove(struct pci_dev *pdev) 647 { 648 struct drm_device *dev = pci_get_drvdata(pdev); 649 650 nouveau_drm_device_remove(dev); 651 } 652 653 static int 654 nouveau_do_suspend(struct drm_device *dev, bool runtime) 655 { 656 struct nouveau_drm *drm = nouveau_drm(dev); 657 int ret; 658 659 nouveau_led_suspend(dev); 660 661 if (dev->mode_config.num_crtc) { 662 NV_DEBUG(drm, "suspending console...\n"); 663 nouveau_fbcon_set_suspend(dev, 1); 664 NV_DEBUG(drm, "suspending display...\n"); 665 ret = nouveau_display_suspend(dev, runtime); 666 if (ret) 667 return ret; 668 } 669 670 NV_DEBUG(drm, "evicting buffers...\n"); 671 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); 672 673 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n"); 674 if (drm->cechan) { 675 ret = nouveau_channel_idle(drm->cechan); 676 if (ret) 677 goto fail_display; 678 } 679 680 if (drm->channel) { 681 ret = nouveau_channel_idle(drm->channel); 682 if (ret) 683 goto fail_display; 684 } 685 686 NV_DEBUG(drm, "suspending fence...\n"); 687 if (drm->fence && nouveau_fence(drm)->suspend) { 688 if (!nouveau_fence(drm)->suspend(drm)) { 689 ret = -ENOMEM; 690 goto fail_display; 691 } 692 } 693 694 NV_DEBUG(drm, "suspending object tree...\n"); 695 ret = nvif_client_suspend(&drm->master.base); 696 if (ret) 697 goto fail_client; 698 699 return 0; 700 701 fail_client: 702 if (drm->fence && nouveau_fence(drm)->resume) 703 nouveau_fence(drm)->resume(drm); 704 705 fail_display: 706 if (dev->mode_config.num_crtc) { 707 NV_DEBUG(drm, "resuming display...\n"); 708 nouveau_display_resume(dev, runtime); 709 } 710 return ret; 711 } 712 713 static int 714 nouveau_do_resume(struct drm_device *dev, bool runtime) 715 { 716 struct nouveau_drm *drm = nouveau_drm(dev); 717 718 NV_DEBUG(drm, "resuming object tree...\n"); 719 nvif_client_resume(&drm->master.base); 720 721 NV_DEBUG(drm, "resuming fence...\n"); 722 if (drm->fence && nouveau_fence(drm)->resume) 723 nouveau_fence(drm)->resume(drm); 724 725 nouveau_run_vbios_init(dev); 726 727 if (dev->mode_config.num_crtc) { 728 NV_DEBUG(drm, "resuming display...\n"); 729 nouveau_display_resume(dev, runtime); 730 NV_DEBUG(drm, "resuming console...\n"); 731 nouveau_fbcon_set_suspend(dev, 0); 732 } 733 734 nouveau_led_resume(dev); 735 736 return 0; 737 } 738 739 int 740 nouveau_pmops_suspend(struct device *dev) 741 { 742 struct pci_dev *pdev = to_pci_dev(dev); 743 struct drm_device *drm_dev = pci_get_drvdata(pdev); 744 int ret; 745 746 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || 747 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 748 return 0; 749 750 ret = nouveau_do_suspend(drm_dev, false); 751 if (ret) 752 return ret; 753 754 pci_save_state(pdev); 755 pci_disable_device(pdev); 756 pci_set_power_state(pdev, PCI_D3hot); 757 udelay(200); 758 return 0; 759 } 760 761 int 762 nouveau_pmops_resume(struct device *dev) 763 { 764 struct pci_dev *pdev = to_pci_dev(dev); 765 struct drm_device *drm_dev = pci_get_drvdata(pdev); 766 int ret; 767 768 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || 769 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 770 return 0; 771 772 pci_set_power_state(pdev, PCI_D0); 773 pci_restore_state(pdev); 774 ret = pci_enable_device(pdev); 775 if (ret) 776 return ret; 777 pci_set_master(pdev); 778 779 ret = nouveau_do_resume(drm_dev, false); 780 781 /* Monitors may have been connected / disconnected during suspend */ 782 schedule_work(&nouveau_drm(drm_dev)->hpd_work); 783 784 return ret; 785 } 786 787 static int 788 nouveau_pmops_freeze(struct device *dev) 789 { 790 struct pci_dev *pdev = to_pci_dev(dev); 791 struct drm_device *drm_dev = pci_get_drvdata(pdev); 792 return nouveau_do_suspend(drm_dev, false); 793 } 794 795 static int 796 nouveau_pmops_thaw(struct device *dev) 797 { 798 struct pci_dev *pdev = to_pci_dev(dev); 799 struct drm_device *drm_dev = pci_get_drvdata(pdev); 800 return nouveau_do_resume(drm_dev, false); 801 } 802 803 bool 804 nouveau_pmops_runtime(void) 805 { 806 if (nouveau_runtime_pm == -1) 807 return nouveau_is_optimus() || nouveau_is_v1_dsm(); 808 return nouveau_runtime_pm == 1; 809 } 810 811 static int 812 nouveau_pmops_runtime_suspend(struct device *dev) 813 { 814 struct pci_dev *pdev = to_pci_dev(dev); 815 struct drm_device *drm_dev = pci_get_drvdata(pdev); 816 int ret; 817 818 if (!nouveau_pmops_runtime()) { 819 pm_runtime_forbid(dev); 820 return -EBUSY; 821 } 822 823 drm_kms_helper_poll_disable(drm_dev); 824 nouveau_switcheroo_optimus_dsm(); 825 ret = nouveau_do_suspend(drm_dev, true); 826 pci_save_state(pdev); 827 pci_disable_device(pdev); 828 pci_ignore_hotplug(pdev); 829 pci_set_power_state(pdev, PCI_D3cold); 830 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 831 return ret; 832 } 833 834 static int 835 nouveau_pmops_runtime_resume(struct device *dev) 836 { 837 struct pci_dev *pdev = to_pci_dev(dev); 838 struct drm_device *drm_dev = pci_get_drvdata(pdev); 839 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device; 840 int ret; 841 842 if (!nouveau_pmops_runtime()) { 843 pm_runtime_forbid(dev); 844 return -EBUSY; 845 } 846 847 pci_set_power_state(pdev, PCI_D0); 848 pci_restore_state(pdev); 849 ret = pci_enable_device(pdev); 850 if (ret) 851 return ret; 852 pci_set_master(pdev); 853 854 ret = nouveau_do_resume(drm_dev, true); 855 856 /* do magic */ 857 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25)); 858 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 859 860 /* Monitors may have been connected / disconnected during suspend */ 861 schedule_work(&nouveau_drm(drm_dev)->hpd_work); 862 863 return ret; 864 } 865 866 static int 867 nouveau_pmops_runtime_idle(struct device *dev) 868 { 869 struct pci_dev *pdev = to_pci_dev(dev); 870 struct drm_device *drm_dev = pci_get_drvdata(pdev); 871 struct nouveau_drm *drm = nouveau_drm(drm_dev); 872 struct drm_crtc *crtc; 873 874 if (!nouveau_pmops_runtime()) { 875 pm_runtime_forbid(dev); 876 return -EBUSY; 877 } 878 879 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) { 880 if (crtc->enabled) { 881 DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); 882 return -EBUSY; 883 } 884 } 885 pm_runtime_mark_last_busy(dev); 886 pm_runtime_autosuspend(dev); 887 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 888 return 1; 889 } 890 891 static int 892 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) 893 { 894 struct nouveau_drm *drm = nouveau_drm(dev); 895 struct nouveau_cli *cli; 896 char name[32], tmpname[TASK_COMM_LEN]; 897 int ret; 898 899 /* need to bring up power immediately if opening device */ 900 ret = pm_runtime_get_sync(dev->dev); 901 if (ret < 0 && ret != -EACCES) 902 return ret; 903 904 get_task_comm(tmpname, current); 905 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); 906 907 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) 908 return ret; 909 910 ret = nouveau_cli_init(drm, name, cli); 911 if (ret) 912 goto done; 913 914 cli->base.super = false; 915 916 fpriv->driver_priv = cli; 917 918 mutex_lock(&drm->client.mutex); 919 list_add(&cli->head, &drm->clients); 920 mutex_unlock(&drm->client.mutex); 921 922 done: 923 if (ret && cli) { 924 nouveau_cli_fini(cli); 925 kfree(cli); 926 } 927 928 pm_runtime_mark_last_busy(dev->dev); 929 pm_runtime_put_autosuspend(dev->dev); 930 return ret; 931 } 932 933 static void 934 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) 935 { 936 struct nouveau_cli *cli = nouveau_cli(fpriv); 937 struct nouveau_drm *drm = nouveau_drm(dev); 938 939 pm_runtime_get_sync(dev->dev); 940 941 mutex_lock(&cli->mutex); 942 if (cli->abi16) 943 nouveau_abi16_fini(cli->abi16); 944 mutex_unlock(&cli->mutex); 945 946 mutex_lock(&drm->client.mutex); 947 list_del(&cli->head); 948 mutex_unlock(&drm->client.mutex); 949 950 nouveau_cli_fini(cli); 951 kfree(cli); 952 pm_runtime_mark_last_busy(dev->dev); 953 pm_runtime_put_autosuspend(dev->dev); 954 } 955 956 static const struct drm_ioctl_desc 957 nouveau_ioctls[] = { 958 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW), 959 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 960 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW), 961 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW), 962 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW), 963 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW), 964 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW), 965 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW), 966 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW), 967 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW), 968 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW), 969 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW), 970 }; 971 972 long 973 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 974 { 975 struct drm_file *filp = file->private_data; 976 struct drm_device *dev = filp->minor->dev; 977 long ret; 978 979 ret = pm_runtime_get_sync(dev->dev); 980 if (ret < 0 && ret != -EACCES) 981 return ret; 982 983 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) { 984 case DRM_NOUVEAU_NVIF: 985 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd)); 986 break; 987 default: 988 ret = drm_ioctl(file, cmd, arg); 989 break; 990 } 991 992 pm_runtime_mark_last_busy(dev->dev); 993 pm_runtime_put_autosuspend(dev->dev); 994 return ret; 995 } 996 997 static const struct file_operations 998 nouveau_driver_fops = { 999 .owner = THIS_MODULE, 1000 .open = drm_open, 1001 .release = drm_release, 1002 .unlocked_ioctl = nouveau_drm_ioctl, 1003 .mmap = nouveau_ttm_mmap, 1004 .poll = drm_poll, 1005 .read = drm_read, 1006 #if defined(CONFIG_COMPAT) 1007 .compat_ioctl = nouveau_compat_ioctl, 1008 #endif 1009 .llseek = noop_llseek, 1010 }; 1011 1012 static struct drm_driver 1013 driver_stub = { 1014 .driver_features = 1015 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER | 1016 DRIVER_KMS_LEGACY_CONTEXT, 1017 1018 .load = nouveau_drm_load, 1019 .unload = nouveau_drm_unload, 1020 .open = nouveau_drm_open, 1021 .postclose = nouveau_drm_postclose, 1022 .lastclose = nouveau_vga_lastclose, 1023 1024 #if defined(CONFIG_DEBUG_FS) 1025 .debugfs_init = nouveau_drm_debugfs_init, 1026 #endif 1027 1028 .enable_vblank = nouveau_display_vblank_enable, 1029 .disable_vblank = nouveau_display_vblank_disable, 1030 .get_scanout_position = nouveau_display_scanoutpos, 1031 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos, 1032 1033 .ioctls = nouveau_ioctls, 1034 .num_ioctls = ARRAY_SIZE(nouveau_ioctls), 1035 .fops = &nouveau_driver_fops, 1036 1037 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 1038 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 1039 .gem_prime_export = drm_gem_prime_export, 1040 .gem_prime_import = drm_gem_prime_import, 1041 .gem_prime_pin = nouveau_gem_prime_pin, 1042 .gem_prime_res_obj = nouveau_gem_prime_res_obj, 1043 .gem_prime_unpin = nouveau_gem_prime_unpin, 1044 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table, 1045 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, 1046 .gem_prime_vmap = nouveau_gem_prime_vmap, 1047 .gem_prime_vunmap = nouveau_gem_prime_vunmap, 1048 1049 .gem_free_object_unlocked = nouveau_gem_object_del, 1050 .gem_open_object = nouveau_gem_object_open, 1051 .gem_close_object = nouveau_gem_object_close, 1052 1053 .dumb_create = nouveau_display_dumb_create, 1054 .dumb_map_offset = nouveau_display_dumb_map_offset, 1055 1056 .name = DRIVER_NAME, 1057 .desc = DRIVER_DESC, 1058 #ifdef GIT_REVISION 1059 .date = GIT_REVISION, 1060 #else 1061 .date = DRIVER_DATE, 1062 #endif 1063 .major = DRIVER_MAJOR, 1064 .minor = DRIVER_MINOR, 1065 .patchlevel = DRIVER_PATCHLEVEL, 1066 }; 1067 1068 static struct pci_device_id 1069 nouveau_drm_pci_table[] = { 1070 { 1071 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), 1072 .class = PCI_BASE_CLASS_DISPLAY << 16, 1073 .class_mask = 0xff << 16, 1074 }, 1075 { 1076 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), 1077 .class = PCI_BASE_CLASS_DISPLAY << 16, 1078 .class_mask = 0xff << 16, 1079 }, 1080 {} 1081 }; 1082 1083 static void nouveau_display_options(void) 1084 { 1085 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n"); 1086 1087 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable); 1088 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid); 1089 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink); 1090 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel); 1091 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config); 1092 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug); 1093 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel); 1094 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset); 1095 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm); 1096 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf); 1097 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz); 1098 } 1099 1100 static const struct dev_pm_ops nouveau_pm_ops = { 1101 .suspend = nouveau_pmops_suspend, 1102 .resume = nouveau_pmops_resume, 1103 .freeze = nouveau_pmops_freeze, 1104 .thaw = nouveau_pmops_thaw, 1105 .poweroff = nouveau_pmops_freeze, 1106 .restore = nouveau_pmops_resume, 1107 .runtime_suspend = nouveau_pmops_runtime_suspend, 1108 .runtime_resume = nouveau_pmops_runtime_resume, 1109 .runtime_idle = nouveau_pmops_runtime_idle, 1110 }; 1111 1112 static struct pci_driver 1113 nouveau_drm_pci_driver = { 1114 .name = "nouveau", 1115 .id_table = nouveau_drm_pci_table, 1116 .probe = nouveau_drm_probe, 1117 .remove = nouveau_drm_remove, 1118 .driver.pm = &nouveau_pm_ops, 1119 }; 1120 1121 struct drm_device * 1122 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, 1123 struct platform_device *pdev, 1124 struct nvkm_device **pdevice) 1125 { 1126 struct drm_device *drm; 1127 int err; 1128 1129 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug, 1130 true, true, ~0ULL, pdevice); 1131 if (err) 1132 goto err_free; 1133 1134 drm = drm_dev_alloc(&driver_platform, &pdev->dev); 1135 if (IS_ERR(drm)) { 1136 err = PTR_ERR(drm); 1137 goto err_free; 1138 } 1139 1140 platform_set_drvdata(pdev, drm); 1141 1142 return drm; 1143 1144 err_free: 1145 nvkm_device_del(pdevice); 1146 1147 return ERR_PTR(err); 1148 } 1149 1150 static int __init 1151 nouveau_drm_init(void) 1152 { 1153 driver_pci = driver_stub; 1154 driver_platform = driver_stub; 1155 1156 nouveau_display_options(); 1157 1158 if (nouveau_modeset == -1) { 1159 if (vgacon_text_force()) 1160 nouveau_modeset = 0; 1161 } 1162 1163 if (!nouveau_modeset) 1164 return 0; 1165 1166 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1167 platform_driver_register(&nouveau_platform_driver); 1168 #endif 1169 1170 nouveau_register_dsm_handler(); 1171 nouveau_backlight_ctor(); 1172 1173 #ifdef CONFIG_PCI 1174 return pci_register_driver(&nouveau_drm_pci_driver); 1175 #else 1176 return 0; 1177 #endif 1178 } 1179 1180 static void __exit 1181 nouveau_drm_exit(void) 1182 { 1183 if (!nouveau_modeset) 1184 return; 1185 1186 #ifdef CONFIG_PCI 1187 pci_unregister_driver(&nouveau_drm_pci_driver); 1188 #endif 1189 nouveau_backlight_dtor(); 1190 nouveau_unregister_dsm_handler(); 1191 1192 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1193 platform_driver_unregister(&nouveau_platform_driver); 1194 #endif 1195 } 1196 1197 module_init(nouveau_drm_init); 1198 module_exit(nouveau_drm_exit); 1199 1200 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); 1201 MODULE_AUTHOR(DRIVER_AUTHOR); 1202 MODULE_DESCRIPTION(DRIVER_DESC); 1203 MODULE_LICENSE("GPL and additional rights"); 1204