1 /* 2 * Copyright 2005-2006 Erik Waling 3 * Copyright 2006 Stephane Marchesin 4 * Copyright 2007-2009 Stuart Bennett 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 20 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF 21 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 25 #include "nouveau_drv.h" 26 #include "nouveau_bios.h" 27 #include "nouveau_reg.h" 28 #include "dispnv04/hw.h" 29 #include "nouveau_encoder.h" 30 31 #include <linux/io-mapping.h> 32 #include <linux/firmware.h> 33 34 /* these defines are made up */ 35 #define NV_CIO_CRE_44_HEADA 0x0 36 #define NV_CIO_CRE_44_HEADB 0x3 37 #define FEATURE_MOBILE 0x10 /* also FEATURE_QUADRO for BMP */ 38 39 #define EDID1_LEN 128 40 41 #define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg) 42 #define LOG_OLD_VALUE(x) 43 44 struct init_exec { 45 bool execute; 46 bool repeat; 47 }; 48 49 static bool nv_cksum(const uint8_t *data, unsigned int length) 50 { 51 /* 52 * There's a few checksums in the BIOS, so here's a generic checking 53 * function. 54 */ 55 int i; 56 uint8_t sum = 0; 57 58 for (i = 0; i < length; i++) 59 sum += data[i]; 60 61 if (sum) 62 return true; 63 64 return false; 65 } 66 67 static uint16_t clkcmptable(struct nvbios *bios, uint16_t clktable, int pxclk) 68 { 69 int compare_record_len, i = 0; 70 uint16_t compareclk, scriptptr = 0; 71 72 if (bios->major_version < 5) /* pre BIT */ 73 compare_record_len = 3; 74 else 75 compare_record_len = 4; 76 77 do { 78 compareclk = ROM16(bios->data[clktable + compare_record_len * i]); 79 if (pxclk >= compareclk * 10) { 80 if (bios->major_version < 5) { 81 uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i]; 82 scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]); 83 } else 84 scriptptr = ROM16(bios->data[clktable + 2 + compare_record_len * i]); 85 break; 86 } 87 i++; 88 } while (compareclk); 89 90 return scriptptr; 91 } 92 93 static void 94 run_digital_op_script(struct drm_device *dev, uint16_t scriptptr, 95 struct dcb_output *dcbent, int head, bool dl) 96 { 97 struct nouveau_drm *drm = nouveau_drm(dev); 98 99 NV_INFO(drm, "0x%04X: Parsing digital output script table\n", 100 scriptptr); 101 NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_44, head ? NV_CIO_CRE_44_HEADB : 102 NV_CIO_CRE_44_HEADA); 103 nouveau_bios_run_init_table(dev, scriptptr, dcbent, head); 104 105 nv04_dfp_bind_head(dev, dcbent, head, dl); 106 } 107 108 static int call_lvds_manufacturer_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script) 109 { 110 struct nouveau_drm *drm = nouveau_drm(dev); 111 struct nvbios *bios = &drm->vbios; 112 uint8_t sub = bios->data[bios->fp.xlated_entry + script] + (bios->fp.link_c_increment && dcbent->or & DCB_OUTPUT_C ? 1 : 0); 113 uint16_t scriptofs = ROM16(bios->data[bios->init_script_tbls_ptr + sub * 2]); 114 #ifdef __powerpc__ 115 struct pci_dev *pdev = to_pci_dev(dev->dev); 116 #endif 117 118 if (!bios->fp.xlated_entry || !sub || !scriptofs) 119 return -EINVAL; 120 121 run_digital_op_script(dev, scriptofs, dcbent, head, bios->fp.dual_link); 122 123 if (script == LVDS_PANEL_OFF) { 124 /* off-on delay in ms */ 125 mdelay(ROM16(bios->data[bios->fp.xlated_entry + 7])); 126 } 127 #ifdef __powerpc__ 128 /* Powerbook specific quirks */ 129 if (script == LVDS_RESET && 130 (pdev->device == 0x0179 || pdev->device == 0x0189 || 131 pdev->device == 0x0329)) 132 nv_write_tmds(dev, dcbent->or, 0, 0x02, 0x72); 133 #endif 134 135 return 0; 136 } 137 138 static int run_lvds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk) 139 { 140 /* 141 * The BIT LVDS table's header has the information to setup the 142 * necessary registers. Following the standard 4 byte header are: 143 * A bitmask byte and a dual-link transition pxclk value for use in 144 * selecting the init script when not using straps; 4 script pointers 145 * for panel power, selected by output and on/off; and 8 table pointers 146 * for panel init, the needed one determined by output, and bits in the 147 * conf byte. These tables are similar to the TMDS tables, consisting 148 * of a list of pxclks and script pointers. 149 */ 150 struct nouveau_drm *drm = nouveau_drm(dev); 151 struct nvbios *bios = &drm->vbios; 152 unsigned int outputset = (dcbent->or == 4) ? 1 : 0; 153 uint16_t scriptptr = 0, clktable; 154 155 /* 156 * For now we assume version 3.0 table - g80 support will need some 157 * changes 158 */ 159 160 switch (script) { 161 case LVDS_INIT: 162 return -ENOSYS; 163 case LVDS_BACKLIGHT_ON: 164 case LVDS_PANEL_ON: 165 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 7 + outputset * 2]); 166 break; 167 case LVDS_BACKLIGHT_OFF: 168 case LVDS_PANEL_OFF: 169 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 11 + outputset * 2]); 170 break; 171 case LVDS_RESET: 172 clktable = bios->fp.lvdsmanufacturerpointer + 15; 173 if (dcbent->or == 4) 174 clktable += 8; 175 176 if (dcbent->lvdsconf.use_straps_for_mode) { 177 if (bios->fp.dual_link) 178 clktable += 4; 179 if (bios->fp.if_is_24bit) 180 clktable += 2; 181 } else { 182 /* using EDID */ 183 int cmpval_24bit = (dcbent->or == 4) ? 4 : 1; 184 185 if (bios->fp.dual_link) { 186 clktable += 4; 187 cmpval_24bit <<= 1; 188 } 189 190 if (bios->fp.strapless_is_24bit & cmpval_24bit) 191 clktable += 2; 192 } 193 194 clktable = ROM16(bios->data[clktable]); 195 if (!clktable) { 196 NV_ERROR(drm, "Pixel clock comparison table not found\n"); 197 return -ENOENT; 198 } 199 scriptptr = clkcmptable(bios, clktable, pxclk); 200 } 201 202 if (!scriptptr) { 203 NV_ERROR(drm, "LVDS output init script not found\n"); 204 return -ENOENT; 205 } 206 run_digital_op_script(dev, scriptptr, dcbent, head, bios->fp.dual_link); 207 208 return 0; 209 } 210 211 int call_lvds_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk) 212 { 213 /* 214 * LVDS operations are multiplexed in an effort to present a single API 215 * which works with two vastly differing underlying structures. 216 * This acts as the demux 217 */ 218 219 struct nouveau_drm *drm = nouveau_drm(dev); 220 struct nvif_object *device = &drm->client.device.object; 221 struct nvbios *bios = &drm->vbios; 222 uint8_t lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer]; 223 uint32_t sel_clk_binding, sel_clk; 224 int ret; 225 226 if (bios->fp.last_script_invoc == (script << 1 | head) || !lvds_ver || 227 (lvds_ver >= 0x30 && script == LVDS_INIT)) 228 return 0; 229 230 if (!bios->fp.lvds_init_run) { 231 bios->fp.lvds_init_run = true; 232 call_lvds_script(dev, dcbent, head, LVDS_INIT, pxclk); 233 } 234 235 if (script == LVDS_PANEL_ON && bios->fp.reset_after_pclk_change) 236 call_lvds_script(dev, dcbent, head, LVDS_RESET, pxclk); 237 if (script == LVDS_RESET && bios->fp.power_off_for_reset) 238 call_lvds_script(dev, dcbent, head, LVDS_PANEL_OFF, pxclk); 239 240 NV_INFO(drm, "Calling LVDS script %d:\n", script); 241 242 /* don't let script change pll->head binding */ 243 sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000; 244 245 if (lvds_ver < 0x30) 246 ret = call_lvds_manufacturer_script(dev, dcbent, head, script); 247 else 248 ret = run_lvds_table(dev, dcbent, head, script, pxclk); 249 250 bios->fp.last_script_invoc = (script << 1 | head); 251 252 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000; 253 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding); 254 /* some scripts set a value in NV_PBUS_POWERCTRL_2 and break video overlay */ 255 nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0); 256 257 return ret; 258 } 259 260 struct lvdstableheader { 261 uint8_t lvds_ver, headerlen, recordlen; 262 }; 263 264 static int parse_lvds_manufacturer_table_header(struct drm_device *dev, struct nvbios *bios, struct lvdstableheader *lth) 265 { 266 /* 267 * BMP version (0xa) LVDS table has a simple header of version and 268 * record length. The BIT LVDS table has the typical BIT table header: 269 * version byte, header length byte, record length byte, and a byte for 270 * the maximum number of records that can be held in the table. 271 */ 272 273 struct nouveau_drm *drm = nouveau_drm(dev); 274 uint8_t lvds_ver, headerlen, recordlen; 275 276 memset(lth, 0, sizeof(struct lvdstableheader)); 277 278 if (bios->fp.lvdsmanufacturerpointer == 0x0) { 279 NV_ERROR(drm, "Pointer to LVDS manufacturer table invalid\n"); 280 return -EINVAL; 281 } 282 283 lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer]; 284 285 switch (lvds_ver) { 286 case 0x0a: /* pre NV40 */ 287 headerlen = 2; 288 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; 289 break; 290 case 0x30: /* NV4x */ 291 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; 292 if (headerlen < 0x1f) { 293 NV_ERROR(drm, "LVDS table header not understood\n"); 294 return -EINVAL; 295 } 296 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2]; 297 break; 298 case 0x40: /* G80/G90 */ 299 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1]; 300 if (headerlen < 0x7) { 301 NV_ERROR(drm, "LVDS table header not understood\n"); 302 return -EINVAL; 303 } 304 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2]; 305 break; 306 default: 307 NV_ERROR(drm, 308 "LVDS table revision %d.%d not currently supported\n", 309 lvds_ver >> 4, lvds_ver & 0xf); 310 return -ENOSYS; 311 } 312 313 lth->lvds_ver = lvds_ver; 314 lth->headerlen = headerlen; 315 lth->recordlen = recordlen; 316 317 return 0; 318 } 319 320 static int 321 get_fp_strap(struct drm_device *dev, struct nvbios *bios) 322 { 323 struct nouveau_drm *drm = nouveau_drm(dev); 324 struct nvif_object *device = &drm->client.device.object; 325 326 /* 327 * The fp strap is normally dictated by the "User Strap" in 328 * PEXTDEV_BOOT_0[20:16], but on BMP cards when bit 2 of the 329 * Internal_Flags struct at 0x48 is set, the user strap gets overriden 330 * by the PCI subsystem ID during POST, but not before the previous user 331 * strap has been committed to CR58 for CR57=0xf on head A, which may be 332 * read and used instead 333 */ 334 335 if (bios->major_version < 5 && bios->data[0x48] & 0x4) 336 return NVReadVgaCrtc5758(dev, 0, 0xf) & 0xf; 337 338 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_MAXWELL) 339 return nvif_rd32(device, 0x001800) & 0x0000000f; 340 else 341 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) 342 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 24) & 0xf; 343 else 344 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 16) & 0xf; 345 } 346 347 static int parse_fp_mode_table(struct drm_device *dev, struct nvbios *bios) 348 { 349 struct nouveau_drm *drm = nouveau_drm(dev); 350 uint8_t *fptable; 351 uint8_t fptable_ver, headerlen = 0, recordlen, fpentries = 0xf, fpindex; 352 int ret, ofs, fpstrapping; 353 struct lvdstableheader lth; 354 355 if (bios->fp.fptablepointer == 0x0) { 356 /* Most laptop cards lack an fp table. They use DDC. */ 357 NV_DEBUG(drm, "Pointer to flat panel table invalid\n"); 358 bios->digital_min_front_porch = 0x4b; 359 return 0; 360 } 361 362 fptable = &bios->data[bios->fp.fptablepointer]; 363 fptable_ver = fptable[0]; 364 365 switch (fptable_ver) { 366 /* 367 * BMP version 0x5.0x11 BIOSen have version 1 like tables, but no 368 * version field, and miss one of the spread spectrum/PWM bytes. 369 * This could affect early GF2Go parts (not seen any appropriate ROMs 370 * though). Here we assume that a version of 0x05 matches this case 371 * (combining with a BMP version check would be better), as the 372 * common case for the panel type field is 0x0005, and that is in 373 * fact what we are reading the first byte of. 374 */ 375 case 0x05: /* some NV10, 11, 15, 16 */ 376 recordlen = 42; 377 ofs = -1; 378 break; 379 case 0x10: /* some NV15/16, and NV11+ */ 380 recordlen = 44; 381 ofs = 0; 382 break; 383 case 0x20: /* NV40+ */ 384 headerlen = fptable[1]; 385 recordlen = fptable[2]; 386 fpentries = fptable[3]; 387 /* 388 * fptable[4] is the minimum 389 * RAMDAC_FP_HCRTC -> RAMDAC_FP_HSYNC_START gap 390 */ 391 bios->digital_min_front_porch = fptable[4]; 392 ofs = -7; 393 break; 394 default: 395 NV_ERROR(drm, 396 "FP table revision %d.%d not currently supported\n", 397 fptable_ver >> 4, fptable_ver & 0xf); 398 return -ENOSYS; 399 } 400 401 if (!bios->is_mobile) /* !mobile only needs digital_min_front_porch */ 402 return 0; 403 404 ret = parse_lvds_manufacturer_table_header(dev, bios, <h); 405 if (ret) 406 return ret; 407 408 if (lth.lvds_ver == 0x30 || lth.lvds_ver == 0x40) { 409 bios->fp.fpxlatetableptr = bios->fp.lvdsmanufacturerpointer + 410 lth.headerlen + 1; 411 bios->fp.xlatwidth = lth.recordlen; 412 } 413 if (bios->fp.fpxlatetableptr == 0x0) { 414 NV_ERROR(drm, "Pointer to flat panel xlat table invalid\n"); 415 return -EINVAL; 416 } 417 418 fpstrapping = get_fp_strap(dev, bios); 419 420 fpindex = bios->data[bios->fp.fpxlatetableptr + 421 fpstrapping * bios->fp.xlatwidth]; 422 423 if (fpindex > fpentries) { 424 NV_ERROR(drm, "Bad flat panel table index\n"); 425 return -ENOENT; 426 } 427 428 /* nv4x cards need both a strap value and fpindex of 0xf to use DDC */ 429 if (lth.lvds_ver > 0x10) 430 bios->fp_no_ddc = fpstrapping != 0xf || fpindex != 0xf; 431 432 /* 433 * If either the strap or xlated fpindex value are 0xf there is no 434 * panel using a strap-derived bios mode present. this condition 435 * includes, but is different from, the DDC panel indicator above 436 */ 437 if (fpstrapping == 0xf || fpindex == 0xf) 438 return 0; 439 440 bios->fp.mode_ptr = bios->fp.fptablepointer + headerlen + 441 recordlen * fpindex + ofs; 442 443 NV_INFO(drm, "BIOS FP mode: %dx%d (%dkHz pixel clock)\n", 444 ROM16(bios->data[bios->fp.mode_ptr + 11]) + 1, 445 ROM16(bios->data[bios->fp.mode_ptr + 25]) + 1, 446 ROM16(bios->data[bios->fp.mode_ptr + 7]) * 10); 447 448 return 0; 449 } 450 451 bool nouveau_bios_fp_mode(struct drm_device *dev, struct drm_display_mode *mode) 452 { 453 struct nouveau_drm *drm = nouveau_drm(dev); 454 struct nvbios *bios = &drm->vbios; 455 uint8_t *mode_entry = &bios->data[bios->fp.mode_ptr]; 456 457 if (!mode) /* just checking whether we can produce a mode */ 458 return bios->fp.mode_ptr; 459 460 memset(mode, 0, sizeof(struct drm_display_mode)); 461 /* 462 * For version 1.0 (version in byte 0): 463 * bytes 1-2 are "panel type", including bits on whether Colour/mono, 464 * single/dual link, and type (TFT etc.) 465 * bytes 3-6 are bits per colour in RGBX 466 */ 467 mode->clock = ROM16(mode_entry[7]) * 10; 468 /* bytes 9-10 is HActive */ 469 mode->hdisplay = ROM16(mode_entry[11]) + 1; 470 /* 471 * bytes 13-14 is HValid Start 472 * bytes 15-16 is HValid End 473 */ 474 mode->hsync_start = ROM16(mode_entry[17]) + 1; 475 mode->hsync_end = ROM16(mode_entry[19]) + 1; 476 mode->htotal = ROM16(mode_entry[21]) + 1; 477 /* bytes 23-24, 27-30 similarly, but vertical */ 478 mode->vdisplay = ROM16(mode_entry[25]) + 1; 479 mode->vsync_start = ROM16(mode_entry[31]) + 1; 480 mode->vsync_end = ROM16(mode_entry[33]) + 1; 481 mode->vtotal = ROM16(mode_entry[35]) + 1; 482 mode->flags |= (mode_entry[37] & 0x10) ? 483 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 484 mode->flags |= (mode_entry[37] & 0x1) ? 485 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 486 /* 487 * bytes 38-39 relate to spread spectrum settings 488 * bytes 40-43 are something to do with PWM 489 */ 490 491 mode->status = MODE_OK; 492 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 493 drm_mode_set_name(mode); 494 return bios->fp.mode_ptr; 495 } 496 497 int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, bool *if_is_24bit) 498 { 499 /* 500 * The LVDS table header is (mostly) described in 501 * parse_lvds_manufacturer_table_header(): the BIT header additionally 502 * contains the dual-link transition pxclk (in 10s kHz), at byte 5 - if 503 * straps are not being used for the panel, this specifies the frequency 504 * at which modes should be set up in the dual link style. 505 * 506 * Following the header, the BMP (ver 0xa) table has several records, 507 * indexed by a separate xlat table, indexed in turn by the fp strap in 508 * EXTDEV_BOOT. Each record had a config byte, followed by 6 script 509 * numbers for use by INIT_SUB which controlled panel init and power, 510 * and finally a dword of ms to sleep between power off and on 511 * operations. 512 * 513 * In the BIT versions, the table following the header serves as an 514 * integrated config and xlat table: the records in the table are 515 * indexed by the FP strap nibble in EXTDEV_BOOT, and each record has 516 * two bytes - the first as a config byte, the second for indexing the 517 * fp mode table pointed to by the BIT 'D' table 518 * 519 * DDC is not used until after card init, so selecting the correct table 520 * entry and setting the dual link flag for EDID equipped panels, 521 * requiring tests against the native-mode pixel clock, cannot be done 522 * until later, when this function should be called with non-zero pxclk 523 */ 524 struct nouveau_drm *drm = nouveau_drm(dev); 525 struct nvbios *bios = &drm->vbios; 526 int fpstrapping = get_fp_strap(dev, bios), lvdsmanufacturerindex = 0; 527 struct lvdstableheader lth; 528 uint16_t lvdsofs; 529 int ret, chip_version = bios->chip_version; 530 531 ret = parse_lvds_manufacturer_table_header(dev, bios, <h); 532 if (ret) 533 return ret; 534 535 switch (lth.lvds_ver) { 536 case 0x0a: /* pre NV40 */ 537 lvdsmanufacturerindex = bios->data[ 538 bios->fp.fpxlatemanufacturertableptr + 539 fpstrapping]; 540 541 /* we're done if this isn't the EDID panel case */ 542 if (!pxclk) 543 break; 544 545 if (chip_version < 0x25) { 546 /* nv17 behaviour 547 * 548 * It seems the old style lvds script pointer is reused 549 * to select 18/24 bit colour depth for EDID panels. 550 */ 551 lvdsmanufacturerindex = 552 (bios->legacy.lvds_single_a_script_ptr & 1) ? 553 2 : 0; 554 if (pxclk >= bios->fp.duallink_transition_clk) 555 lvdsmanufacturerindex++; 556 } else if (chip_version < 0x30) { 557 /* nv28 behaviour (off-chip encoder) 558 * 559 * nv28 does a complex dance of first using byte 121 of 560 * the EDID to choose the lvdsmanufacturerindex, then 561 * later attempting to match the EDID manufacturer and 562 * product IDs in a table (signature 'pidt' (panel id 563 * table?)), setting an lvdsmanufacturerindex of 0 and 564 * an fp strap of the match index (or 0xf if none) 565 */ 566 lvdsmanufacturerindex = 0; 567 } else { 568 /* nv31, nv34 behaviour */ 569 lvdsmanufacturerindex = 0; 570 if (pxclk >= bios->fp.duallink_transition_clk) 571 lvdsmanufacturerindex = 2; 572 if (pxclk >= 140000) 573 lvdsmanufacturerindex = 3; 574 } 575 576 /* 577 * nvidia set the high nibble of (cr57=f, cr58) to 578 * lvdsmanufacturerindex in this case; we don't 579 */ 580 break; 581 case 0x30: /* NV4x */ 582 case 0x40: /* G80/G90 */ 583 lvdsmanufacturerindex = fpstrapping; 584 break; 585 default: 586 NV_ERROR(drm, "LVDS table revision not currently supported\n"); 587 return -ENOSYS; 588 } 589 590 lvdsofs = bios->fp.xlated_entry = bios->fp.lvdsmanufacturerpointer + lth.headerlen + lth.recordlen * lvdsmanufacturerindex; 591 switch (lth.lvds_ver) { 592 case 0x0a: 593 bios->fp.power_off_for_reset = bios->data[lvdsofs] & 1; 594 bios->fp.reset_after_pclk_change = bios->data[lvdsofs] & 2; 595 bios->fp.dual_link = bios->data[lvdsofs] & 4; 596 bios->fp.link_c_increment = bios->data[lvdsofs] & 8; 597 *if_is_24bit = bios->data[lvdsofs] & 16; 598 break; 599 case 0x30: 600 case 0x40: 601 /* 602 * No sign of the "power off for reset" or "reset for panel 603 * on" bits, but it's safer to assume we should 604 */ 605 bios->fp.power_off_for_reset = true; 606 bios->fp.reset_after_pclk_change = true; 607 608 /* 609 * It's ok lvdsofs is wrong for nv4x edid case; dual_link is 610 * over-written, and if_is_24bit isn't used 611 */ 612 bios->fp.dual_link = bios->data[lvdsofs] & 1; 613 bios->fp.if_is_24bit = bios->data[lvdsofs] & 2; 614 bios->fp.strapless_is_24bit = bios->data[bios->fp.lvdsmanufacturerpointer + 4]; 615 bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10; 616 break; 617 } 618 619 /* set dual_link flag for EDID case */ 620 if (pxclk && (chip_version < 0x25 || chip_version > 0x28)) 621 bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk); 622 623 *dl = bios->fp.dual_link; 624 625 return 0; 626 } 627 628 int run_tmds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, int pxclk) 629 { 630 /* 631 * the pxclk parameter is in kHz 632 * 633 * This runs the TMDS regs setting code found on BIT bios cards 634 * 635 * For ffs(or) == 1 use the first table, for ffs(or) == 2 and 636 * ffs(or) == 3, use the second. 637 */ 638 639 struct nouveau_drm *drm = nouveau_drm(dev); 640 struct nvif_object *device = &drm->client.device.object; 641 struct nvbios *bios = &drm->vbios; 642 int cv = bios->chip_version; 643 uint16_t clktable = 0, scriptptr; 644 uint32_t sel_clk_binding, sel_clk; 645 646 /* pre-nv17 off-chip tmds uses scripts, post nv17 doesn't */ 647 if (cv >= 0x17 && cv != 0x1a && cv != 0x20 && 648 dcbent->location != DCB_LOC_ON_CHIP) 649 return 0; 650 651 switch (ffs(dcbent->or)) { 652 case 1: 653 clktable = bios->tmds.output0_script_ptr; 654 break; 655 case 2: 656 case 3: 657 clktable = bios->tmds.output1_script_ptr; 658 break; 659 } 660 661 if (!clktable) { 662 NV_ERROR(drm, "Pixel clock comparison table not found\n"); 663 return -EINVAL; 664 } 665 666 scriptptr = clkcmptable(bios, clktable, pxclk); 667 668 if (!scriptptr) { 669 NV_ERROR(drm, "TMDS output init script not found\n"); 670 return -ENOENT; 671 } 672 673 /* don't let script change pll->head binding */ 674 sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000; 675 run_digital_op_script(dev, scriptptr, dcbent, head, pxclk >= 165000); 676 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000; 677 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding); 678 679 return 0; 680 } 681 682 static void parse_script_table_pointers(struct nvbios *bios, uint16_t offset) 683 { 684 /* 685 * Parses the init table segment for pointers used in script execution. 686 * 687 * offset + 0 (16 bits): init script tables pointer 688 * offset + 2 (16 bits): macro index table pointer 689 * offset + 4 (16 bits): macro table pointer 690 * offset + 6 (16 bits): condition table pointer 691 * offset + 8 (16 bits): io condition table pointer 692 * offset + 10 (16 bits): io flag condition table pointer 693 * offset + 12 (16 bits): init function table pointer 694 */ 695 696 bios->init_script_tbls_ptr = ROM16(bios->data[offset]); 697 } 698 699 static int parse_bit_A_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 700 { 701 /* 702 * Parses the load detect values for g80 cards. 703 * 704 * offset + 0 (16 bits): loadval table pointer 705 */ 706 707 struct nouveau_drm *drm = nouveau_drm(dev); 708 uint16_t load_table_ptr; 709 uint8_t version, headerlen, entrylen, num_entries; 710 711 if (bitentry->length != 3) { 712 NV_ERROR(drm, "Do not understand BIT A table\n"); 713 return -EINVAL; 714 } 715 716 load_table_ptr = ROM16(bios->data[bitentry->offset]); 717 718 if (load_table_ptr == 0x0) { 719 NV_DEBUG(drm, "Pointer to BIT loadval table invalid\n"); 720 return -EINVAL; 721 } 722 723 version = bios->data[load_table_ptr]; 724 725 if (version != 0x10) { 726 NV_ERROR(drm, "BIT loadval table version %d.%d not supported\n", 727 version >> 4, version & 0xF); 728 return -ENOSYS; 729 } 730 731 headerlen = bios->data[load_table_ptr + 1]; 732 entrylen = bios->data[load_table_ptr + 2]; 733 num_entries = bios->data[load_table_ptr + 3]; 734 735 if (headerlen != 4 || entrylen != 4 || num_entries != 2) { 736 NV_ERROR(drm, "Do not understand BIT loadval table\n"); 737 return -EINVAL; 738 } 739 740 /* First entry is normal dac, 2nd tv-out perhaps? */ 741 bios->dactestval = ROM32(bios->data[load_table_ptr + headerlen]) & 0x3ff; 742 743 return 0; 744 } 745 746 static int parse_bit_display_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 747 { 748 /* 749 * Parses the flat panel table segment that the bit entry points to. 750 * Starting at bitentry->offset: 751 * 752 * offset + 0 (16 bits): ??? table pointer - seems to have 18 byte 753 * records beginning with a freq. 754 * offset + 2 (16 bits): mode table pointer 755 */ 756 struct nouveau_drm *drm = nouveau_drm(dev); 757 758 if (bitentry->length != 4) { 759 NV_ERROR(drm, "Do not understand BIT display table\n"); 760 return -EINVAL; 761 } 762 763 bios->fp.fptablepointer = ROM16(bios->data[bitentry->offset + 2]); 764 765 return 0; 766 } 767 768 static int parse_bit_init_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 769 { 770 /* 771 * Parses the init table segment that the bit entry points to. 772 * 773 * See parse_script_table_pointers for layout 774 */ 775 struct nouveau_drm *drm = nouveau_drm(dev); 776 777 if (bitentry->length < 14) { 778 NV_ERROR(drm, "Do not understand init table\n"); 779 return -EINVAL; 780 } 781 782 parse_script_table_pointers(bios, bitentry->offset); 783 return 0; 784 } 785 786 static int parse_bit_i_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 787 { 788 /* 789 * BIT 'i' (info?) table 790 * 791 * offset + 0 (32 bits): BIOS version dword (as in B table) 792 * offset + 5 (8 bits): BIOS feature byte (same as for BMP?) 793 * offset + 13 (16 bits): pointer to table containing DAC load 794 * detection comparison values 795 * 796 * There's other things in the table, purpose unknown 797 */ 798 799 struct nouveau_drm *drm = nouveau_drm(dev); 800 uint16_t daccmpoffset; 801 uint8_t dacver, dacheaderlen; 802 803 if (bitentry->length < 6) { 804 NV_ERROR(drm, "BIT i table too short for needed information\n"); 805 return -EINVAL; 806 } 807 808 /* 809 * bit 4 seems to indicate a mobile bios (doesn't suffer from BMP's 810 * Quadro identity crisis), other bits possibly as for BMP feature byte 811 */ 812 bios->feature_byte = bios->data[bitentry->offset + 5]; 813 bios->is_mobile = bios->feature_byte & FEATURE_MOBILE; 814 815 if (bitentry->length < 15) { 816 NV_WARN(drm, "BIT i table not long enough for DAC load " 817 "detection comparison table\n"); 818 return -EINVAL; 819 } 820 821 daccmpoffset = ROM16(bios->data[bitentry->offset + 13]); 822 823 /* doesn't exist on g80 */ 824 if (!daccmpoffset) 825 return 0; 826 827 /* 828 * The first value in the table, following the header, is the 829 * comparison value, the second entry is a comparison value for 830 * TV load detection. 831 */ 832 833 dacver = bios->data[daccmpoffset]; 834 dacheaderlen = bios->data[daccmpoffset + 1]; 835 836 if (dacver != 0x00 && dacver != 0x10) { 837 NV_WARN(drm, "DAC load detection comparison table version " 838 "%d.%d not known\n", dacver >> 4, dacver & 0xf); 839 return -ENOSYS; 840 } 841 842 bios->dactestval = ROM32(bios->data[daccmpoffset + dacheaderlen]); 843 bios->tvdactestval = ROM32(bios->data[daccmpoffset + dacheaderlen + 4]); 844 845 return 0; 846 } 847 848 static int parse_bit_lvds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 849 { 850 /* 851 * Parses the LVDS table segment that the bit entry points to. 852 * Starting at bitentry->offset: 853 * 854 * offset + 0 (16 bits): LVDS strap xlate table pointer 855 */ 856 857 struct nouveau_drm *drm = nouveau_drm(dev); 858 859 if (bitentry->length != 2) { 860 NV_ERROR(drm, "Do not understand BIT LVDS table\n"); 861 return -EINVAL; 862 } 863 864 /* 865 * No idea if it's still called the LVDS manufacturer table, but 866 * the concept's close enough. 867 */ 868 bios->fp.lvdsmanufacturerpointer = ROM16(bios->data[bitentry->offset]); 869 870 return 0; 871 } 872 873 static int 874 parse_bit_M_tbl_entry(struct drm_device *dev, struct nvbios *bios, 875 struct bit_entry *bitentry) 876 { 877 /* 878 * offset + 2 (8 bits): number of options in an 879 * INIT_RAM_RESTRICT_ZM_REG_GROUP opcode option set 880 * offset + 3 (16 bits): pointer to strap xlate table for RAM 881 * restrict option selection 882 * 883 * There's a bunch of bits in this table other than the RAM restrict 884 * stuff that we don't use - their use currently unknown 885 */ 886 887 /* 888 * Older bios versions don't have a sufficiently long table for 889 * what we want 890 */ 891 if (bitentry->length < 0x5) 892 return 0; 893 894 if (bitentry->version < 2) { 895 bios->ram_restrict_group_count = bios->data[bitentry->offset + 2]; 896 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 3]); 897 } else { 898 bios->ram_restrict_group_count = bios->data[bitentry->offset + 0]; 899 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 1]); 900 } 901 902 return 0; 903 } 904 905 static int parse_bit_tmds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry) 906 { 907 /* 908 * Parses the pointer to the TMDS table 909 * 910 * Starting at bitentry->offset: 911 * 912 * offset + 0 (16 bits): TMDS table pointer 913 * 914 * The TMDS table is typically found just before the DCB table, with a 915 * characteristic signature of 0x11,0x13 (1.1 being version, 0x13 being 916 * length?) 917 * 918 * At offset +7 is a pointer to a script, which I don't know how to 919 * run yet. 920 * At offset +9 is a pointer to another script, likewise 921 * Offset +11 has a pointer to a table where the first word is a pxclk 922 * frequency and the second word a pointer to a script, which should be 923 * run if the comparison pxclk frequency is less than the pxclk desired. 924 * This repeats for decreasing comparison frequencies 925 * Offset +13 has a pointer to a similar table 926 * The selection of table (and possibly +7/+9 script) is dictated by 927 * "or" from the DCB. 928 */ 929 930 struct nouveau_drm *drm = nouveau_drm(dev); 931 uint16_t tmdstableptr, script1, script2; 932 933 if (bitentry->length != 2) { 934 NV_ERROR(drm, "Do not understand BIT TMDS table\n"); 935 return -EINVAL; 936 } 937 938 tmdstableptr = ROM16(bios->data[bitentry->offset]); 939 if (!tmdstableptr) { 940 NV_INFO(drm, "Pointer to TMDS table not found\n"); 941 return -EINVAL; 942 } 943 944 NV_INFO(drm, "TMDS table version %d.%d\n", 945 bios->data[tmdstableptr] >> 4, bios->data[tmdstableptr] & 0xf); 946 947 /* nv50+ has v2.0, but we don't parse it atm */ 948 if (bios->data[tmdstableptr] != 0x11) 949 return -ENOSYS; 950 951 /* 952 * These two scripts are odd: they don't seem to get run even when 953 * they are not stubbed. 954 */ 955 script1 = ROM16(bios->data[tmdstableptr + 7]); 956 script2 = ROM16(bios->data[tmdstableptr + 9]); 957 if (bios->data[script1] != 'q' || bios->data[script2] != 'q') 958 NV_WARN(drm, "TMDS table script pointers not stubbed\n"); 959 960 bios->tmds.output0_script_ptr = ROM16(bios->data[tmdstableptr + 11]); 961 bios->tmds.output1_script_ptr = ROM16(bios->data[tmdstableptr + 13]); 962 963 return 0; 964 } 965 966 struct bit_table { 967 const char id; 968 int (* const parse_fn)(struct drm_device *, struct nvbios *, struct bit_entry *); 969 }; 970 971 #define BIT_TABLE(id, funcid) ((struct bit_table){ id, parse_bit_##funcid##_tbl_entry }) 972 973 int 974 bit_table(struct drm_device *dev, u8 id, struct bit_entry *bit) 975 { 976 struct nouveau_drm *drm = nouveau_drm(dev); 977 struct nvbios *bios = &drm->vbios; 978 u8 entries, *entry; 979 980 if (bios->type != NVBIOS_BIT) 981 return -ENODEV; 982 983 entries = bios->data[bios->offset + 10]; 984 entry = &bios->data[bios->offset + 12]; 985 while (entries--) { 986 if (entry[0] == id) { 987 bit->id = entry[0]; 988 bit->version = entry[1]; 989 bit->length = ROM16(entry[2]); 990 bit->offset = ROM16(entry[4]); 991 bit->data = ROMPTR(dev, entry[4]); 992 return 0; 993 } 994 995 entry += bios->data[bios->offset + 9]; 996 } 997 998 return -ENOENT; 999 } 1000 1001 static int 1002 parse_bit_table(struct nvbios *bios, const uint16_t bitoffset, 1003 struct bit_table *table) 1004 { 1005 struct drm_device *dev = bios->dev; 1006 struct nouveau_drm *drm = nouveau_drm(dev); 1007 struct bit_entry bitentry; 1008 1009 if (bit_table(dev, table->id, &bitentry) == 0) 1010 return table->parse_fn(dev, bios, &bitentry); 1011 1012 NV_INFO(drm, "BIT table '%c' not found\n", table->id); 1013 return -ENOSYS; 1014 } 1015 1016 static int 1017 parse_bit_structure(struct nvbios *bios, const uint16_t bitoffset) 1018 { 1019 int ret; 1020 1021 /* 1022 * The only restriction on parsing order currently is having 'i' first 1023 * for use of bios->*_version or bios->feature_byte while parsing; 1024 * functions shouldn't be actually *doing* anything apart from pulling 1025 * data from the image into the bios struct, thus no interdependencies 1026 */ 1027 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('i', i)); 1028 if (ret) /* info? */ 1029 return ret; 1030 if (bios->major_version >= 0x60) /* g80+ */ 1031 parse_bit_table(bios, bitoffset, &BIT_TABLE('A', A)); 1032 parse_bit_table(bios, bitoffset, &BIT_TABLE('D', display)); 1033 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('I', init)); 1034 if (ret) 1035 return ret; 1036 parse_bit_table(bios, bitoffset, &BIT_TABLE('M', M)); /* memory? */ 1037 parse_bit_table(bios, bitoffset, &BIT_TABLE('L', lvds)); 1038 parse_bit_table(bios, bitoffset, &BIT_TABLE('T', tmds)); 1039 1040 return 0; 1041 } 1042 1043 static int parse_bmp_structure(struct drm_device *dev, struct nvbios *bios, unsigned int offset) 1044 { 1045 /* 1046 * Parses the BMP structure for useful things, but does not act on them 1047 * 1048 * offset + 5: BMP major version 1049 * offset + 6: BMP minor version 1050 * offset + 9: BMP feature byte 1051 * offset + 10: BCD encoded BIOS version 1052 * 1053 * offset + 18: init script table pointer (for bios versions < 5.10h) 1054 * offset + 20: extra init script table pointer (for bios 1055 * versions < 5.10h) 1056 * 1057 * offset + 24: memory init table pointer (used on early bios versions) 1058 * offset + 26: SDR memory sequencing setup data table 1059 * offset + 28: DDR memory sequencing setup data table 1060 * 1061 * offset + 54: index of I2C CRTC pair to use for CRT output 1062 * offset + 55: index of I2C CRTC pair to use for TV output 1063 * offset + 56: index of I2C CRTC pair to use for flat panel output 1064 * offset + 58: write CRTC index for I2C pair 0 1065 * offset + 59: read CRTC index for I2C pair 0 1066 * offset + 60: write CRTC index for I2C pair 1 1067 * offset + 61: read CRTC index for I2C pair 1 1068 * 1069 * offset + 67: maximum internal PLL frequency (single stage PLL) 1070 * offset + 71: minimum internal PLL frequency (single stage PLL) 1071 * 1072 * offset + 75: script table pointers, as described in 1073 * parse_script_table_pointers 1074 * 1075 * offset + 89: TMDS single link output A table pointer 1076 * offset + 91: TMDS single link output B table pointer 1077 * offset + 95: LVDS single link output A table pointer 1078 * offset + 105: flat panel timings table pointer 1079 * offset + 107: flat panel strapping translation table pointer 1080 * offset + 117: LVDS manufacturer panel config table pointer 1081 * offset + 119: LVDS manufacturer strapping translation table pointer 1082 * 1083 * offset + 142: PLL limits table pointer 1084 * 1085 * offset + 156: minimum pixel clock for LVDS dual link 1086 */ 1087 1088 struct nouveau_drm *drm = nouveau_drm(dev); 1089 uint8_t *bmp = &bios->data[offset], bmp_version_major, bmp_version_minor; 1090 uint16_t bmplength; 1091 uint16_t legacy_scripts_offset, legacy_i2c_offset; 1092 1093 /* load needed defaults in case we can't parse this info */ 1094 bios->digital_min_front_porch = 0x4b; 1095 bios->fmaxvco = 256000; 1096 bios->fminvco = 128000; 1097 bios->fp.duallink_transition_clk = 90000; 1098 1099 bmp_version_major = bmp[5]; 1100 bmp_version_minor = bmp[6]; 1101 1102 NV_INFO(drm, "BMP version %d.%d\n", 1103 bmp_version_major, bmp_version_minor); 1104 1105 /* 1106 * Make sure that 0x36 is blank and can't be mistaken for a DCB 1107 * pointer on early versions 1108 */ 1109 if (bmp_version_major < 5) 1110 *(uint16_t *)&bios->data[0x36] = 0; 1111 1112 /* 1113 * Seems that the minor version was 1 for all major versions prior 1114 * to 5. Version 6 could theoretically exist, but I suspect BIT 1115 * happened instead. 1116 */ 1117 if ((bmp_version_major < 5 && bmp_version_minor != 1) || bmp_version_major > 5) { 1118 NV_ERROR(drm, "You have an unsupported BMP version. " 1119 "Please send in your bios\n"); 1120 return -ENOSYS; 1121 } 1122 1123 if (bmp_version_major == 0) 1124 /* nothing that's currently useful in this version */ 1125 return 0; 1126 else if (bmp_version_major == 1) 1127 bmplength = 44; /* exact for 1.01 */ 1128 else if (bmp_version_major == 2) 1129 bmplength = 48; /* exact for 2.01 */ 1130 else if (bmp_version_major == 3) 1131 bmplength = 54; 1132 /* guessed - mem init tables added in this version */ 1133 else if (bmp_version_major == 4 || bmp_version_minor < 0x1) 1134 /* don't know if 5.0 exists... */ 1135 bmplength = 62; 1136 /* guessed - BMP I2C indices added in version 4*/ 1137 else if (bmp_version_minor < 0x6) 1138 bmplength = 67; /* exact for 5.01 */ 1139 else if (bmp_version_minor < 0x10) 1140 bmplength = 75; /* exact for 5.06 */ 1141 else if (bmp_version_minor == 0x10) 1142 bmplength = 89; /* exact for 5.10h */ 1143 else if (bmp_version_minor < 0x14) 1144 bmplength = 118; /* exact for 5.11h */ 1145 else if (bmp_version_minor < 0x24) 1146 /* 1147 * Not sure of version where pll limits came in; 1148 * certainly exist by 0x24 though. 1149 */ 1150 /* length not exact: this is long enough to get lvds members */ 1151 bmplength = 123; 1152 else if (bmp_version_minor < 0x27) 1153 /* 1154 * Length not exact: this is long enough to get pll limit 1155 * member 1156 */ 1157 bmplength = 144; 1158 else 1159 /* 1160 * Length not exact: this is long enough to get dual link 1161 * transition clock. 1162 */ 1163 bmplength = 158; 1164 1165 /* checksum */ 1166 if (nv_cksum(bmp, 8)) { 1167 NV_ERROR(drm, "Bad BMP checksum\n"); 1168 return -EINVAL; 1169 } 1170 1171 /* 1172 * Bit 4 seems to indicate either a mobile bios or a quadro card -- 1173 * mobile behaviour consistent (nv11+), quadro only seen nv18gl-nv36gl 1174 * (not nv10gl), bit 5 that the flat panel tables are present, and 1175 * bit 6 a tv bios. 1176 */ 1177 bios->feature_byte = bmp[9]; 1178 1179 if (bmp_version_major < 5 || bmp_version_minor < 0x10) 1180 bios->old_style_init = true; 1181 legacy_scripts_offset = 18; 1182 if (bmp_version_major < 2) 1183 legacy_scripts_offset -= 4; 1184 bios->init_script_tbls_ptr = ROM16(bmp[legacy_scripts_offset]); 1185 bios->extra_init_script_tbl_ptr = ROM16(bmp[legacy_scripts_offset + 2]); 1186 1187 if (bmp_version_major > 2) { /* appears in BMP 3 */ 1188 bios->legacy.mem_init_tbl_ptr = ROM16(bmp[24]); 1189 bios->legacy.sdr_seq_tbl_ptr = ROM16(bmp[26]); 1190 bios->legacy.ddr_seq_tbl_ptr = ROM16(bmp[28]); 1191 } 1192 1193 legacy_i2c_offset = 0x48; /* BMP version 2 & 3 */ 1194 if (bmplength > 61) 1195 legacy_i2c_offset = offset + 54; 1196 bios->legacy.i2c_indices.crt = bios->data[legacy_i2c_offset]; 1197 bios->legacy.i2c_indices.tv = bios->data[legacy_i2c_offset + 1]; 1198 bios->legacy.i2c_indices.panel = bios->data[legacy_i2c_offset + 2]; 1199 1200 if (bmplength > 74) { 1201 bios->fmaxvco = ROM32(bmp[67]); 1202 bios->fminvco = ROM32(bmp[71]); 1203 } 1204 if (bmplength > 88) 1205 parse_script_table_pointers(bios, offset + 75); 1206 if (bmplength > 94) { 1207 bios->tmds.output0_script_ptr = ROM16(bmp[89]); 1208 bios->tmds.output1_script_ptr = ROM16(bmp[91]); 1209 /* 1210 * Never observed in use with lvds scripts, but is reused for 1211 * 18/24 bit panel interface default for EDID equipped panels 1212 * (if_is_24bit not set directly to avoid any oscillation). 1213 */ 1214 bios->legacy.lvds_single_a_script_ptr = ROM16(bmp[95]); 1215 } 1216 if (bmplength > 108) { 1217 bios->fp.fptablepointer = ROM16(bmp[105]); 1218 bios->fp.fpxlatetableptr = ROM16(bmp[107]); 1219 bios->fp.xlatwidth = 1; 1220 } 1221 if (bmplength > 120) { 1222 bios->fp.lvdsmanufacturerpointer = ROM16(bmp[117]); 1223 bios->fp.fpxlatemanufacturertableptr = ROM16(bmp[119]); 1224 } 1225 #if 0 1226 if (bmplength > 143) 1227 bios->pll_limit_tbl_ptr = ROM16(bmp[142]); 1228 #endif 1229 1230 if (bmplength > 157) 1231 bios->fp.duallink_transition_clk = ROM16(bmp[156]) * 10; 1232 1233 return 0; 1234 } 1235 1236 static uint16_t findstr(uint8_t *data, int n, const uint8_t *str, int len) 1237 { 1238 int i, j; 1239 1240 for (i = 0; i <= (n - len); i++) { 1241 for (j = 0; j < len; j++) 1242 if (data[i + j] != str[j]) 1243 break; 1244 if (j == len) 1245 return i; 1246 } 1247 1248 return 0; 1249 } 1250 1251 void * 1252 olddcb_table(struct drm_device *dev) 1253 { 1254 struct nouveau_drm *drm = nouveau_drm(dev); 1255 u8 *dcb = NULL; 1256 1257 if (drm->client.device.info.family > NV_DEVICE_INFO_V0_TNT) 1258 dcb = ROMPTR(dev, drm->vbios.data[0x36]); 1259 if (!dcb) { 1260 NV_WARN(drm, "No DCB data found in VBIOS\n"); 1261 return NULL; 1262 } 1263 1264 if (dcb[0] >= 0x42) { 1265 NV_WARN(drm, "DCB version 0x%02x unknown\n", dcb[0]); 1266 return NULL; 1267 } else 1268 if (dcb[0] >= 0x30) { 1269 if (ROM32(dcb[6]) == 0x4edcbdcb) 1270 return dcb; 1271 } else 1272 if (dcb[0] >= 0x20) { 1273 if (ROM32(dcb[4]) == 0x4edcbdcb) 1274 return dcb; 1275 } else 1276 if (dcb[0] >= 0x15) { 1277 if (!memcmp(&dcb[-7], "DEV_REC", 7)) 1278 return dcb; 1279 } else { 1280 /* 1281 * v1.4 (some NV15/16, NV11+) seems the same as v1.5, but 1282 * always has the same single (crt) entry, even when tv-out 1283 * present, so the conclusion is this version cannot really 1284 * be used. 1285 * 1286 * v1.2 tables (some NV6/10, and NV15+) normally have the 1287 * same 5 entries, which are not specific to the card and so 1288 * no use. 1289 * 1290 * v1.2 does have an I2C table that read_dcb_i2c_table can 1291 * handle, but cards exist (nv11 in #14821) with a bad i2c 1292 * table pointer, so use the indices parsed in 1293 * parse_bmp_structure. 1294 * 1295 * v1.1 (NV5+, maybe some NV4) is entirely unhelpful 1296 */ 1297 NV_WARN(drm, "No useful DCB data in VBIOS\n"); 1298 return NULL; 1299 } 1300 1301 NV_WARN(drm, "DCB header validation failed\n"); 1302 return NULL; 1303 } 1304 1305 void * 1306 olddcb_outp(struct drm_device *dev, u8 idx) 1307 { 1308 u8 *dcb = olddcb_table(dev); 1309 if (dcb && dcb[0] >= 0x30) { 1310 if (idx < dcb[2]) 1311 return dcb + dcb[1] + (idx * dcb[3]); 1312 } else 1313 if (dcb && dcb[0] >= 0x20) { 1314 u8 *i2c = ROMPTR(dev, dcb[2]); 1315 u8 *ent = dcb + 8 + (idx * 8); 1316 if (i2c && ent < i2c) 1317 return ent; 1318 } else 1319 if (dcb && dcb[0] >= 0x15) { 1320 u8 *i2c = ROMPTR(dev, dcb[2]); 1321 u8 *ent = dcb + 4 + (idx * 10); 1322 if (i2c && ent < i2c) 1323 return ent; 1324 } 1325 1326 return NULL; 1327 } 1328 1329 int 1330 olddcb_outp_foreach(struct drm_device *dev, void *data, 1331 int (*exec)(struct drm_device *, void *, int idx, u8 *outp)) 1332 { 1333 int ret, idx = -1; 1334 u8 *outp = NULL; 1335 while ((outp = olddcb_outp(dev, ++idx))) { 1336 if (ROM32(outp[0]) == 0x00000000) 1337 break; /* seen on an NV11 with DCB v1.5 */ 1338 if (ROM32(outp[0]) == 0xffffffff) 1339 break; /* seen on an NV17 with DCB v2.0 */ 1340 1341 if ((outp[0] & 0x0f) == DCB_OUTPUT_UNUSED) 1342 continue; 1343 if ((outp[0] & 0x0f) == DCB_OUTPUT_EOL) 1344 break; 1345 1346 ret = exec(dev, data, idx, outp); 1347 if (ret) 1348 return ret; 1349 } 1350 1351 return 0; 1352 } 1353 1354 u8 * 1355 olddcb_conntab(struct drm_device *dev) 1356 { 1357 u8 *dcb = olddcb_table(dev); 1358 if (dcb && dcb[0] >= 0x30 && dcb[1] >= 0x16) { 1359 u8 *conntab = ROMPTR(dev, dcb[0x14]); 1360 if (conntab && conntab[0] >= 0x30 && conntab[0] <= 0x40) 1361 return conntab; 1362 } 1363 return NULL; 1364 } 1365 1366 u8 * 1367 olddcb_conn(struct drm_device *dev, u8 idx) 1368 { 1369 u8 *conntab = olddcb_conntab(dev); 1370 if (conntab && idx < conntab[2]) 1371 return conntab + conntab[1] + (idx * conntab[3]); 1372 return NULL; 1373 } 1374 1375 static struct dcb_output *new_dcb_entry(struct dcb_table *dcb) 1376 { 1377 struct dcb_output *entry = &dcb->entry[dcb->entries]; 1378 1379 memset(entry, 0, sizeof(struct dcb_output)); 1380 entry->index = dcb->entries++; 1381 1382 return entry; 1383 } 1384 1385 static void fabricate_dcb_output(struct dcb_table *dcb, int type, int i2c, 1386 int heads, int or) 1387 { 1388 struct dcb_output *entry = new_dcb_entry(dcb); 1389 1390 entry->type = type; 1391 entry->i2c_index = i2c; 1392 entry->heads = heads; 1393 if (type != DCB_OUTPUT_ANALOG) 1394 entry->location = !DCB_LOC_ON_CHIP; /* ie OFF CHIP */ 1395 entry->or = or; 1396 } 1397 1398 static bool 1399 parse_dcb20_entry(struct drm_device *dev, struct dcb_table *dcb, 1400 uint32_t conn, uint32_t conf, struct dcb_output *entry) 1401 { 1402 struct nouveau_drm *drm = nouveau_drm(dev); 1403 int link = 0; 1404 1405 entry->type = conn & 0xf; 1406 entry->i2c_index = (conn >> 4) & 0xf; 1407 entry->heads = (conn >> 8) & 0xf; 1408 entry->connector = (conn >> 12) & 0xf; 1409 entry->bus = (conn >> 16) & 0xf; 1410 entry->location = (conn >> 20) & 0x3; 1411 entry->or = (conn >> 24) & 0xf; 1412 1413 switch (entry->type) { 1414 case DCB_OUTPUT_ANALOG: 1415 /* 1416 * Although the rest of a CRT conf dword is usually 1417 * zeros, mac biosen have stuff there so we must mask 1418 */ 1419 entry->crtconf.maxfreq = (dcb->version < 0x30) ? 1420 (conf & 0xffff) * 10 : 1421 (conf & 0xff) * 10000; 1422 break; 1423 case DCB_OUTPUT_LVDS: 1424 { 1425 uint32_t mask; 1426 if (conf & 0x1) 1427 entry->lvdsconf.use_straps_for_mode = true; 1428 if (dcb->version < 0x22) { 1429 mask = ~0xd; 1430 /* 1431 * The laptop in bug 14567 lies and claims to not use 1432 * straps when it does, so assume all DCB 2.0 laptops 1433 * use straps, until a broken EDID using one is produced 1434 */ 1435 entry->lvdsconf.use_straps_for_mode = true; 1436 /* 1437 * Both 0x4 and 0x8 show up in v2.0 tables; assume they 1438 * mean the same thing (probably wrong, but might work) 1439 */ 1440 if (conf & 0x4 || conf & 0x8) 1441 entry->lvdsconf.use_power_scripts = true; 1442 } else { 1443 mask = ~0x7; 1444 if (conf & 0x2) 1445 entry->lvdsconf.use_acpi_for_edid = true; 1446 if (conf & 0x4) 1447 entry->lvdsconf.use_power_scripts = true; 1448 entry->lvdsconf.sor.link = (conf & 0x00000030) >> 4; 1449 link = entry->lvdsconf.sor.link; 1450 } 1451 if (conf & mask) { 1452 /* 1453 * Until we even try to use these on G8x, it's 1454 * useless reporting unknown bits. They all are. 1455 */ 1456 if (dcb->version >= 0x40) 1457 break; 1458 1459 NV_ERROR(drm, "Unknown LVDS configuration bits, " 1460 "please report\n"); 1461 } 1462 break; 1463 } 1464 case DCB_OUTPUT_TV: 1465 { 1466 if (dcb->version >= 0x30) 1467 entry->tvconf.has_component_output = conf & (0x8 << 4); 1468 else 1469 entry->tvconf.has_component_output = false; 1470 1471 break; 1472 } 1473 case DCB_OUTPUT_DP: 1474 entry->dpconf.sor.link = (conf & 0x00000030) >> 4; 1475 entry->extdev = (conf & 0x0000ff00) >> 8; 1476 switch ((conf & 0x00e00000) >> 21) { 1477 case 0: 1478 entry->dpconf.link_bw = 162000; 1479 break; 1480 case 1: 1481 entry->dpconf.link_bw = 270000; 1482 break; 1483 case 2: 1484 entry->dpconf.link_bw = 540000; 1485 break; 1486 case 3: 1487 default: 1488 entry->dpconf.link_bw = 810000; 1489 break; 1490 } 1491 switch ((conf & 0x0f000000) >> 24) { 1492 case 0xf: 1493 case 0x4: 1494 entry->dpconf.link_nr = 4; 1495 break; 1496 case 0x3: 1497 case 0x2: 1498 entry->dpconf.link_nr = 2; 1499 break; 1500 default: 1501 entry->dpconf.link_nr = 1; 1502 break; 1503 } 1504 link = entry->dpconf.sor.link; 1505 break; 1506 case DCB_OUTPUT_TMDS: 1507 if (dcb->version >= 0x40) { 1508 entry->tmdsconf.sor.link = (conf & 0x00000030) >> 4; 1509 entry->extdev = (conf & 0x0000ff00) >> 8; 1510 link = entry->tmdsconf.sor.link; 1511 } 1512 else if (dcb->version >= 0x30) 1513 entry->tmdsconf.slave_addr = (conf & 0x00000700) >> 8; 1514 else if (dcb->version >= 0x22) 1515 entry->tmdsconf.slave_addr = (conf & 0x00000070) >> 4; 1516 break; 1517 case DCB_OUTPUT_EOL: 1518 /* weird g80 mobile type that "nv" treats as a terminator */ 1519 dcb->entries--; 1520 return false; 1521 default: 1522 break; 1523 } 1524 1525 if (dcb->version < 0x40) { 1526 /* Normal entries consist of a single bit, but dual link has 1527 * the next most significant bit set too 1528 */ 1529 entry->duallink_possible = 1530 ((1 << (ffs(entry->or) - 1)) * 3 == entry->or); 1531 } else { 1532 entry->duallink_possible = (entry->sorconf.link == 3); 1533 } 1534 1535 /* unsure what DCB version introduces this, 3.0? */ 1536 if (conf & 0x100000) 1537 entry->i2c_upper_default = true; 1538 1539 entry->hasht = (entry->extdev << 8) | (entry->location << 4) | 1540 entry->type; 1541 entry->hashm = (entry->heads << 8) | (link << 6) | entry->or; 1542 return true; 1543 } 1544 1545 static bool 1546 parse_dcb15_entry(struct drm_device *dev, struct dcb_table *dcb, 1547 uint32_t conn, uint32_t conf, struct dcb_output *entry) 1548 { 1549 struct nouveau_drm *drm = nouveau_drm(dev); 1550 1551 switch (conn & 0x0000000f) { 1552 case 0: 1553 entry->type = DCB_OUTPUT_ANALOG; 1554 break; 1555 case 1: 1556 entry->type = DCB_OUTPUT_TV; 1557 break; 1558 case 2: 1559 case 4: 1560 if (conn & 0x10) 1561 entry->type = DCB_OUTPUT_LVDS; 1562 else 1563 entry->type = DCB_OUTPUT_TMDS; 1564 break; 1565 case 3: 1566 entry->type = DCB_OUTPUT_LVDS; 1567 break; 1568 default: 1569 NV_ERROR(drm, "Unknown DCB type %d\n", conn & 0x0000000f); 1570 return false; 1571 } 1572 1573 entry->i2c_index = (conn & 0x0003c000) >> 14; 1574 entry->heads = ((conn & 0x001c0000) >> 18) + 1; 1575 entry->or = entry->heads; /* same as heads, hopefully safe enough */ 1576 entry->location = (conn & 0x01e00000) >> 21; 1577 entry->bus = (conn & 0x0e000000) >> 25; 1578 entry->duallink_possible = false; 1579 1580 switch (entry->type) { 1581 case DCB_OUTPUT_ANALOG: 1582 entry->crtconf.maxfreq = (conf & 0xffff) * 10; 1583 break; 1584 case DCB_OUTPUT_TV: 1585 entry->tvconf.has_component_output = false; 1586 break; 1587 case DCB_OUTPUT_LVDS: 1588 if ((conn & 0x00003f00) >> 8 != 0x10) 1589 entry->lvdsconf.use_straps_for_mode = true; 1590 entry->lvdsconf.use_power_scripts = true; 1591 break; 1592 default: 1593 break; 1594 } 1595 1596 return true; 1597 } 1598 1599 static 1600 void merge_like_dcb_entries(struct drm_device *dev, struct dcb_table *dcb) 1601 { 1602 /* 1603 * DCB v2.0 lists each output combination separately. 1604 * Here we merge compatible entries to have fewer outputs, with 1605 * more options 1606 */ 1607 1608 struct nouveau_drm *drm = nouveau_drm(dev); 1609 int i, newentries = 0; 1610 1611 for (i = 0; i < dcb->entries; i++) { 1612 struct dcb_output *ient = &dcb->entry[i]; 1613 int j; 1614 1615 for (j = i + 1; j < dcb->entries; j++) { 1616 struct dcb_output *jent = &dcb->entry[j]; 1617 1618 if (jent->type == 100) /* already merged entry */ 1619 continue; 1620 1621 /* merge heads field when all other fields the same */ 1622 if (jent->i2c_index == ient->i2c_index && 1623 jent->type == ient->type && 1624 jent->location == ient->location && 1625 jent->or == ient->or) { 1626 NV_INFO(drm, "Merging DCB entries %d and %d\n", 1627 i, j); 1628 ient->heads |= jent->heads; 1629 jent->type = 100; /* dummy value */ 1630 } 1631 } 1632 } 1633 1634 /* Compact entries merged into others out of dcb */ 1635 for (i = 0; i < dcb->entries; i++) { 1636 if (dcb->entry[i].type == 100) 1637 continue; 1638 1639 if (newentries != i) { 1640 dcb->entry[newentries] = dcb->entry[i]; 1641 dcb->entry[newentries].index = newentries; 1642 } 1643 newentries++; 1644 } 1645 1646 dcb->entries = newentries; 1647 } 1648 1649 static bool 1650 apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf) 1651 { 1652 struct nouveau_drm *drm = nouveau_drm(dev); 1653 struct dcb_table *dcb = &drm->vbios.dcb; 1654 1655 /* Dell Precision M6300 1656 * DCB entry 2: 02025312 00000010 1657 * DCB entry 3: 02026312 00000020 1658 * 1659 * Identical, except apparently a different connector on a 1660 * different SOR link. Not a clue how we're supposed to know 1661 * which one is in use if it even shares an i2c line... 1662 * 1663 * Ignore the connector on the second SOR link to prevent 1664 * nasty problems until this is sorted (assuming it's not a 1665 * VBIOS bug). 1666 */ 1667 if (nv_match_device(dev, 0x040d, 0x1028, 0x019b)) { 1668 if (*conn == 0x02026312 && *conf == 0x00000020) 1669 return false; 1670 } 1671 1672 /* GeForce3 Ti 200 1673 * 1674 * DCB reports an LVDS output that should be TMDS: 1675 * DCB entry 1: f2005014 ffffffff 1676 */ 1677 if (nv_match_device(dev, 0x0201, 0x1462, 0x8851)) { 1678 if (*conn == 0xf2005014 && *conf == 0xffffffff) { 1679 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1, 1, DCB_OUTPUT_B); 1680 return false; 1681 } 1682 } 1683 1684 /* XFX GT-240X-YA 1685 * 1686 * So many things wrong here, replace the entire encoder table.. 1687 */ 1688 if (nv_match_device(dev, 0x0ca3, 0x1682, 0x3003)) { 1689 if (idx == 0) { 1690 *conn = 0x02001300; /* VGA, connector 1 */ 1691 *conf = 0x00000028; 1692 } else 1693 if (idx == 1) { 1694 *conn = 0x01010312; /* DVI, connector 0 */ 1695 *conf = 0x00020030; 1696 } else 1697 if (idx == 2) { 1698 *conn = 0x01010310; /* VGA, connector 0 */ 1699 *conf = 0x00000028; 1700 } else 1701 if (idx == 3) { 1702 *conn = 0x02022362; /* HDMI, connector 2 */ 1703 *conf = 0x00020010; 1704 } else { 1705 *conn = 0x0000000e; /* EOL */ 1706 *conf = 0x00000000; 1707 } 1708 } 1709 1710 /* Some other twisted XFX board (rhbz#694914) 1711 * 1712 * The DVI/VGA encoder combo that's supposed to represent the 1713 * DVI-I connector actually point at two different ones, and 1714 * the HDMI connector ends up paired with the VGA instead. 1715 * 1716 * Connector table is missing anything for VGA at all, pointing it 1717 * an invalid conntab entry 2 so we figure it out ourself. 1718 */ 1719 if (nv_match_device(dev, 0x0615, 0x1682, 0x2605)) { 1720 if (idx == 0) { 1721 *conn = 0x02002300; /* VGA, connector 2 */ 1722 *conf = 0x00000028; 1723 } else 1724 if (idx == 1) { 1725 *conn = 0x01010312; /* DVI, connector 0 */ 1726 *conf = 0x00020030; 1727 } else 1728 if (idx == 2) { 1729 *conn = 0x04020310; /* VGA, connector 0 */ 1730 *conf = 0x00000028; 1731 } else 1732 if (idx == 3) { 1733 *conn = 0x02021322; /* HDMI, connector 1 */ 1734 *conf = 0x00020010; 1735 } else { 1736 *conn = 0x0000000e; /* EOL */ 1737 *conf = 0x00000000; 1738 } 1739 } 1740 1741 /* fdo#50830: connector indices for VGA and DVI-I are backwards */ 1742 if (nv_match_device(dev, 0x0421, 0x3842, 0xc793)) { 1743 if (idx == 0 && *conn == 0x02000300) 1744 *conn = 0x02011300; 1745 else 1746 if (idx == 1 && *conn == 0x04011310) 1747 *conn = 0x04000310; 1748 else 1749 if (idx == 2 && *conn == 0x02011312) 1750 *conn = 0x02000312; 1751 } 1752 1753 return true; 1754 } 1755 1756 static void 1757 fabricate_dcb_encoder_table(struct drm_device *dev, struct nvbios *bios) 1758 { 1759 struct dcb_table *dcb = &bios->dcb; 1760 int all_heads = (nv_two_heads(dev) ? 3 : 1); 1761 1762 #ifdef __powerpc__ 1763 /* Apple iMac G4 NV17 */ 1764 if (of_machine_is_compatible("PowerMac4,5")) { 1765 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 0, all_heads, DCB_OUTPUT_B); 1766 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1, all_heads, DCB_OUTPUT_C); 1767 return; 1768 } 1769 #endif 1770 1771 /* Make up some sane defaults */ 1772 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1773 bios->legacy.i2c_indices.crt, 1, DCB_OUTPUT_B); 1774 1775 if (nv04_tv_identify(dev, bios->legacy.i2c_indices.tv) >= 0) 1776 fabricate_dcb_output(dcb, DCB_OUTPUT_TV, 1777 bios->legacy.i2c_indices.tv, 1778 all_heads, DCB_OUTPUT_A); 1779 1780 else if (bios->tmds.output0_script_ptr || 1781 bios->tmds.output1_script_ptr) 1782 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1783 bios->legacy.i2c_indices.panel, 1784 all_heads, DCB_OUTPUT_B); 1785 } 1786 1787 static int 1788 parse_dcb_entry(struct drm_device *dev, void *data, int idx, u8 *outp) 1789 { 1790 struct nouveau_drm *drm = nouveau_drm(dev); 1791 struct dcb_table *dcb = &drm->vbios.dcb; 1792 u32 conf = (dcb->version >= 0x20) ? ROM32(outp[4]) : ROM32(outp[6]); 1793 u32 conn = ROM32(outp[0]); 1794 bool ret; 1795 1796 if (apply_dcb_encoder_quirks(dev, idx, &conn, &conf)) { 1797 struct dcb_output *entry = new_dcb_entry(dcb); 1798 1799 NV_INFO(drm, "DCB outp %02d: %08x %08x\n", idx, conn, conf); 1800 1801 if (dcb->version >= 0x20) 1802 ret = parse_dcb20_entry(dev, dcb, conn, conf, entry); 1803 else 1804 ret = parse_dcb15_entry(dev, dcb, conn, conf, entry); 1805 entry->id = idx; 1806 1807 if (!ret) 1808 return 1; /* stop parsing */ 1809 1810 /* Ignore the I2C index for on-chip TV-out, as there 1811 * are cards with bogus values (nv31m in bug 23212), 1812 * and it's otherwise useless. 1813 */ 1814 if (entry->type == DCB_OUTPUT_TV && 1815 entry->location == DCB_LOC_ON_CHIP) 1816 entry->i2c_index = 0x0f; 1817 } 1818 1819 return 0; 1820 } 1821 1822 static void 1823 dcb_fake_connectors(struct nvbios *bios) 1824 { 1825 struct dcb_table *dcbt = &bios->dcb; 1826 u8 map[16] = { }; 1827 int i, idx = 0; 1828 1829 /* heuristic: if we ever get a non-zero connector field, assume 1830 * that all the indices are valid and we don't need fake them. 1831 * 1832 * and, as usual, a blacklist of boards with bad bios data.. 1833 */ 1834 if (!nv_match_device(bios->dev, 0x0392, 0x107d, 0x20a2)) { 1835 for (i = 0; i < dcbt->entries; i++) { 1836 if (dcbt->entry[i].connector) 1837 return; 1838 } 1839 } 1840 1841 /* no useful connector info available, we need to make it up 1842 * ourselves. the rule here is: anything on the same i2c bus 1843 * is considered to be on the same connector. any output 1844 * without an associated i2c bus is assigned its own unique 1845 * connector index. 1846 */ 1847 for (i = 0; i < dcbt->entries; i++) { 1848 u8 i2c = dcbt->entry[i].i2c_index; 1849 if (i2c == 0x0f) { 1850 dcbt->entry[i].connector = idx++; 1851 } else { 1852 if (!map[i2c]) 1853 map[i2c] = ++idx; 1854 dcbt->entry[i].connector = map[i2c] - 1; 1855 } 1856 } 1857 1858 /* if we created more than one connector, destroy the connector 1859 * table - just in case it has random, rather than stub, entries. 1860 */ 1861 if (i > 1) { 1862 u8 *conntab = olddcb_conntab(bios->dev); 1863 if (conntab) 1864 conntab[0] = 0x00; 1865 } 1866 } 1867 1868 static int 1869 parse_dcb_table(struct drm_device *dev, struct nvbios *bios) 1870 { 1871 struct nouveau_drm *drm = nouveau_drm(dev); 1872 struct dcb_table *dcb = &bios->dcb; 1873 u8 *dcbt, *conn; 1874 int idx; 1875 1876 dcbt = olddcb_table(dev); 1877 if (!dcbt) { 1878 /* handle pre-DCB boards */ 1879 if (bios->type == NVBIOS_BMP) { 1880 fabricate_dcb_encoder_table(dev, bios); 1881 return 0; 1882 } 1883 1884 return -EINVAL; 1885 } 1886 1887 NV_INFO(drm, "DCB version %d.%d\n", dcbt[0] >> 4, dcbt[0] & 0xf); 1888 1889 dcb->version = dcbt[0]; 1890 olddcb_outp_foreach(dev, NULL, parse_dcb_entry); 1891 1892 /* 1893 * apart for v2.1+ not being known for requiring merging, this 1894 * guarantees dcbent->index is the index of the entry in the rom image 1895 */ 1896 if (dcb->version < 0x21) 1897 merge_like_dcb_entries(dev, dcb); 1898 1899 /* dump connector table entries to log, if any exist */ 1900 idx = -1; 1901 while ((conn = olddcb_conn(dev, ++idx))) { 1902 if (conn[0] != 0xff) { 1903 if (olddcb_conntab(dev)[3] < 4) 1904 NV_INFO(drm, "DCB conn %02d: %04x\n", 1905 idx, ROM16(conn[0])); 1906 else 1907 NV_INFO(drm, "DCB conn %02d: %08x\n", 1908 idx, ROM32(conn[0])); 1909 } 1910 } 1911 dcb_fake_connectors(bios); 1912 return 0; 1913 } 1914 1915 static int load_nv17_hwsq_ucode_entry(struct drm_device *dev, struct nvbios *bios, uint16_t hwsq_offset, int entry) 1916 { 1917 /* 1918 * The header following the "HWSQ" signature has the number of entries, 1919 * and the entry size 1920 * 1921 * An entry consists of a dword to write to the sequencer control reg 1922 * (0x00001304), followed by the ucode bytes, written sequentially, 1923 * starting at reg 0x00001400 1924 */ 1925 1926 struct nouveau_drm *drm = nouveau_drm(dev); 1927 struct nvif_object *device = &drm->client.device.object; 1928 uint8_t bytes_to_write; 1929 uint16_t hwsq_entry_offset; 1930 int i; 1931 1932 if (bios->data[hwsq_offset] <= entry) { 1933 NV_ERROR(drm, "Too few entries in HW sequencer table for " 1934 "requested entry\n"); 1935 return -ENOENT; 1936 } 1937 1938 bytes_to_write = bios->data[hwsq_offset + 1]; 1939 1940 if (bytes_to_write != 36) { 1941 NV_ERROR(drm, "Unknown HW sequencer entry size\n"); 1942 return -EINVAL; 1943 } 1944 1945 NV_INFO(drm, "Loading NV17 power sequencing microcode\n"); 1946 1947 hwsq_entry_offset = hwsq_offset + 2 + entry * bytes_to_write; 1948 1949 /* set sequencer control */ 1950 nvif_wr32(device, 0x00001304, ROM32(bios->data[hwsq_entry_offset])); 1951 bytes_to_write -= 4; 1952 1953 /* write ucode */ 1954 for (i = 0; i < bytes_to_write; i += 4) 1955 nvif_wr32(device, 0x00001400 + i, ROM32(bios->data[hwsq_entry_offset + i + 4])); 1956 1957 /* twiddle NV_PBUS_DEBUG_4 */ 1958 nvif_wr32(device, NV_PBUS_DEBUG_4, nvif_rd32(device, NV_PBUS_DEBUG_4) | 0x18); 1959 1960 return 0; 1961 } 1962 1963 static int load_nv17_hw_sequencer_ucode(struct drm_device *dev, 1964 struct nvbios *bios) 1965 { 1966 /* 1967 * BMP based cards, from NV17, need a microcode loading to correctly 1968 * control the GPIO etc for LVDS panels 1969 * 1970 * BIT based cards seem to do this directly in the init scripts 1971 * 1972 * The microcode entries are found by the "HWSQ" signature. 1973 */ 1974 1975 static const uint8_t hwsq_signature[] = { 'H', 'W', 'S', 'Q' }; 1976 const int sz = sizeof(hwsq_signature); 1977 int hwsq_offset; 1978 1979 hwsq_offset = findstr(bios->data, bios->length, hwsq_signature, sz); 1980 if (!hwsq_offset) 1981 return 0; 1982 1983 /* always use entry 0? */ 1984 return load_nv17_hwsq_ucode_entry(dev, bios, hwsq_offset + sz, 0); 1985 } 1986 1987 uint8_t *nouveau_bios_embedded_edid(struct drm_device *dev) 1988 { 1989 struct nouveau_drm *drm = nouveau_drm(dev); 1990 struct nvbios *bios = &drm->vbios; 1991 static const uint8_t edid_sig[] = { 1992 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 }; 1993 uint16_t offset = 0; 1994 uint16_t newoffset; 1995 int searchlen = NV_PROM_SIZE; 1996 1997 if (bios->fp.edid) 1998 return bios->fp.edid; 1999 2000 while (searchlen) { 2001 newoffset = findstr(&bios->data[offset], searchlen, 2002 edid_sig, 8); 2003 if (!newoffset) 2004 return NULL; 2005 offset += newoffset; 2006 if (!nv_cksum(&bios->data[offset], EDID1_LEN)) 2007 break; 2008 2009 searchlen -= offset; 2010 offset++; 2011 } 2012 2013 NV_INFO(drm, "Found EDID in BIOS\n"); 2014 2015 return bios->fp.edid = &bios->data[offset]; 2016 } 2017 2018 static bool NVInitVBIOS(struct drm_device *dev) 2019 { 2020 struct nouveau_drm *drm = nouveau_drm(dev); 2021 struct nvkm_bios *bios = nvxx_bios(&drm->client.device); 2022 struct nvbios *legacy = &drm->vbios; 2023 2024 memset(legacy, 0, sizeof(struct nvbios)); 2025 spin_lock_init(&legacy->lock); 2026 legacy->dev = dev; 2027 2028 legacy->data = bios->data; 2029 legacy->length = bios->size; 2030 legacy->major_version = bios->version.major; 2031 legacy->chip_version = bios->version.chip; 2032 if (bios->bit_offset) { 2033 legacy->type = NVBIOS_BIT; 2034 legacy->offset = bios->bit_offset; 2035 return !parse_bit_structure(legacy, legacy->offset + 6); 2036 } else 2037 if (bios->bmp_offset) { 2038 legacy->type = NVBIOS_BMP; 2039 legacy->offset = bios->bmp_offset; 2040 return !parse_bmp_structure(dev, legacy, legacy->offset); 2041 } 2042 2043 return false; 2044 } 2045 2046 int 2047 nouveau_run_vbios_init(struct drm_device *dev) 2048 { 2049 struct nouveau_drm *drm = nouveau_drm(dev); 2050 struct nvbios *bios = &drm->vbios; 2051 2052 /* Reset the BIOS head to 0. */ 2053 bios->state.crtchead = 0; 2054 2055 if (bios->major_version < 5) /* BMP only */ 2056 load_nv17_hw_sequencer_ucode(dev, bios); 2057 2058 if (bios->execute) { 2059 bios->fp.last_script_invoc = 0; 2060 bios->fp.lvds_init_run = false; 2061 } 2062 2063 return 0; 2064 } 2065 2066 static bool 2067 nouveau_bios_posted(struct drm_device *dev) 2068 { 2069 struct nouveau_drm *drm = nouveau_drm(dev); 2070 unsigned htotal; 2071 2072 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) 2073 return true; 2074 2075 htotal = NVReadVgaCrtc(dev, 0, 0x06); 2076 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x01) << 8; 2077 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x20) << 4; 2078 htotal |= (NVReadVgaCrtc(dev, 0, 0x25) & 0x01) << 10; 2079 htotal |= (NVReadVgaCrtc(dev, 0, 0x41) & 0x01) << 11; 2080 return (htotal != 0); 2081 } 2082 2083 int 2084 nouveau_bios_init(struct drm_device *dev) 2085 { 2086 struct nouveau_drm *drm = nouveau_drm(dev); 2087 struct nvbios *bios = &drm->vbios; 2088 int ret; 2089 2090 /* only relevant for PCI devices */ 2091 if (!dev_is_pci(dev->dev)) 2092 return 0; 2093 2094 if (!NVInitVBIOS(dev)) 2095 return -ENODEV; 2096 2097 ret = parse_dcb_table(dev, bios); 2098 if (ret) 2099 return ret; 2100 2101 if (!bios->major_version) /* we don't run version 0 bios */ 2102 return 0; 2103 2104 /* init script execution disabled */ 2105 bios->execute = false; 2106 2107 /* ... unless card isn't POSTed already */ 2108 if (!nouveau_bios_posted(dev)) { 2109 NV_INFO(drm, "Adaptor not initialised, " 2110 "running VBIOS init tables.\n"); 2111 bios->execute = true; 2112 } 2113 2114 ret = nouveau_run_vbios_init(dev); 2115 if (ret) 2116 return ret; 2117 2118 /* feature_byte on BMP is poor, but init always sets CR4B */ 2119 if (bios->major_version < 5) 2120 bios->is_mobile = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_4B) & 0x40; 2121 2122 /* all BIT systems need p_f_m_t for digital_min_front_porch */ 2123 if (bios->is_mobile || bios->major_version >= 5) 2124 ret = parse_fp_mode_table(dev, bios); 2125 2126 /* allow subsequent scripts to execute */ 2127 bios->execute = true; 2128 2129 return 0; 2130 } 2131 2132 void 2133 nouveau_bios_takedown(struct drm_device *dev) 2134 { 2135 } 2136