1b7019ac5SIlia Mirkin /* SPDX-License-Identifier: MIT */ 221b13791SBen Skeggs #ifndef __NVKM_PMU_H__ 321b13791SBen Skeggs #define __NVKM_PMU_H__ 4ebb58dc2SBen Skeggs #include <core/subdev.h> 52952a2b4SBen Skeggs #include <core/falcon.h> 6ebb58dc2SBen Skeggs 721b13791SBen Skeggs struct nvkm_pmu { 8e2ca4e7dSBen Skeggs const struct nvkm_pmu_func *func; 95a7d1e22SBen Skeggs struct nvkm_subdev subdev; 102952a2b4SBen Skeggs struct nvkm_falcon falcon; 118763955bSBen Skeggs 128763955bSBen Skeggs struct nvkm_falcon_qmgr *qmgr; 139ce480feSAlexandre Courbot struct nvkm_msgqueue *queue; 14ebb58dc2SBen Skeggs 15ebb58dc2SBen Skeggs struct { 16ebb58dc2SBen Skeggs u32 base; 17ebb58dc2SBen Skeggs u32 size; 18ebb58dc2SBen Skeggs } send; 19ebb58dc2SBen Skeggs 20ebb58dc2SBen Skeggs struct { 21ebb58dc2SBen Skeggs u32 base; 22ebb58dc2SBen Skeggs u32 size; 23ebb58dc2SBen Skeggs 24ebb58dc2SBen Skeggs struct work_struct work; 25ebb58dc2SBen Skeggs wait_queue_head_t wait; 26ebb58dc2SBen Skeggs u32 process; 27ebb58dc2SBen Skeggs u32 message; 28ebb58dc2SBen Skeggs u32 data[2]; 29ebb58dc2SBen Skeggs } recv; 30ebb58dc2SBen Skeggs }; 31ebb58dc2SBen Skeggs 32e2ca4e7dSBen Skeggs int nvkm_pmu_send(struct nvkm_pmu *, u32 reply[2], u32 process, 33e2ca4e7dSBen Skeggs u32 message, u32 data0, u32 data1); 34e2ca4e7dSBen Skeggs void nvkm_pmu_pgob(struct nvkm_pmu *, bool enable); 3569cbbb7bSBen Skeggs bool nvkm_pmu_fan_controlled(struct nvkm_device *); 36ebb58dc2SBen Skeggs 37e2ca4e7dSBen Skeggs int gt215_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **); 38e2ca4e7dSBen Skeggs int gf100_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **); 39e2ca4e7dSBen Skeggs int gf119_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **); 40e2ca4e7dSBen Skeggs int gk104_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **); 41e2ca4e7dSBen Skeggs int gk110_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **); 42e2ca4e7dSBen Skeggs int gk208_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **); 43e2ca4e7dSBen Skeggs int gk20a_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **); 44e2ca4e7dSBen Skeggs int gm107_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **); 45b1c39d80SAlexandre Courbot int gm20b_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **); 4641c7be69SBen Skeggs int gp100_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **); 47d91ccec6SBen Skeggs int gp102_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **); 48e905736cSBen Skeggs int gp10b_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **); 49ebb58dc2SBen Skeggs 50ebb58dc2SBen Skeggs /* interface to MEMX process running on PMU */ 5121b13791SBen Skeggs struct nvkm_memx; 5221b13791SBen Skeggs int nvkm_memx_init(struct nvkm_pmu *, struct nvkm_memx **); 5321b13791SBen Skeggs int nvkm_memx_fini(struct nvkm_memx **, bool exec); 5421b13791SBen Skeggs void nvkm_memx_wr32(struct nvkm_memx *, u32 addr, u32 data); 5521b13791SBen Skeggs void nvkm_memx_wait(struct nvkm_memx *, u32 addr, u32 mask, u32 data, u32 nsec); 5621b13791SBen Skeggs void nvkm_memx_nsec(struct nvkm_memx *, u32 nsec); 5721b13791SBen Skeggs void nvkm_memx_wait_vblank(struct nvkm_memx *); 5821b13791SBen Skeggs void nvkm_memx_train(struct nvkm_memx *); 5921b13791SBen Skeggs int nvkm_memx_train_result(struct nvkm_pmu *, u32 *, int); 6021b13791SBen Skeggs void nvkm_memx_block(struct nvkm_memx *); 6121b13791SBen Skeggs void nvkm_memx_unblock(struct nvkm_memx *); 62ebb58dc2SBen Skeggs #endif 63