1c39f472eSBen Skeggs #ifndef __NVBIOS_RAMCFG_H__
2c39f472eSBen Skeggs #define __NVBIOS_RAMCFG_H__
3c39f472eSBen Skeggs 
4c39f472eSBen Skeggs struct nouveau_bios;
5c39f472eSBen Skeggs 
6c39f472eSBen Skeggs struct nvbios_ramcfg {
7c39f472eSBen Skeggs 	unsigned rammap_ver;
8c39f472eSBen Skeggs 	unsigned rammap_hdr;
9c39f472eSBen Skeggs 	unsigned rammap_min;
10c39f472eSBen Skeggs 	unsigned rammap_max;
11c39f472eSBen Skeggs 	union {
12c39f472eSBen Skeggs 		struct {
13c39f472eSBen Skeggs 			unsigned rammap_10_04_02:1;
14c39f472eSBen Skeggs 			unsigned rammap_10_04_08:1;
15c39f472eSBen Skeggs 		};
16c39f472eSBen Skeggs 		struct {
17c39f472eSBen Skeggs 			unsigned rammap_11_08_01:1;
18c39f472eSBen Skeggs 			unsigned rammap_11_08_0c:2;
19c39f472eSBen Skeggs 			unsigned rammap_11_08_10:1;
20c39f472eSBen Skeggs 			unsigned rammap_11_09_01ff:9;
21c39f472eSBen Skeggs 			unsigned rammap_11_0a_03fe:9;
22c39f472eSBen Skeggs 			unsigned rammap_11_0a_0400:1;
23c39f472eSBen Skeggs 			unsigned rammap_11_0a_0800:1;
24c39f472eSBen Skeggs 			unsigned rammap_11_0b_01f0:5;
25c39f472eSBen Skeggs 			unsigned rammap_11_0b_0200:1;
26c39f472eSBen Skeggs 			unsigned rammap_11_0b_0400:1;
27c39f472eSBen Skeggs 			unsigned rammap_11_0b_0800:1;
28c39f472eSBen Skeggs 			unsigned rammap_11_0d:8;
29c39f472eSBen Skeggs 			unsigned rammap_11_0e:8;
30c39f472eSBen Skeggs 			unsigned rammap_11_0f:8;
31c39f472eSBen Skeggs 			unsigned rammap_11_11_0c:2;
32c39f472eSBen Skeggs 		};
33c39f472eSBen Skeggs 	};
34c39f472eSBen Skeggs 
35c39f472eSBen Skeggs 	unsigned ramcfg_ver;
36c39f472eSBen Skeggs 	unsigned ramcfg_hdr;
37c39f472eSBen Skeggs 	unsigned ramcfg_timing;
38c39f472eSBen Skeggs 	union {
39c39f472eSBen Skeggs 		struct {
40c39f472eSBen Skeggs 			unsigned ramcfg_10_02_01:1;
41c39f472eSBen Skeggs 			unsigned ramcfg_10_02_02:1;
42c39f472eSBen Skeggs 			unsigned ramcfg_10_02_04:1;
43c39f472eSBen Skeggs 			unsigned ramcfg_10_02_08:1;
44c39f472eSBen Skeggs 			unsigned ramcfg_10_02_10:1;
45c39f472eSBen Skeggs 			unsigned ramcfg_10_02_20:1;
46c39f472eSBen Skeggs 			unsigned ramcfg_10_DLLoff:1;
47c39f472eSBen Skeggs 			unsigned ramcfg_10_03_0f:4;
48c39f472eSBen Skeggs 			unsigned ramcfg_10_04_01:1;
49c39f472eSBen Skeggs 			unsigned ramcfg_10_05:8;
50c39f472eSBen Skeggs 			unsigned ramcfg_10_06:8;
51c39f472eSBen Skeggs 			unsigned ramcfg_10_07:8;
52c39f472eSBen Skeggs 			unsigned ramcfg_10_08:8;
53c39f472eSBen Skeggs 			unsigned ramcfg_10_09_0f:4;
54c39f472eSBen Skeggs 			unsigned ramcfg_10_09_f0:4;
55c39f472eSBen Skeggs 		};
56c39f472eSBen Skeggs 		struct {
57c39f472eSBen Skeggs 			unsigned ramcfg_11_01_01:1;
58c39f472eSBen Skeggs 			unsigned ramcfg_11_01_02:1;
59c39f472eSBen Skeggs 			unsigned ramcfg_11_01_04:1;
60c39f472eSBen Skeggs 			unsigned ramcfg_11_01_08:1;
61c39f472eSBen Skeggs 			unsigned ramcfg_11_01_10:1;
62c39f472eSBen Skeggs 			unsigned ramcfg_11_01_20:1;
63c39f472eSBen Skeggs 			unsigned ramcfg_11_01_40:1;
64c39f472eSBen Skeggs 			unsigned ramcfg_11_01_80:1;
65c39f472eSBen Skeggs 			unsigned ramcfg_11_02_03:2;
66c39f472eSBen Skeggs 			unsigned ramcfg_11_02_04:1;
67c39f472eSBen Skeggs 			unsigned ramcfg_11_02_08:1;
68c39f472eSBen Skeggs 			unsigned ramcfg_11_02_10:1;
69c39f472eSBen Skeggs 			unsigned ramcfg_11_02_40:1;
70c39f472eSBen Skeggs 			unsigned ramcfg_11_02_80:1;
71c39f472eSBen Skeggs 			unsigned ramcfg_11_03_0f:4;
72c39f472eSBen Skeggs 			unsigned ramcfg_11_03_30:2;
73c39f472eSBen Skeggs 			unsigned ramcfg_11_03_c0:2;
74c39f472eSBen Skeggs 			unsigned ramcfg_11_03_f0:4;
75c39f472eSBen Skeggs 			unsigned ramcfg_11_04:8;
76c39f472eSBen Skeggs 			unsigned ramcfg_11_06:8;
77c39f472eSBen Skeggs 			unsigned ramcfg_11_07_02:1;
78c39f472eSBen Skeggs 			unsigned ramcfg_11_07_04:1;
79c39f472eSBen Skeggs 			unsigned ramcfg_11_07_08:1;
80c39f472eSBen Skeggs 			unsigned ramcfg_11_07_10:1;
81c39f472eSBen Skeggs 			unsigned ramcfg_11_07_40:1;
82c39f472eSBen Skeggs 			unsigned ramcfg_11_07_80:1;
83c39f472eSBen Skeggs 			unsigned ramcfg_11_08_01:1;
84c39f472eSBen Skeggs 			unsigned ramcfg_11_08_02:1;
85c39f472eSBen Skeggs 			unsigned ramcfg_11_08_04:1;
86c39f472eSBen Skeggs 			unsigned ramcfg_11_08_08:1;
87c39f472eSBen Skeggs 			unsigned ramcfg_11_08_10:1;
88c39f472eSBen Skeggs 			unsigned ramcfg_11_08_20:1;
89c39f472eSBen Skeggs 			unsigned ramcfg_11_09:8;
90c39f472eSBen Skeggs 		};
91c39f472eSBen Skeggs 	};
92c39f472eSBen Skeggs 
93c39f472eSBen Skeggs 	unsigned timing_ver;
94c39f472eSBen Skeggs 	unsigned timing_hdr;
95c39f472eSBen Skeggs 	unsigned timing[11];
96c39f472eSBen Skeggs 	union {
97c39f472eSBen Skeggs 		struct {
98c39f472eSBen Skeggs 			unsigned timing_10_WR:8;
99c39f472eSBen Skeggs 			unsigned timing_10_WTR:8;
100c39f472eSBen Skeggs 			unsigned timing_10_CL:8;
101c39f472eSBen Skeggs 			unsigned timing_10_RC:8;
102c39f472eSBen Skeggs 			/*empty: 4 */
103c39f472eSBen Skeggs 			unsigned timing_10_RFC:8;        /* Byte 5 */
104c39f472eSBen Skeggs 			/*empty: 6 */
105c39f472eSBen Skeggs 			unsigned timing_10_RAS:8;        /* Byte 7 */
106c39f472eSBen Skeggs 			/*empty: 8 */
107c39f472eSBen Skeggs 			unsigned timing_10_RP:8;         /* Byte 9 */
108c39f472eSBen Skeggs 			unsigned timing_10_RCDRD:8;
109c39f472eSBen Skeggs 			unsigned timing_10_RCDWR:8;
110c39f472eSBen Skeggs 			unsigned timing_10_RRD:8;
111c39f472eSBen Skeggs 			unsigned timing_10_13:8;
112c39f472eSBen Skeggs 			unsigned timing_10_ODT:3;
113c39f472eSBen Skeggs 			/* empty: 15 */
114c39f472eSBen Skeggs 			unsigned timing_10_16:8;
115c39f472eSBen Skeggs 			/* empty: 17 */
116c39f472eSBen Skeggs 			unsigned timing_10_18:8;
117c39f472eSBen Skeggs 			unsigned timing_10_CWL:8;
118c39f472eSBen Skeggs 			unsigned timing_10_20:8;
119c39f472eSBen Skeggs 			unsigned timing_10_21:8;
120c39f472eSBen Skeggs 			/* empty: 22, 23 */
121c39f472eSBen Skeggs 			unsigned timing_10_24:8;
122c39f472eSBen Skeggs 		};
123c39f472eSBen Skeggs 		struct {
124c39f472eSBen Skeggs 			unsigned timing_20_2e_03:2;
125c39f472eSBen Skeggs 			unsigned timing_20_2e_30:2;
126c39f472eSBen Skeggs 			unsigned timing_20_2e_c0:2;
127c39f472eSBen Skeggs 			unsigned timing_20_2f_03:2;
128c39f472eSBen Skeggs 			unsigned timing_20_2c_003f:6;
129c39f472eSBen Skeggs 			unsigned timing_20_2c_1fc0:7;
130c39f472eSBen Skeggs 			unsigned timing_20_30_f8:5;
131c39f472eSBen Skeggs 			unsigned timing_20_30_07:3;
132c39f472eSBen Skeggs 			unsigned timing_20_31_0007:3;
133c39f472eSBen Skeggs 			unsigned timing_20_31_0078:4;
134c39f472eSBen Skeggs 			unsigned timing_20_31_0780:4;
135c39f472eSBen Skeggs 			unsigned timing_20_31_0800:1;
136c39f472eSBen Skeggs 			unsigned timing_20_31_7000:3;
137c39f472eSBen Skeggs 			unsigned timing_20_31_8000:1;
138c39f472eSBen Skeggs 		};
139c39f472eSBen Skeggs 	};
140c39f472eSBen Skeggs };
141c39f472eSBen Skeggs 
142c39f472eSBen Skeggs u8 nvbios_ramcfg_count(struct nouveau_bios *);
143c39f472eSBen Skeggs u8 nvbios_ramcfg_index(struct nouveau_subdev *);
144c39f472eSBen Skeggs 
145c39f472eSBen Skeggs #endif
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