1b7019ac5SIlia Mirkin /* SPDX-License-Identifier: MIT */
2c39f472eSBen Skeggs #ifndef __NVBIOS_RAMCFG_H__
3c39f472eSBen Skeggs #define __NVBIOS_RAMCFG_H__
4c39f472eSBen Skeggs struct nvbios_ramcfg {
5c39f472eSBen Skeggs 	unsigned rammap_ver;
6c39f472eSBen Skeggs 	unsigned rammap_hdr;
7c39f472eSBen Skeggs 	unsigned rammap_min;
8c39f472eSBen Skeggs 	unsigned rammap_max;
9c39f472eSBen Skeggs 	union {
10c39f472eSBen Skeggs 		struct {
112813e19fSRoy Spliet 			unsigned rammap_00_16_20:1;
122813e19fSRoy Spliet 			unsigned rammap_00_16_40:1;
132813e19fSRoy Spliet 			unsigned rammap_00_17_02:1;
142813e19fSRoy Spliet 		};
152813e19fSRoy Spliet 		struct {
16c39f472eSBen Skeggs 			unsigned rammap_10_04_02:1;
17c39f472eSBen Skeggs 			unsigned rammap_10_04_08:1;
18c39f472eSBen Skeggs 		};
19c39f472eSBen Skeggs 		struct {
20c39f472eSBen Skeggs 			unsigned rammap_11_08_01:1;
21c39f472eSBen Skeggs 			unsigned rammap_11_08_0c:2;
22c39f472eSBen Skeggs 			unsigned rammap_11_08_10:1;
23c39f472eSBen Skeggs 			unsigned rammap_11_09_01ff:9;
24c39f472eSBen Skeggs 			unsigned rammap_11_0a_03fe:9;
25c39f472eSBen Skeggs 			unsigned rammap_11_0a_0400:1;
26c39f472eSBen Skeggs 			unsigned rammap_11_0a_0800:1;
27c39f472eSBen Skeggs 			unsigned rammap_11_0b_01f0:5;
28c39f472eSBen Skeggs 			unsigned rammap_11_0b_0200:1;
29c39f472eSBen Skeggs 			unsigned rammap_11_0b_0400:1;
30c39f472eSBen Skeggs 			unsigned rammap_11_0b_0800:1;
31c39f472eSBen Skeggs 			unsigned rammap_11_0d:8;
32c39f472eSBen Skeggs 			unsigned rammap_11_0e:8;
33c39f472eSBen Skeggs 			unsigned rammap_11_0f:8;
34c39f472eSBen Skeggs 			unsigned rammap_11_11_0c:2;
35c39f472eSBen Skeggs 		};
36c39f472eSBen Skeggs 	};
37c39f472eSBen Skeggs 
38c39f472eSBen Skeggs 	unsigned ramcfg_ver;
39c39f472eSBen Skeggs 	unsigned ramcfg_hdr;
40c39f472eSBen Skeggs 	unsigned ramcfg_timing;
417164f4c5SRoy Spliet 	unsigned ramcfg_DLLoff;
42c25bf7b6SRoy Spliet 	unsigned ramcfg_RON;
43ef6e8f4cSRoy Spliet 	unsigned ramcfg_FBVDDQ;
44c39f472eSBen Skeggs 	union {
45c39f472eSBen Skeggs 		struct {
4635fe024aSRoy Spliet 			unsigned ramcfg_00_03_01:1;
4735fe024aSRoy Spliet 			unsigned ramcfg_00_03_02:1;
4835fe024aSRoy Spliet 			unsigned ramcfg_00_03_08:1;
4935fe024aSRoy Spliet 			unsigned ramcfg_00_03_10:1;
5035fe024aSRoy Spliet 			unsigned ramcfg_00_04_02:1;
5135fe024aSRoy Spliet 			unsigned ramcfg_00_04_04:1;
5235fe024aSRoy Spliet 			unsigned ramcfg_00_04_20:1;
5335fe024aSRoy Spliet 			unsigned ramcfg_00_05:8;
5435fe024aSRoy Spliet 			unsigned ramcfg_00_06:8;
5535fe024aSRoy Spliet 			unsigned ramcfg_00_07:8;
5635fe024aSRoy Spliet 			unsigned ramcfg_00_08:8;
5735fe024aSRoy Spliet 			unsigned ramcfg_00_09:8;
5835fe024aSRoy Spliet 			unsigned ramcfg_00_0a_0f:4;
5935fe024aSRoy Spliet 			unsigned ramcfg_00_0a_f0:4;
6035fe024aSRoy Spliet 		};
6135fe024aSRoy Spliet 		struct {
62c39f472eSBen Skeggs 			unsigned ramcfg_10_02_01:1;
63c39f472eSBen Skeggs 			unsigned ramcfg_10_02_02:1;
64c39f472eSBen Skeggs 			unsigned ramcfg_10_02_04:1;
65c39f472eSBen Skeggs 			unsigned ramcfg_10_02_08:1;
66c39f472eSBen Skeggs 			unsigned ramcfg_10_02_10:1;
67c39f472eSBen Skeggs 			unsigned ramcfg_10_02_20:1;
68c39f472eSBen Skeggs 			unsigned ramcfg_10_03_0f:4;
69c39f472eSBen Skeggs 			unsigned ramcfg_10_04_01:1;
70c39f472eSBen Skeggs 			unsigned ramcfg_10_05:8;
71c39f472eSBen Skeggs 			unsigned ramcfg_10_06:8;
72c39f472eSBen Skeggs 			unsigned ramcfg_10_07:8;
73c39f472eSBen Skeggs 			unsigned ramcfg_10_08:8;
74c39f472eSBen Skeggs 			unsigned ramcfg_10_09_0f:4;
75c39f472eSBen Skeggs 			unsigned ramcfg_10_09_f0:4;
76c39f472eSBen Skeggs 		};
77c39f472eSBen Skeggs 		struct {
78c39f472eSBen Skeggs 			unsigned ramcfg_11_01_01:1;
79c39f472eSBen Skeggs 			unsigned ramcfg_11_01_02:1;
80c39f472eSBen Skeggs 			unsigned ramcfg_11_01_04:1;
81c39f472eSBen Skeggs 			unsigned ramcfg_11_01_08:1;
82c39f472eSBen Skeggs 			unsigned ramcfg_11_01_10:1;
83c39f472eSBen Skeggs 			unsigned ramcfg_11_01_40:1;
84c39f472eSBen Skeggs 			unsigned ramcfg_11_01_80:1;
85c39f472eSBen Skeggs 			unsigned ramcfg_11_02_03:2;
86c39f472eSBen Skeggs 			unsigned ramcfg_11_02_04:1;
87c39f472eSBen Skeggs 			unsigned ramcfg_11_02_08:1;
88c39f472eSBen Skeggs 			unsigned ramcfg_11_02_10:1;
89c39f472eSBen Skeggs 			unsigned ramcfg_11_02_40:1;
90c39f472eSBen Skeggs 			unsigned ramcfg_11_02_80:1;
91c39f472eSBen Skeggs 			unsigned ramcfg_11_03_0f:4;
92c39f472eSBen Skeggs 			unsigned ramcfg_11_03_30:2;
93c39f472eSBen Skeggs 			unsigned ramcfg_11_03_c0:2;
94c39f472eSBen Skeggs 			unsigned ramcfg_11_03_f0:4;
95c39f472eSBen Skeggs 			unsigned ramcfg_11_04:8;
96c39f472eSBen Skeggs 			unsigned ramcfg_11_06:8;
97c39f472eSBen Skeggs 			unsigned ramcfg_11_07_02:1;
98c39f472eSBen Skeggs 			unsigned ramcfg_11_07_04:1;
99c39f472eSBen Skeggs 			unsigned ramcfg_11_07_08:1;
100c39f472eSBen Skeggs 			unsigned ramcfg_11_07_10:1;
101c39f472eSBen Skeggs 			unsigned ramcfg_11_07_40:1;
102c39f472eSBen Skeggs 			unsigned ramcfg_11_07_80:1;
103c39f472eSBen Skeggs 			unsigned ramcfg_11_08_01:1;
104c39f472eSBen Skeggs 			unsigned ramcfg_11_08_02:1;
105c39f472eSBen Skeggs 			unsigned ramcfg_11_08_04:1;
106c39f472eSBen Skeggs 			unsigned ramcfg_11_08_08:1;
107c39f472eSBen Skeggs 			unsigned ramcfg_11_08_10:1;
108c39f472eSBen Skeggs 			unsigned ramcfg_11_08_20:1;
109c39f472eSBen Skeggs 			unsigned ramcfg_11_09:8;
110c39f472eSBen Skeggs 		};
111c39f472eSBen Skeggs 	};
112c39f472eSBen Skeggs 
113c39f472eSBen Skeggs 	unsigned timing_ver;
114c39f472eSBen Skeggs 	unsigned timing_hdr;
115c39f472eSBen Skeggs 	unsigned timing[11];
116c39f472eSBen Skeggs 	union {
117c39f472eSBen Skeggs 		struct {
118c39f472eSBen Skeggs 			unsigned timing_10_WR:8;
119c39f472eSBen Skeggs 			unsigned timing_10_WTR:8;
120c39f472eSBen Skeggs 			unsigned timing_10_CL:8;
121c39f472eSBen Skeggs 			unsigned timing_10_RC:8;
122c39f472eSBen Skeggs 			/*empty: 4 */
123c39f472eSBen Skeggs 			unsigned timing_10_RFC:8;        /* Byte 5 */
124c39f472eSBen Skeggs 			/*empty: 6 */
125c39f472eSBen Skeggs 			unsigned timing_10_RAS:8;        /* Byte 7 */
126c39f472eSBen Skeggs 			/*empty: 8 */
127c39f472eSBen Skeggs 			unsigned timing_10_RP:8;         /* Byte 9 */
128c39f472eSBen Skeggs 			unsigned timing_10_RCDRD:8;
129c39f472eSBen Skeggs 			unsigned timing_10_RCDWR:8;
130c39f472eSBen Skeggs 			unsigned timing_10_RRD:8;
131c39f472eSBen Skeggs 			unsigned timing_10_13:8;
132c39f472eSBen Skeggs 			unsigned timing_10_ODT:3;
133c39f472eSBen Skeggs 			/* empty: 15 */
134c39f472eSBen Skeggs 			unsigned timing_10_16:8;
135c39f472eSBen Skeggs 			/* empty: 17 */
136c39f472eSBen Skeggs 			unsigned timing_10_18:8;
137c39f472eSBen Skeggs 			unsigned timing_10_CWL:8;
138c39f472eSBen Skeggs 			unsigned timing_10_20:8;
139c39f472eSBen Skeggs 			unsigned timing_10_21:8;
140c39f472eSBen Skeggs 			/* empty: 22, 23 */
141c39f472eSBen Skeggs 			unsigned timing_10_24:8;
142c39f472eSBen Skeggs 		};
143c39f472eSBen Skeggs 		struct {
144c39f472eSBen Skeggs 			unsigned timing_20_2e_03:2;
145c39f472eSBen Skeggs 			unsigned timing_20_2e_30:2;
146c39f472eSBen Skeggs 			unsigned timing_20_2e_c0:2;
147c39f472eSBen Skeggs 			unsigned timing_20_2f_03:2;
148c39f472eSBen Skeggs 			unsigned timing_20_2c_003f:6;
149c39f472eSBen Skeggs 			unsigned timing_20_2c_1fc0:7;
150c39f472eSBen Skeggs 			unsigned timing_20_30_f8:5;
151c39f472eSBen Skeggs 			unsigned timing_20_30_07:3;
152c39f472eSBen Skeggs 			unsigned timing_20_31_0007:3;
153c39f472eSBen Skeggs 			unsigned timing_20_31_0078:4;
154c39f472eSBen Skeggs 			unsigned timing_20_31_0780:4;
155c39f472eSBen Skeggs 			unsigned timing_20_31_0800:1;
156c39f472eSBen Skeggs 			unsigned timing_20_31_7000:3;
157c39f472eSBen Skeggs 			unsigned timing_20_31_8000:1;
158c39f472eSBen Skeggs 		};
159c39f472eSBen Skeggs 	};
160c39f472eSBen Skeggs };
161c39f472eSBen Skeggs 
162d390b480SBen Skeggs u8 nvbios_ramcfg_count(struct nvkm_bios *);
163d390b480SBen Skeggs u8 nvbios_ramcfg_index(struct nvkm_subdev *);
164c39f472eSBen Skeggs #endif
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