1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __NVKM_FALCON_H__
3 #define __NVKM_FALCON_H__
4 #define nvkm_falcon(p) container_of((p), struct nvkm_falcon, engine)
5 #include <core/engine.h>
6 struct nvkm_fifo_chan;
7 struct nvkm_gpuobj;
8 
9 enum nvkm_falcon_dmaidx {
10 	FALCON_DMAIDX_UCODE		= 0,
11 	FALCON_DMAIDX_VIRT		= 1,
12 	FALCON_DMAIDX_PHYS_VID		= 2,
13 	FALCON_DMAIDX_PHYS_SYS_COH	= 3,
14 	FALCON_DMAIDX_PHYS_SYS_NCOH	= 4,
15 	FALCON_SEC2_DMAIDX_UCODE	= 6,
16 };
17 
18 struct nvkm_falcon {
19 	const struct nvkm_falcon_func *func;
20 	const struct nvkm_subdev *owner;
21 	const char *name;
22 	u32 addr;
23 
24 	struct mutex mutex;
25 	struct mutex dmem_mutex;
26 	const struct nvkm_subdev *user;
27 
28 	u8 version;
29 	u8 secret;
30 	bool debug;
31 	bool has_emem;
32 
33 	struct nvkm_memory *core;
34 	bool external;
35 
36 	struct {
37 		u32 limit;
38 		u32 *data;
39 		u32  size;
40 		u8 ports;
41 	} code;
42 
43 	struct {
44 		u32 limit;
45 		u32 *data;
46 		u32  size;
47 		u8 ports;
48 	} data;
49 
50 	struct nvkm_engine engine;
51 };
52 
53 /* This constructor must be called from the owner's oneinit() hook and
54  * *not* its constructor.  This is to ensure that DEVINIT has been
55  * completed, and that the device is correctly enabled before we touch
56  * falcon registers.
57  */
58 int nvkm_falcon_v1_new(struct nvkm_subdev *owner, const char *name, u32 addr,
59 		       struct nvkm_falcon **);
60 
61 void nvkm_falcon_del(struct nvkm_falcon **);
62 int nvkm_falcon_get(struct nvkm_falcon *, const struct nvkm_subdev *);
63 void nvkm_falcon_put(struct nvkm_falcon *, const struct nvkm_subdev *);
64 
65 int nvkm_falcon_new_(const struct nvkm_falcon_func *, struct nvkm_device *,
66 		     int index, bool enable, u32 addr, struct nvkm_engine **);
67 
68 struct nvkm_falcon_func {
69 	struct {
70 		u32 *data;
71 		u32  size;
72 	} code;
73 	struct {
74 		u32 *data;
75 		u32  size;
76 	} data;
77 	void (*init)(struct nvkm_falcon *);
78 	void (*intr)(struct nvkm_falcon *, struct nvkm_fifo_chan *);
79 	void (*load_imem)(struct nvkm_falcon *, void *, u32, u32, u16, u8, bool);
80 	void (*load_dmem)(struct nvkm_falcon *, void *, u32, u32, u8);
81 	void (*read_dmem)(struct nvkm_falcon *, u32, u32, u8, void *);
82 	void (*bind_context)(struct nvkm_falcon *, struct nvkm_memory *);
83 	int (*wait_for_halt)(struct nvkm_falcon *, u32);
84 	int (*clear_interrupt)(struct nvkm_falcon *, u32);
85 	void (*set_start_addr)(struct nvkm_falcon *, u32 start_addr);
86 	void (*start)(struct nvkm_falcon *);
87 	int (*enable)(struct nvkm_falcon *falcon);
88 	void (*disable)(struct nvkm_falcon *falcon);
89 
90 	struct nvkm_sclass sclass[];
91 };
92 
93 static inline u32
94 nvkm_falcon_rd32(struct nvkm_falcon *falcon, u32 addr)
95 {
96 	return nvkm_rd32(falcon->owner->device, falcon->addr + addr);
97 }
98 
99 static inline void
100 nvkm_falcon_wr32(struct nvkm_falcon *falcon, u32 addr, u32 data)
101 {
102 	nvkm_wr32(falcon->owner->device, falcon->addr + addr, data);
103 }
104 
105 static inline u32
106 nvkm_falcon_mask(struct nvkm_falcon *falcon, u32 addr, u32 mask, u32 val)
107 {
108 	struct nvkm_device *device = falcon->owner->device;
109 
110 	return nvkm_mask(device, falcon->addr + addr, mask, val);
111 }
112 
113 void nvkm_falcon_load_imem(struct nvkm_falcon *, void *, u32, u32, u16, u8,
114 			   bool);
115 void nvkm_falcon_load_dmem(struct nvkm_falcon *, void *, u32, u32, u8);
116 void nvkm_falcon_read_dmem(struct nvkm_falcon *, u32, u32, u8, void *);
117 void nvkm_falcon_bind_context(struct nvkm_falcon *, struct nvkm_memory *);
118 void nvkm_falcon_set_start_addr(struct nvkm_falcon *, u32);
119 void nvkm_falcon_start(struct nvkm_falcon *);
120 int nvkm_falcon_wait_for_halt(struct nvkm_falcon *, u32);
121 int nvkm_falcon_clear_interrupt(struct nvkm_falcon *, u32);
122 int nvkm_falcon_enable(struct nvkm_falcon *);
123 void nvkm_falcon_disable(struct nvkm_falcon *);
124 int nvkm_falcon_reset(struct nvkm_falcon *);
125 
126 #endif
127