1 #ifndef __NVKM_FALCON_H__
2 #define __NVKM_FALCON_H__
3 #define nvkm_falcon(p) container_of((p), struct nvkm_falcon, engine)
4 #include <core/engine.h>
5 struct nvkm_fifo_chan;
6 
7 enum nvkm_falcon_dmaidx {
8 	FALCON_DMAIDX_UCODE		= 0,
9 	FALCON_DMAIDX_VIRT		= 1,
10 	FALCON_DMAIDX_PHYS_VID		= 2,
11 	FALCON_DMAIDX_PHYS_SYS_COH	= 3,
12 	FALCON_DMAIDX_PHYS_SYS_NCOH	= 4,
13 	FALCON_SEC2_DMAIDX_UCODE	= 6,
14 };
15 
16 struct nvkm_falcon {
17 	const struct nvkm_falcon_func *func;
18 	const struct nvkm_subdev *owner;
19 	const char *name;
20 	u32 addr;
21 
22 	struct mutex mutex;
23 	struct mutex dmem_mutex;
24 	const struct nvkm_subdev *user;
25 
26 	u8 version;
27 	u8 secret;
28 	bool debug;
29 	bool has_emem;
30 
31 	struct nvkm_memory *core;
32 	bool external;
33 
34 	struct {
35 		u32 limit;
36 		u32 *data;
37 		u32  size;
38 		u8 ports;
39 	} code;
40 
41 	struct {
42 		u32 limit;
43 		u32 *data;
44 		u32  size;
45 		u8 ports;
46 	} data;
47 
48 	struct nvkm_engine engine;
49 };
50 
51 /* This constructor must be called from the owner's oneinit() hook and
52  * *not* its constructor.  This is to ensure that DEVINIT has been
53  * completed, and that the device is correctly enabled before we touch
54  * falcon registers.
55  */
56 int nvkm_falcon_v1_new(struct nvkm_subdev *owner, const char *name, u32 addr,
57 		       struct nvkm_falcon **);
58 
59 void nvkm_falcon_del(struct nvkm_falcon **);
60 int nvkm_falcon_get(struct nvkm_falcon *, const struct nvkm_subdev *);
61 void nvkm_falcon_put(struct nvkm_falcon *, const struct nvkm_subdev *);
62 
63 int nvkm_falcon_new_(const struct nvkm_falcon_func *, struct nvkm_device *,
64 		     int index, bool enable, u32 addr, struct nvkm_engine **);
65 
66 struct nvkm_falcon_func {
67 	struct {
68 		u32 *data;
69 		u32  size;
70 	} code;
71 	struct {
72 		u32 *data;
73 		u32  size;
74 	} data;
75 	void (*init)(struct nvkm_falcon *);
76 	void (*intr)(struct nvkm_falcon *, struct nvkm_fifo_chan *);
77 	void (*load_imem)(struct nvkm_falcon *, void *, u32, u32, u16, u8, bool);
78 	void (*load_dmem)(struct nvkm_falcon *, void *, u32, u32, u8);
79 	void (*read_dmem)(struct nvkm_falcon *, u32, u32, u8, void *);
80 	void (*bind_context)(struct nvkm_falcon *, struct nvkm_gpuobj *);
81 	int (*wait_for_halt)(struct nvkm_falcon *, u32);
82 	int (*clear_interrupt)(struct nvkm_falcon *, u32);
83 	void (*set_start_addr)(struct nvkm_falcon *, u32 start_addr);
84 	void (*start)(struct nvkm_falcon *);
85 	int (*enable)(struct nvkm_falcon *falcon);
86 	void (*disable)(struct nvkm_falcon *falcon);
87 
88 	struct nvkm_sclass sclass[];
89 };
90 
91 static inline u32
92 nvkm_falcon_rd32(struct nvkm_falcon *falcon, u32 addr)
93 {
94 	return nvkm_rd32(falcon->owner->device, falcon->addr + addr);
95 }
96 
97 static inline void
98 nvkm_falcon_wr32(struct nvkm_falcon *falcon, u32 addr, u32 data)
99 {
100 	nvkm_wr32(falcon->owner->device, falcon->addr + addr, data);
101 }
102 
103 static inline u32
104 nvkm_falcon_mask(struct nvkm_falcon *falcon, u32 addr, u32 mask, u32 val)
105 {
106 	struct nvkm_device *device = falcon->owner->device;
107 
108 	return nvkm_mask(device, falcon->addr + addr, mask, val);
109 }
110 
111 void nvkm_falcon_load_imem(struct nvkm_falcon *, void *, u32, u32, u16, u8,
112 			   bool);
113 void nvkm_falcon_load_dmem(struct nvkm_falcon *, void *, u32, u32, u8);
114 void nvkm_falcon_read_dmem(struct nvkm_falcon *, u32, u32, u8, void *);
115 void nvkm_falcon_bind_context(struct nvkm_falcon *, struct nvkm_gpuobj *);
116 void nvkm_falcon_set_start_addr(struct nvkm_falcon *, u32);
117 void nvkm_falcon_start(struct nvkm_falcon *);
118 int nvkm_falcon_wait_for_halt(struct nvkm_falcon *, u32);
119 int nvkm_falcon_clear_interrupt(struct nvkm_falcon *, u32);
120 int nvkm_falcon_enable(struct nvkm_falcon *);
121 void nvkm_falcon_disable(struct nvkm_falcon *);
122 int nvkm_falcon_reset(struct nvkm_falcon *);
123 
124 #endif
125