1 #ifndef __NVKM_DEVICE_TEGRA_H__ 2 #define __NVKM_DEVICE_TEGRA_H__ 3 #include <core/device.h> 4 #include <core/mm.h> 5 6 struct nvkm_device_tegra { 7 const struct nvkm_device_tegra_func *func; 8 struct nvkm_device device; 9 struct platform_device *pdev; 10 int irq; 11 12 struct reset_control *rst; 13 struct clk *clk; 14 struct clk *clk_ref; 15 struct clk *clk_pwr; 16 17 struct regulator *vdd; 18 19 struct { 20 /* 21 * Protects accesses to mm from subsystems 22 */ 23 struct mutex mutex; 24 25 struct nvkm_mm mm; 26 struct iommu_domain *domain; 27 unsigned long pgshift; 28 } iommu; 29 30 int gpu_speedo; 31 }; 32 33 struct nvkm_device_tegra_func { 34 /* 35 * If an IOMMU is used, indicates which address bit will trigger a 36 * IOMMU translation when set (when this bit is not set, IOMMU is 37 * bypassed). A value of 0 means an IOMMU is never used. 38 */ 39 u8 iommu_bit; 40 /* 41 * Whether the chip requires a reference clock 42 */ 43 bool require_ref_clk; 44 }; 45 46 int nvkm_device_tegra_new(const struct nvkm_device_tegra_func *, 47 struct platform_device *, 48 const char *cfg, const char *dbg, 49 bool detect, bool mmio, u64 subdev_mask, 50 struct nvkm_device **); 51 #endif 52