1 /* SPDX-License-Identifier: MIT */
2 #ifndef __NVIF_IF0012_H__
3 #define __NVIF_IF0012_H__
4 
5 union nvif_outp_args {
6 	struct nvif_outp_v0 {
7 		__u8 version;
8 		__u8 id;	/* DCB device index. */
9 		__u8 pad02[6];
10 	} v0;
11 };
12 
13 #define NVIF_OUTP_V0_LOAD_DETECT 0x00
14 #define NVIF_OUTP_V0_ACQUIRE     0x01
15 #define NVIF_OUTP_V0_RELEASE     0x02
16 #define NVIF_OUTP_V0_INFOFRAME   0x03
17 #define NVIF_OUTP_V0_HDA_ELD     0x04
18 #define NVIF_OUTP_V0_DP_AUX_PWR  0x05
19 #define NVIF_OUTP_V0_DP_RETRAIN  0x06
20 #define NVIF_OUTP_V0_DP_MST_VCPI 0x07
21 
22 union nvif_outp_load_detect_args {
23 	struct nvif_outp_load_detect_v0 {
24 		__u8  version;
25 		__u8  load;
26 		__u8  pad02[2];
27 		__u32 data; /*TODO: move vbios loadval parsing into nvkm */
28 	} v0;
29 };
30 
31 union nvif_outp_acquire_args {
32 	struct nvif_outp_acquire_v0 {
33 		__u8 version;
34 #define NVIF_OUTP_ACQUIRE_V0_RGB_CRT 0x00
35 #define NVIF_OUTP_ACQUIRE_V0_TV      0x01
36 #define NVIF_OUTP_ACQUIRE_V0_TMDS    0x02
37 #define NVIF_OUTP_ACQUIRE_V0_LVDS    0x03
38 #define NVIF_OUTP_ACQUIRE_V0_DP      0x04
39 		__u8 proto;
40 		__u8 or;
41 		__u8 link;
42 		__u8 pad04[4];
43 		union {
44 			struct {
45 				__u8 head;
46 				__u8 hdmi;
47 				__u8 hdmi_max_ac_packet;
48 				__u8 hdmi_rekey;
49 #define NVIF_OUTP_ACQUIRE_V0_TMDS_HDMI_SCDC_SCRAMBLE (1 << 0)
50 #define NVIF_OUTP_ACQUIRE_V0_TMDS_HDMI_SCDC_DIV_BY_4 (1 << 1)
51 				__u8 hdmi_scdc;
52 				__u8 hdmi_hda;
53 				__u8 pad06[2];
54 			} tmds;
55 			struct {
56 				__u8 dual;
57 				__u8 bpc8;
58 				__u8 pad02[6];
59 			} lvds;
60 			struct {
61 				__u8 link_nr; /* 0 = highest possible. */
62 				__u8 link_bw; /* 0 = highest possible, DP BW code otherwise. */
63 				__u8 hda;
64 				__u8 mst;
65 				__u8 pad04[4];
66 				__u8 dpcd[16];
67 			} dp;
68 		};
69 	} v0;
70 };
71 
72 union nvif_outp_release_args {
73 	struct nvif_outp_release_vn {
74 	} vn;
75 };
76 
77 union nvif_outp_infoframe_args {
78 	struct nvif_outp_infoframe_v0 {
79 		__u8 version;
80 #define NVIF_OUTP_INFOFRAME_V0_AVI 0
81 #define NVIF_OUTP_INFOFRAME_V0_VSI 1
82 		__u8 type;
83 		__u8 head;
84 		__u8 pad03[5];
85 		__u8 data[];
86 	} v0;
87 };
88 
89 union nvif_outp_hda_eld_args {
90 	struct nvif_outp_hda_eld_v0 {
91 		__u8  version;
92 		__u8  head;
93 		__u8  pad02[6];
94 		__u8  data[];
95 	} v0;
96 };
97 
98 union nvif_outp_dp_aux_pwr_args {
99 	struct nvif_outp_dp_aux_pwr_v0 {
100 		__u8 version;
101 		__u8 state;
102 		__u8 pad02[6];
103 	} v0;
104 };
105 
106 union nvif_outp_dp_retrain_args {
107 	struct nvif_outp_dp_retrain_vn {
108 	} vn;
109 };
110 
111 union nvif_outp_dp_mst_vcpi_args {
112 	struct nvif_outp_dp_mst_vcpi_v0 {
113 		__u8  version;
114 		__u8  head;
115 		__u8  start_slot;
116 		__u8  num_slots;
117 		__u16 pbn;
118 		__u16 aligned_pbn;
119 	} v0;
120 };
121 #endif
122