1 /*
2  * Copyright (c) 1993-2017, NVIDIA CORPORATION. All rights reserved.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20  * DEALINGS IN THE SOFTWARE.
21  */
22 
23 
24 #ifndef _clC37b_h_
25 #define _clC37b_h_
26 
27 // dma opcode instructions
28 #define NVC37B_DMA
29 #define NVC37B_DMA_OPCODE                                                        31:29
30 #define NVC37B_DMA_OPCODE_METHOD                                            0x00000000
31 #define NVC37B_DMA_OPCODE_JUMP                                              0x00000001
32 #define NVC37B_DMA_OPCODE_NONINC_METHOD                                     0x00000002
33 #define NVC37B_DMA_OPCODE_SET_SUBDEVICE_MASK                                0x00000003
34 #define NVC37B_DMA_METHOD_COUNT                                                  27:18
35 #define NVC37B_DMA_METHOD_OFFSET                                                  13:2
36 #define NVC37B_DMA_DATA                                                           31:0
37 #define NVC37B_DMA_DATA_NOP                                                 0x00000000
38 #define NVC37B_DMA_JUMP_OFFSET                                                    11:2
39 #define NVC37B_DMA_SET_SUBDEVICE_MASK_VALUE                                       11:0
40 
41 // class methods
42 #define NVC37B_UPDATE                                                           (0x00000200)
43 #define NVC37B_UPDATE_INTERLOCK_WITH_WINDOW                                     1:1
44 #define NVC37B_UPDATE_INTERLOCK_WITH_WINDOW_DISABLE                             (0x00000000)
45 #define NVC37B_UPDATE_INTERLOCK_WITH_WINDOW_ENABLE                              (0x00000001)
46 #define NVC37B_SET_POINT_OUT(b)                                                 (0x00000208 + (b)*0x00000004)
47 #define NVC37B_SET_POINT_OUT_X                                                  15:0
48 #define NVC37B_SET_POINT_OUT_Y                                                  31:16
49 #endif // _clC37b_h
50