1 /* 2 * Copyright (c) 1993-2014, NVIDIA CORPORATION. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 20 * DEALINGS IN THE SOFTWARE. 21 */ 22 23 24 #ifndef _cl507d_h_ 25 #define _cl507d_h_ 26 27 #define NV_DISP_CORE_NOTIFIER_1 0x00000000 28 #define NV_DISP_CORE_NOTIFIER_1_SIZEOF 0x00000054 29 #define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0 0x00000000 30 #define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0_DONE 0:0 31 #define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0_DONE_FALSE 0x00000000 32 #define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0_DONE_TRUE 0x00000001 33 #define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0_R0 15:1 34 #define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0_TIMESTAMP 29:16 35 #define NV_DISP_CORE_NOTIFIER_1_CAPABILITIES_1 0x00000001 36 #define NV_DISP_CORE_NOTIFIER_1_CAPABILITIES_1_DONE 0:0 37 #define NV_DISP_CORE_NOTIFIER_1_CAPABILITIES_1_DONE_FALSE 0x00000000 38 #define NV_DISP_CORE_NOTIFIER_1_CAPABILITIES_1_DONE_TRUE 0x00000001 39 40 // class methods 41 #define NV507D_UPDATE (0x00000080) 42 #define NV507D_UPDATE_INTERLOCK_WITH_CURSOR0 0:0 43 #define NV507D_UPDATE_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) 44 #define NV507D_UPDATE_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) 45 #define NV507D_UPDATE_INTERLOCK_WITH_CURSOR1 8:8 46 #define NV507D_UPDATE_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) 47 #define NV507D_UPDATE_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) 48 #define NV507D_UPDATE_INTERLOCK_WITH_BASE0 1:1 49 #define NV507D_UPDATE_INTERLOCK_WITH_BASE0_DISABLE (0x00000000) 50 #define NV507D_UPDATE_INTERLOCK_WITH_BASE0_ENABLE (0x00000001) 51 #define NV507D_UPDATE_INTERLOCK_WITH_BASE1 9:9 52 #define NV507D_UPDATE_INTERLOCK_WITH_BASE1_DISABLE (0x00000000) 53 #define NV507D_UPDATE_INTERLOCK_WITH_BASE1_ENABLE (0x00000001) 54 #define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY0 2:2 55 #define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY0_DISABLE (0x00000000) 56 #define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY0_ENABLE (0x00000001) 57 #define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY1 10:10 58 #define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY1_DISABLE (0x00000000) 59 #define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY1_ENABLE (0x00000001) 60 #define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM0 3:3 61 #define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM0_DISABLE (0x00000000) 62 #define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM0_ENABLE (0x00000001) 63 #define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM1 11:11 64 #define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM1_DISABLE (0x00000000) 65 #define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM1_ENABLE (0x00000001) 66 #define NV507D_UPDATE_NOT_DRIVER_FRIENDLY 31:31 67 #define NV507D_UPDATE_NOT_DRIVER_FRIENDLY_FALSE (0x00000000) 68 #define NV507D_UPDATE_NOT_DRIVER_FRIENDLY_TRUE (0x00000001) 69 #define NV507D_UPDATE_NOT_DRIVER_UNFRIENDLY 30:30 70 #define NV507D_UPDATE_NOT_DRIVER_UNFRIENDLY_FALSE (0x00000000) 71 #define NV507D_UPDATE_NOT_DRIVER_UNFRIENDLY_TRUE (0x00000001) 72 #define NV507D_UPDATE_INHIBIT_INTERRUPTS 29:29 73 #define NV507D_UPDATE_INHIBIT_INTERRUPTS_FALSE (0x00000000) 74 #define NV507D_UPDATE_INHIBIT_INTERRUPTS_TRUE (0x00000001) 75 #define NV507D_SET_NOTIFIER_CONTROL (0x00000084) 76 #define NV507D_SET_NOTIFIER_CONTROL_MODE 30:30 77 #define NV507D_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) 78 #define NV507D_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) 79 #define NV507D_SET_NOTIFIER_CONTROL_OFFSET 11:2 80 #define NV507D_SET_NOTIFIER_CONTROL_NOTIFY 31:31 81 #define NV507D_SET_NOTIFIER_CONTROL_NOTIFY_DISABLE (0x00000000) 82 #define NV507D_SET_NOTIFIER_CONTROL_NOTIFY_ENABLE (0x00000001) 83 #define NV507D_SET_CONTEXT_DMA_NOTIFIER (0x00000088) 84 #define NV507D_SET_CONTEXT_DMA_NOTIFIER_HANDLE 31:0 85 #define NV507D_GET_CAPABILITIES (0x0000008C) 86 #define NV507D_GET_CAPABILITIES_DUMMY 31:0 87 88 #define NV507D_DAC_SET_CONTROL(a) (0x00000400 + (a)*0x00000080) 89 #define NV507D_DAC_SET_CONTROL_OWNER 3:0 90 #define NV507D_DAC_SET_CONTROL_OWNER_NONE (0x00000000) 91 #define NV507D_DAC_SET_CONTROL_OWNER_HEAD0 (0x00000001) 92 #define NV507D_DAC_SET_CONTROL_OWNER_HEAD1 (0x00000002) 93 #define NV507D_DAC_SET_CONTROL_SUB_OWNER 5:4 94 #define NV507D_DAC_SET_CONTROL_SUB_OWNER_NONE (0x00000000) 95 #define NV507D_DAC_SET_CONTROL_SUB_OWNER_SUBHEAD0 (0x00000001) 96 #define NV507D_DAC_SET_CONTROL_SUB_OWNER_SUBHEAD1 (0x00000002) 97 #define NV507D_DAC_SET_CONTROL_SUB_OWNER_BOTH (0x00000003) 98 #define NV507D_DAC_SET_CONTROL_PROTOCOL 13:8 99 #define NV507D_DAC_SET_CONTROL_PROTOCOL_RGB_CRT (0x00000000) 100 #define NV507D_DAC_SET_CONTROL_PROTOCOL_CPST_NTSC_M (0x00000001) 101 #define NV507D_DAC_SET_CONTROL_PROTOCOL_CPST_NTSC_J (0x00000002) 102 #define NV507D_DAC_SET_CONTROL_PROTOCOL_CPST_PAL_BDGHI (0x00000003) 103 #define NV507D_DAC_SET_CONTROL_PROTOCOL_CPST_PAL_M (0x00000004) 104 #define NV507D_DAC_SET_CONTROL_PROTOCOL_CPST_PAL_N (0x00000005) 105 #define NV507D_DAC_SET_CONTROL_PROTOCOL_CPST_PAL_CN (0x00000006) 106 #define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_NTSC_M (0x00000007) 107 #define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_NTSC_J (0x00000008) 108 #define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_PAL_BDGHI (0x00000009) 109 #define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_PAL_M (0x0000000A) 110 #define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_PAL_N (0x0000000B) 111 #define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_PAL_CN (0x0000000C) 112 #define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_480P_60 (0x0000000D) 113 #define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_576P_50 (0x0000000E) 114 #define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_720P_50 (0x0000000F) 115 #define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_720P_60 (0x00000010) 116 #define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_1080I_50 (0x00000011) 117 #define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_1080I_60 (0x00000012) 118 #define NV507D_DAC_SET_CONTROL_PROTOCOL_CUSTOM (0x0000003F) 119 #define NV507D_DAC_SET_CONTROL_INVALIDATE_FIRST_FIELD 14:14 120 #define NV507D_DAC_SET_CONTROL_INVALIDATE_FIRST_FIELD_FALSE (0x00000000) 121 #define NV507D_DAC_SET_CONTROL_INVALIDATE_FIRST_FIELD_TRUE (0x00000001) 122 #define NV507D_DAC_SET_POLARITY(a) (0x00000404 + (a)*0x00000080) 123 #define NV507D_DAC_SET_POLARITY_HSYNC 0:0 124 #define NV507D_DAC_SET_POLARITY_HSYNC_POSITIVE_TRUE (0x00000000) 125 #define NV507D_DAC_SET_POLARITY_HSYNC_NEGATIVE_TRUE (0x00000001) 126 #define NV507D_DAC_SET_POLARITY_VSYNC 1:1 127 #define NV507D_DAC_SET_POLARITY_VSYNC_POSITIVE_TRUE (0x00000000) 128 #define NV507D_DAC_SET_POLARITY_VSYNC_NEGATIVE_TRUE (0x00000001) 129 #define NV507D_DAC_SET_POLARITY_RESERVED 31:2 130 131 #define NV507D_SOR_SET_CONTROL(a) (0x00000600 + (a)*0x00000040) 132 #define NV507D_SOR_SET_CONTROL_OWNER 3:0 133 #define NV507D_SOR_SET_CONTROL_OWNER_NONE (0x00000000) 134 #define NV507D_SOR_SET_CONTROL_OWNER_HEAD0 (0x00000001) 135 #define NV507D_SOR_SET_CONTROL_OWNER_HEAD1 (0x00000002) 136 #define NV507D_SOR_SET_CONTROL_SUB_OWNER 5:4 137 #define NV507D_SOR_SET_CONTROL_SUB_OWNER_NONE (0x00000000) 138 #define NV507D_SOR_SET_CONTROL_SUB_OWNER_SUBHEAD0 (0x00000001) 139 #define NV507D_SOR_SET_CONTROL_SUB_OWNER_SUBHEAD1 (0x00000002) 140 #define NV507D_SOR_SET_CONTROL_SUB_OWNER_BOTH (0x00000003) 141 #define NV507D_SOR_SET_CONTROL_PROTOCOL 11:8 142 #define NV507D_SOR_SET_CONTROL_PROTOCOL_LVDS_CUSTOM (0x00000000) 143 #define NV507D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_A (0x00000001) 144 #define NV507D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_B (0x00000002) 145 #define NV507D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_AB (0x00000003) 146 #define NV507D_SOR_SET_CONTROL_PROTOCOL_DUAL_SINGLE_TMDS (0x00000004) 147 #define NV507D_SOR_SET_CONTROL_PROTOCOL_DUAL_TMDS (0x00000005) 148 #define NV507D_SOR_SET_CONTROL_PROTOCOL_DDI_OUT (0x00000007) 149 #define NV507D_SOR_SET_CONTROL_PROTOCOL_CUSTOM (0x0000000F) 150 #define NV507D_SOR_SET_CONTROL_HSYNC_POLARITY 12:12 151 #define NV507D_SOR_SET_CONTROL_HSYNC_POLARITY_POSITIVE_TRUE (0x00000000) 152 #define NV507D_SOR_SET_CONTROL_HSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) 153 #define NV507D_SOR_SET_CONTROL_VSYNC_POLARITY 13:13 154 #define NV507D_SOR_SET_CONTROL_VSYNC_POLARITY_POSITIVE_TRUE (0x00000000) 155 #define NV507D_SOR_SET_CONTROL_VSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) 156 #define NV507D_SOR_SET_CONTROL_DE_SYNC_POLARITY 14:14 157 #define NV507D_SOR_SET_CONTROL_DE_SYNC_POLARITY_POSITIVE_TRUE (0x00000000) 158 #define NV507D_SOR_SET_CONTROL_DE_SYNC_POLARITY_NEGATIVE_TRUE (0x00000001) 159 160 #define NV507D_PIOR_SET_CONTROL(a) (0x00000700 + (a)*0x00000040) 161 #define NV507D_PIOR_SET_CONTROL_OWNER 3:0 162 #define NV507D_PIOR_SET_CONTROL_OWNER_NONE (0x00000000) 163 #define NV507D_PIOR_SET_CONTROL_OWNER_HEAD0 (0x00000001) 164 #define NV507D_PIOR_SET_CONTROL_OWNER_HEAD1 (0x00000002) 165 #define NV507D_PIOR_SET_CONTROL_SUB_OWNER 5:4 166 #define NV507D_PIOR_SET_CONTROL_SUB_OWNER_NONE (0x00000000) 167 #define NV507D_PIOR_SET_CONTROL_SUB_OWNER_SUBHEAD0 (0x00000001) 168 #define NV507D_PIOR_SET_CONTROL_SUB_OWNER_SUBHEAD1 (0x00000002) 169 #define NV507D_PIOR_SET_CONTROL_SUB_OWNER_BOTH (0x00000003) 170 #define NV507D_PIOR_SET_CONTROL_PROTOCOL 11:8 171 #define NV507D_PIOR_SET_CONTROL_PROTOCOL_EXT_TMDS_ENC (0x00000000) 172 #define NV507D_PIOR_SET_CONTROL_PROTOCOL_EXT_TV_ENC (0x00000001) 173 #define NV507D_PIOR_SET_CONTROL_HSYNC_POLARITY 12:12 174 #define NV507D_PIOR_SET_CONTROL_HSYNC_POLARITY_POSITIVE_TRUE (0x00000000) 175 #define NV507D_PIOR_SET_CONTROL_HSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) 176 #define NV507D_PIOR_SET_CONTROL_VSYNC_POLARITY 13:13 177 #define NV507D_PIOR_SET_CONTROL_VSYNC_POLARITY_POSITIVE_TRUE (0x00000000) 178 #define NV507D_PIOR_SET_CONTROL_VSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) 179 #define NV507D_PIOR_SET_CONTROL_DE_SYNC_POLARITY 14:14 180 #define NV507D_PIOR_SET_CONTROL_DE_SYNC_POLARITY_POSITIVE_TRUE (0x00000000) 181 #define NV507D_PIOR_SET_CONTROL_DE_SYNC_POLARITY_NEGATIVE_TRUE (0x00000001) 182 183 #define NV507D_HEAD_SET_PIXEL_CLOCK(a) (0x00000804 + (a)*0x00000400) 184 #define NV507D_HEAD_SET_PIXEL_CLOCK_FREQUENCY 21:0 185 #define NV507D_HEAD_SET_PIXEL_CLOCK_MODE 23:22 186 #define NV507D_HEAD_SET_PIXEL_CLOCK_MODE_CLK_25 (0x00000000) 187 #define NV507D_HEAD_SET_PIXEL_CLOCK_MODE_CLK_28 (0x00000001) 188 #define NV507D_HEAD_SET_PIXEL_CLOCK_MODE_CLK_CUSTOM (0x00000002) 189 #define NV507D_HEAD_SET_PIXEL_CLOCK_ADJ1000DIV1001 24:24 190 #define NV507D_HEAD_SET_PIXEL_CLOCK_ADJ1000DIV1001_FALSE (0x00000000) 191 #define NV507D_HEAD_SET_PIXEL_CLOCK_ADJ1000DIV1001_TRUE (0x00000001) 192 #define NV507D_HEAD_SET_PIXEL_CLOCK_NOT_DRIVER 25:25 193 #define NV507D_HEAD_SET_PIXEL_CLOCK_NOT_DRIVER_FALSE (0x00000000) 194 #define NV507D_HEAD_SET_PIXEL_CLOCK_NOT_DRIVER_TRUE (0x00000001) 195 #define NV507D_HEAD_SET_CONTROL(a) (0x00000808 + (a)*0x00000400) 196 #define NV507D_HEAD_SET_CONTROL_STRUCTURE 2:1 197 #define NV507D_HEAD_SET_CONTROL_STRUCTURE_PROGRESSIVE (0x00000000) 198 #define NV507D_HEAD_SET_CONTROL_STRUCTURE_INTERLACED (0x00000001) 199 #define NV507D_HEAD_SET_OVERSCAN_COLOR(a) (0x00000810 + (a)*0x00000400) 200 #define NV507D_HEAD_SET_OVERSCAN_COLOR_RED 9:0 201 #define NV507D_HEAD_SET_OVERSCAN_COLOR_GRN 19:10 202 #define NV507D_HEAD_SET_OVERSCAN_COLOR_BLU 29:20 203 #define NV507D_HEAD_SET_RASTER_SIZE(a) (0x00000814 + (a)*0x00000400) 204 #define NV507D_HEAD_SET_RASTER_SIZE_WIDTH 14:0 205 #define NV507D_HEAD_SET_RASTER_SIZE_HEIGHT 30:16 206 #define NV507D_HEAD_SET_RASTER_SYNC_END(a) (0x00000818 + (a)*0x00000400) 207 #define NV507D_HEAD_SET_RASTER_SYNC_END_X 14:0 208 #define NV507D_HEAD_SET_RASTER_SYNC_END_Y 30:16 209 #define NV507D_HEAD_SET_RASTER_BLANK_END(a) (0x0000081C + (a)*0x00000400) 210 #define NV507D_HEAD_SET_RASTER_BLANK_END_X 14:0 211 #define NV507D_HEAD_SET_RASTER_BLANK_END_Y 30:16 212 #define NV507D_HEAD_SET_RASTER_BLANK_START(a) (0x00000820 + (a)*0x00000400) 213 #define NV507D_HEAD_SET_RASTER_BLANK_START_X 14:0 214 #define NV507D_HEAD_SET_RASTER_BLANK_START_Y 30:16 215 #define NV507D_HEAD_SET_RASTER_VERT_BLANK2(a) (0x00000824 + (a)*0x00000400) 216 #define NV507D_HEAD_SET_RASTER_VERT_BLANK2_YSTART 14:0 217 #define NV507D_HEAD_SET_RASTER_VERT_BLANK2_YEND 30:16 218 #define NV507D_HEAD_SET_RASTER_VERT_BLANK_DMI(a) (0x00000828 + (a)*0x00000400) 219 #define NV507D_HEAD_SET_RASTER_VERT_BLANK_DMI_DURATION 11:0 220 #define NV507D_HEAD_SET_DEFAULT_BASE_COLOR(a) (0x0000082C + (a)*0x00000400) 221 #define NV507D_HEAD_SET_DEFAULT_BASE_COLOR_RED 9:0 222 #define NV507D_HEAD_SET_DEFAULT_BASE_COLOR_GREEN 19:10 223 #define NV507D_HEAD_SET_DEFAULT_BASE_COLOR_BLUE 29:20 224 #define NV507D_HEAD_SET_BASE_LUT_LO(a) (0x00000840 + (a)*0x00000400) 225 #define NV507D_HEAD_SET_BASE_LUT_LO_ENABLE 31:31 226 #define NV507D_HEAD_SET_BASE_LUT_LO_ENABLE_DISABLE (0x00000000) 227 #define NV507D_HEAD_SET_BASE_LUT_LO_ENABLE_ENABLE (0x00000001) 228 #define NV507D_HEAD_SET_BASE_LUT_LO_MODE 30:30 229 #define NV507D_HEAD_SET_BASE_LUT_LO_MODE_LORES (0x00000000) 230 #define NV507D_HEAD_SET_BASE_LUT_LO_MODE_HIRES (0x00000001) 231 #define NV507D_HEAD_SET_BASE_LUT_LO_ORIGIN 7:2 232 #define NV507D_HEAD_SET_BASE_LUT_HI(a) (0x00000844 + (a)*0x00000400) 233 #define NV507D_HEAD_SET_BASE_LUT_HI_ORIGIN 31:0 234 #define NV507D_HEAD_SET_OFFSET(a,b) (0x00000860 + (a)*0x00000400 + (b)*0x00000004) 235 #define NV507D_HEAD_SET_OFFSET_ORIGIN 31:0 236 #define NV507D_HEAD_SET_SIZE(a) (0x00000868 + (a)*0x00000400) 237 #define NV507D_HEAD_SET_SIZE_WIDTH 14:0 238 #define NV507D_HEAD_SET_SIZE_HEIGHT 30:16 239 #define NV507D_HEAD_SET_STORAGE(a) (0x0000086C + (a)*0x00000400) 240 #define NV507D_HEAD_SET_STORAGE_BLOCK_HEIGHT 3:0 241 #define NV507D_HEAD_SET_STORAGE_BLOCK_HEIGHT_ONE_GOB (0x00000000) 242 #define NV507D_HEAD_SET_STORAGE_BLOCK_HEIGHT_TWO_GOBS (0x00000001) 243 #define NV507D_HEAD_SET_STORAGE_BLOCK_HEIGHT_FOUR_GOBS (0x00000002) 244 #define NV507D_HEAD_SET_STORAGE_BLOCK_HEIGHT_EIGHT_GOBS (0x00000003) 245 #define NV507D_HEAD_SET_STORAGE_BLOCK_HEIGHT_SIXTEEN_GOBS (0x00000004) 246 #define NV507D_HEAD_SET_STORAGE_BLOCK_HEIGHT_THIRTYTWO_GOBS (0x00000005) 247 #define NV507D_HEAD_SET_STORAGE_PITCH 17:8 248 #define NV507D_HEAD_SET_STORAGE_MEMORY_LAYOUT 20:20 249 #define NV507D_HEAD_SET_STORAGE_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) 250 #define NV507D_HEAD_SET_STORAGE_MEMORY_LAYOUT_PITCH (0x00000001) 251 #define NV507D_HEAD_SET_PARAMS(a) (0x00000870 + (a)*0x00000400) 252 #define NV507D_HEAD_SET_PARAMS_FORMAT 15:8 253 #define NV507D_HEAD_SET_PARAMS_FORMAT_I8 (0x0000001E) 254 #define NV507D_HEAD_SET_PARAMS_FORMAT_VOID16 (0x0000001F) 255 #define NV507D_HEAD_SET_PARAMS_FORMAT_VOID32 (0x0000002E) 256 #define NV507D_HEAD_SET_PARAMS_FORMAT_RF16_GF16_BF16_AF16 (0x000000CA) 257 #define NV507D_HEAD_SET_PARAMS_FORMAT_A8R8G8B8 (0x000000CF) 258 #define NV507D_HEAD_SET_PARAMS_FORMAT_A2B10G10R10 (0x000000D1) 259 #define NV507D_HEAD_SET_PARAMS_FORMAT_A8B8G8R8 (0x000000D5) 260 #define NV507D_HEAD_SET_PARAMS_FORMAT_R5G6B5 (0x000000E8) 261 #define NV507D_HEAD_SET_PARAMS_FORMAT_A1R5G5B5 (0x000000E9) 262 #define NV507D_HEAD_SET_PARAMS_KIND 22:16 263 #define NV507D_HEAD_SET_PARAMS_KIND_KIND_PITCH (0x00000000) 264 #define NV507D_HEAD_SET_PARAMS_KIND_KIND_GENERIC_8BX2 (0x00000070) 265 #define NV507D_HEAD_SET_PARAMS_KIND_KIND_GENERIC_8BX2_BANKSWIZ (0x00000072) 266 #define NV507D_HEAD_SET_PARAMS_KIND_KIND_GENERIC_16BX1 (0x00000074) 267 #define NV507D_HEAD_SET_PARAMS_KIND_KIND_GENERIC_16BX1_BANKSWIZ (0x00000076) 268 #define NV507D_HEAD_SET_PARAMS_KIND_KIND_C32_MS4 (0x00000078) 269 #define NV507D_HEAD_SET_PARAMS_KIND_KIND_C32_MS8 (0x00000079) 270 #define NV507D_HEAD_SET_PARAMS_KIND_KIND_C32_MS4_BANKSWIZ (0x0000007A) 271 #define NV507D_HEAD_SET_PARAMS_KIND_KIND_C32_MS8_BANKSWIZ (0x0000007B) 272 #define NV507D_HEAD_SET_PARAMS_KIND_KIND_C64_MS4 (0x0000007C) 273 #define NV507D_HEAD_SET_PARAMS_KIND_KIND_C64_MS8 (0x0000007D) 274 #define NV507D_HEAD_SET_PARAMS_KIND_KIND_C128_MS4 (0x0000007E) 275 #define NV507D_HEAD_SET_PARAMS_KIND_FROM_PTE (0x0000007F) 276 #define NV507D_HEAD_SET_PARAMS_PART_STRIDE 24:24 277 #define NV507D_HEAD_SET_PARAMS_PART_STRIDE_PARTSTRIDE_256 (0x00000000) 278 #define NV507D_HEAD_SET_PARAMS_PART_STRIDE_PARTSTRIDE_1024 (0x00000001) 279 #define NV507D_HEAD_SET_CONTEXT_DMA_ISO(a) (0x00000874 + (a)*0x00000400) 280 #define NV507D_HEAD_SET_CONTEXT_DMA_ISO_HANDLE 31:0 281 #define NV507D_HEAD_SET_CONTROL_CURSOR(a) (0x00000880 + (a)*0x00000400) 282 #define NV507D_HEAD_SET_CONTROL_CURSOR_ENABLE 31:31 283 #define NV507D_HEAD_SET_CONTROL_CURSOR_ENABLE_DISABLE (0x00000000) 284 #define NV507D_HEAD_SET_CONTROL_CURSOR_ENABLE_ENABLE (0x00000001) 285 #define NV507D_HEAD_SET_CONTROL_CURSOR_FORMAT 25:24 286 #define NV507D_HEAD_SET_CONTROL_CURSOR_FORMAT_A1R5G5B5 (0x00000000) 287 #define NV507D_HEAD_SET_CONTROL_CURSOR_FORMAT_A8R8G8B8 (0x00000001) 288 #define NV507D_HEAD_SET_CONTROL_CURSOR_SIZE 26:26 289 #define NV507D_HEAD_SET_CONTROL_CURSOR_SIZE_W32_H32 (0x00000000) 290 #define NV507D_HEAD_SET_CONTROL_CURSOR_SIZE_W64_H64 (0x00000001) 291 #define NV507D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_X 13:8 292 #define NV507D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_Y 21:16 293 #define NV507D_HEAD_SET_CONTROL_CURSOR_COMPOSITION 29:28 294 #define NV507D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_ALPHA_BLEND (0x00000000) 295 #define NV507D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_PREMULT_ALPHA_BLEND (0x00000001) 296 #define NV507D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_XOR (0x00000002) 297 #define NV507D_HEAD_SET_CONTROL_CURSOR_SUB_OWNER 5:4 298 #define NV507D_HEAD_SET_CONTROL_CURSOR_SUB_OWNER_NONE (0x00000000) 299 #define NV507D_HEAD_SET_CONTROL_CURSOR_SUB_OWNER_SUBHEAD0 (0x00000001) 300 #define NV507D_HEAD_SET_CONTROL_CURSOR_SUB_OWNER_SUBHEAD1 (0x00000002) 301 #define NV507D_HEAD_SET_CONTROL_CURSOR_SUB_OWNER_BOTH (0x00000003) 302 #define NV507D_HEAD_SET_OFFSET_CURSOR(a) (0x00000884 + (a)*0x00000400) 303 #define NV507D_HEAD_SET_OFFSET_CURSOR_ORIGIN 31:0 304 #define NV507D_HEAD_SET_DITHER_CONTROL(a) (0x000008A0 + (a)*0x00000400) 305 #define NV507D_HEAD_SET_DITHER_CONTROL_ENABLE 0:0 306 #define NV507D_HEAD_SET_DITHER_CONTROL_ENABLE_DISABLE (0x00000000) 307 #define NV507D_HEAD_SET_DITHER_CONTROL_ENABLE_ENABLE (0x00000001) 308 #define NV507D_HEAD_SET_DITHER_CONTROL_BITS 2:1 309 #define NV507D_HEAD_SET_DITHER_CONTROL_BITS_DITHER_TO_6_BITS (0x00000000) 310 #define NV507D_HEAD_SET_DITHER_CONTROL_BITS_DITHER_TO_8_BITS (0x00000001) 311 #define NV507D_HEAD_SET_DITHER_CONTROL_MODE 6:3 312 #define NV507D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_ERR_ACC (0x00000000) 313 #define NV507D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_ERR_ACC (0x00000001) 314 #define NV507D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_2X2 (0x00000002) 315 #define NV507D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_2X2 (0x00000003) 316 #define NV507D_HEAD_SET_DITHER_CONTROL_PHASE 8:7 317 #define NV507D_HEAD_SET_CONTROL_OUTPUT_SCALER(a) (0x000008A4 + (a)*0x00000400) 318 #define NV507D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS 2:0 319 #define NV507D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_1 (0x00000000) 320 #define NV507D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) 321 #define NV507D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_3 (0x00000002) 322 #define NV507D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_3_ADAPTIVE (0x00000003) 323 #define NV507D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) 324 #define NV507D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS 4:3 325 #define NV507D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_1 (0x00000000) 326 #define NV507D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) 327 #define NV507D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_8 (0x00000002) 328 #define NV507D_HEAD_SET_CONTROL_OUTPUT_SCALER_HRESPONSE_BIAS 23:16 329 #define NV507D_HEAD_SET_CONTROL_OUTPUT_SCALER_VRESPONSE_BIAS 31:24 330 #define NV507D_HEAD_SET_PROCAMP(a) (0x000008A8 + (a)*0x00000400) 331 #define NV507D_HEAD_SET_PROCAMP_COLOR_SPACE 1:0 332 #define NV507D_HEAD_SET_PROCAMP_COLOR_SPACE_RGB (0x00000000) 333 #define NV507D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_601 (0x00000001) 334 #define NV507D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_709 (0x00000002) 335 #define NV507D_HEAD_SET_PROCAMP_CHROMA_LPF 2:2 336 #define NV507D_HEAD_SET_PROCAMP_CHROMA_LPF_AUTO (0x00000000) 337 #define NV507D_HEAD_SET_PROCAMP_CHROMA_LPF_ON (0x00000001) 338 #define NV507D_HEAD_SET_PROCAMP_SAT_COS 19:8 339 #define NV507D_HEAD_SET_PROCAMP_SAT_SINE 31:20 340 #define NV507D_HEAD_SET_PROCAMP_TRANSITION 4:3 341 #define NV507D_HEAD_SET_PROCAMP_TRANSITION_HARD (0x00000000) 342 #define NV507D_HEAD_SET_PROCAMP_TRANSITION_NTSC (0x00000001) 343 #define NV507D_HEAD_SET_PROCAMP_TRANSITION_PAL (0x00000002) 344 #define NV507D_HEAD_SET_VIEWPORT_POINT_IN(a,b) (0x000008C0 + (a)*0x00000400 + (b)*0x00000004) 345 #define NV507D_HEAD_SET_VIEWPORT_POINT_IN_X 14:0 346 #define NV507D_HEAD_SET_VIEWPORT_POINT_IN_Y 30:16 347 #define NV507D_HEAD_SET_VIEWPORT_SIZE_IN(a) (0x000008C8 + (a)*0x00000400) 348 #define NV507D_HEAD_SET_VIEWPORT_SIZE_IN_WIDTH 14:0 349 #define NV507D_HEAD_SET_VIEWPORT_SIZE_IN_HEIGHT 30:16 350 #define NV507D_HEAD_SET_VIEWPORT_SIZE_OUT(a) (0x000008D8 + (a)*0x00000400) 351 #define NV507D_HEAD_SET_VIEWPORT_SIZE_OUT_WIDTH 14:0 352 #define NV507D_HEAD_SET_VIEWPORT_SIZE_OUT_HEIGHT 30:16 353 #define NV507D_HEAD_SET_VIEWPORT_SIZE_OUT_MIN(a) (0x000008DC + (a)*0x00000400) 354 #define NV507D_HEAD_SET_VIEWPORT_SIZE_OUT_MIN_WIDTH 14:0 355 #define NV507D_HEAD_SET_VIEWPORT_SIZE_OUT_MIN_HEIGHT 30:16 356 #define NV507D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS(a) (0x00000900 + (a)*0x00000400) 357 #define NV507D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_USABLE 0:0 358 #define NV507D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_USABLE_FALSE (0x00000000) 359 #define NV507D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_USABLE_TRUE (0x00000001) 360 #define NV507D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_PIXEL_DEPTH 11:8 361 #define NV507D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_PIXEL_DEPTH_BPP_8 (0x00000000) 362 #define NV507D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_PIXEL_DEPTH_BPP_16 (0x00000001) 363 #define NV507D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_PIXEL_DEPTH_BPP_32 (0x00000003) 364 #define NV507D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_PIXEL_DEPTH_BPP_64 (0x00000005) 365 #define NV507D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_SUPER_SAMPLE 13:12 366 #define NV507D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_SUPER_SAMPLE_X1_AA (0x00000000) 367 #define NV507D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_SUPER_SAMPLE_X4_AA (0x00000002) 368 #define NV507D_HEAD_SET_OVERLAY_USAGE_BOUNDS(a) (0x00000904 + (a)*0x00000400) 369 #define NV507D_HEAD_SET_OVERLAY_USAGE_BOUNDS_USABLE 0:0 370 #define NV507D_HEAD_SET_OVERLAY_USAGE_BOUNDS_USABLE_FALSE (0x00000000) 371 #define NV507D_HEAD_SET_OVERLAY_USAGE_BOUNDS_USABLE_TRUE (0x00000001) 372 #define NV507D_HEAD_SET_OVERLAY_USAGE_BOUNDS_PIXEL_DEPTH 11:8 373 #define NV507D_HEAD_SET_OVERLAY_USAGE_BOUNDS_PIXEL_DEPTH_BPP_16 (0x00000001) 374 #define NV507D_HEAD_SET_OVERLAY_USAGE_BOUNDS_PIXEL_DEPTH_BPP_32 (0x00000003) 375 #endif // _cl507d_h 376