1 #ifndef __NVFW_SEC2_H__ 2 #define __NVFW_SEC2_H__ 3 4 struct nv_sec2_args { 5 u32 freq_hz; 6 u32 falc_trace_size; 7 u32 falc_trace_dma_base; 8 u32 falc_trace_dma_idx; 9 bool secure_mode; 10 }; 11 12 #define NV_SEC2_UNIT_INIT 0x01 13 #define NV_SEC2_UNIT_UNLOAD 0x06 14 #define NV_SEC2_UNIT_ACR 0x08 15 16 struct nv_sec2_init_msg { 17 struct nvfw_falcon_msg hdr; 18 #define NV_SEC2_INIT_MSG_INIT 0x00 19 u8 msg_type; 20 21 u8 num_queues; 22 u16 os_debug_entry_point; 23 24 struct { 25 u32 offset; 26 u16 size; 27 u8 index; 28 #define NV_SEC2_INIT_MSG_QUEUE_ID_CMDQ 0x00 29 #define NV_SEC2_INIT_MSG_QUEUE_ID_MSGQ 0x01 30 u8 id; 31 } queue_info[2]; 32 33 u32 sw_managed_area_offset; 34 u16 sw_managed_area_size; 35 }; 36 37 struct nv_sec2_acr_cmd { 38 struct nvfw_falcon_cmd hdr; 39 #define NV_SEC2_ACR_CMD_BOOTSTRAP_FALCON 0x00 40 u8 cmd_type; 41 }; 42 43 struct nv_sec2_acr_msg { 44 struct nvfw_falcon_cmd hdr; 45 u8 msg_type; 46 }; 47 48 struct nv_sec2_acr_bootstrap_falcon_cmd { 49 struct nv_sec2_acr_cmd cmd; 50 #define NV_SEC2_ACR_BOOTSTRAP_FALCON_FLAGS_RESET_YES 0x00000000 51 #define NV_SEC2_ACR_BOOTSTRAP_FALCON_FLAGS_RESET_NO 0x00000001 52 u32 flags; 53 u32 falcon_id; 54 }; 55 56 struct nv_sec2_acr_bootstrap_falcon_msg { 57 struct nv_sec2_acr_msg msg; 58 u32 error_code; 59 u32 falcon_id; 60 }; 61 62 #define NV_SEC2_UNIT_V2_INIT 0x01 63 #define NV_SEC2_UNIT_V2_UNLOAD 0x05 64 #define NV_SEC2_UNIT_V2_ACR 0x07 65 #endif 66