1 /* 2 * Copyright 2018 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 #include "base.h" 23 24 #include <nvif/if0014.h> 25 #include <nvif/push507c.h> 26 #include <nvif/timer.h> 27 28 #include <nvhw/class/cl507c.h> 29 30 #include <drm/drm_atomic_helper.h> 31 #include <drm/drm_fourcc.h> 32 #include <drm/drm_plane_helper.h> 33 34 #include "nouveau_bo.h" 35 36 int 37 base507c_update(struct nv50_wndw *wndw, u32 *interlock) 38 { 39 struct nvif_push *push = wndw->wndw.push; 40 int ret; 41 42 if ((ret = PUSH_WAIT(push, 2))) 43 return ret; 44 45 PUSH_MTHD(push, NV507C, UPDATE, interlock[NV50_DISP_INTERLOCK_CORE]); 46 return PUSH_KICK(push); 47 } 48 49 int 50 base507c_image_clr(struct nv50_wndw *wndw) 51 { 52 struct nvif_push *push = wndw->wndw.push; 53 int ret; 54 55 if ((ret = PUSH_WAIT(push, 4))) 56 return ret; 57 58 PUSH_MTHD(push, NV507C, SET_PRESENT_CONTROL, 59 NVDEF(NV507C, SET_PRESENT_CONTROL, BEGIN_MODE, NON_TEARING) | 60 NVVAL(NV507C, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, 0)); 61 62 PUSH_MTHD(push, NV507C, SET_CONTEXT_DMA_ISO, 0x00000000); 63 return 0; 64 } 65 66 static int 67 base507c_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) 68 { 69 struct nvif_push *push = wndw->wndw.push; 70 int ret; 71 72 if ((ret = PUSH_WAIT(push, 13))) 73 return ret; 74 75 PUSH_MTHD(push, NV507C, SET_PRESENT_CONTROL, 76 NVVAL(NV507C, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) | 77 NVVAL(NV507C, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval)); 78 79 PUSH_MTHD(push, NV507C, SET_CONTEXT_DMA_ISO, asyw->image.handle[0]); 80 81 if (asyw->image.format == NV507C_SURFACE_SET_PARAMS_FORMAT_RF16_GF16_BF16_AF16) { 82 PUSH_MTHD(push, NV507C, SET_PROCESSING, 83 NVDEF(NV507C, SET_PROCESSING, USE_GAIN_OFS, ENABLE), 84 85 SET_CONVERSION, 86 NVVAL(NV507C, SET_CONVERSION, GAIN, 0) | 87 NVVAL(NV507C, SET_CONVERSION, OFS, 0x64)); 88 } else { 89 PUSH_MTHD(push, NV507C, SET_PROCESSING, 90 NVDEF(NV507C, SET_PROCESSING, USE_GAIN_OFS, DISABLE), 91 92 SET_CONVERSION, 93 NVVAL(NV507C, SET_CONVERSION, GAIN, 0) | 94 NVVAL(NV507C, SET_CONVERSION, OFS, 0)); 95 } 96 97 PUSH_MTHD(push, NV507C, SURFACE_SET_OFFSET(0, 0), asyw->image.offset[0] >> 8); 98 99 PUSH_MTHD(push, NV507C, SURFACE_SET_SIZE(0), 100 NVVAL(NV507C, SURFACE_SET_SIZE, WIDTH, asyw->image.w) | 101 NVVAL(NV507C, SURFACE_SET_SIZE, HEIGHT, asyw->image.h), 102 103 SURFACE_SET_STORAGE(0), 104 NVVAL(NV507C, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout) | 105 NVVAL(NV507C, SURFACE_SET_STORAGE, PITCH, asyw->image.pitch[0] >> 8) | 106 NVVAL(NV507C, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) | 107 NVVAL(NV507C, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh), 108 109 SURFACE_SET_PARAMS(0), 110 NVVAL(NV507C, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) | 111 NVDEF(NV507C, SURFACE_SET_PARAMS, SUPER_SAMPLE, X1_AA) | 112 NVDEF(NV507C, SURFACE_SET_PARAMS, GAMMA, LINEAR) | 113 NVDEF(NV507C, SURFACE_SET_PARAMS, LAYOUT, FRM) | 114 NVVAL(NV507C, SURFACE_SET_PARAMS, KIND, asyw->image.kind) | 115 NVDEF(NV507C, SURFACE_SET_PARAMS, PART_STRIDE, PARTSTRIDE_256)); 116 return 0; 117 } 118 119 int 120 base507c_xlut_clr(struct nv50_wndw *wndw) 121 { 122 struct nvif_push *push = wndw->wndw.push; 123 int ret; 124 125 if ((ret = PUSH_WAIT(push, 2))) 126 return ret; 127 128 PUSH_MTHD(push, NV507C, SET_BASE_LUT_LO, 129 NVDEF(NV507C, SET_BASE_LUT_LO, ENABLE, DISABLE)); 130 return 0; 131 } 132 133 int 134 base507c_xlut_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) 135 { 136 struct nvif_push *push = wndw->wndw.push; 137 int ret; 138 139 if ((ret = PUSH_WAIT(push, 2))) 140 return ret; 141 142 PUSH_MTHD(push, NV507C, SET_BASE_LUT_LO, 143 NVDEF(NV507C, SET_BASE_LUT_LO, ENABLE, USE_CORE_LUT)); 144 return 0; 145 } 146 147 int 148 base507c_ntfy_wait_begun(struct nouveau_bo *bo, u32 offset, 149 struct nvif_device *device) 150 { 151 s64 time = nvif_msec(device, 2000ULL, 152 if (NVBO_TD32(bo, offset, NV_DISP_BASE_NOTIFIER_1, _0, STATUS, ==, BEGUN)) 153 break; 154 usleep_range(1, 2); 155 ); 156 return time < 0 ? time : 0; 157 } 158 159 int 160 base507c_ntfy_clr(struct nv50_wndw *wndw) 161 { 162 struct nvif_push *push = wndw->wndw.push; 163 int ret; 164 165 if ((ret = PUSH_WAIT(push, 2))) 166 return ret; 167 168 PUSH_MTHD(push, NV507C, SET_CONTEXT_DMA_NOTIFIER, 0x00000000); 169 return 0; 170 } 171 172 int 173 base507c_ntfy_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) 174 { 175 struct nvif_push *push = wndw->wndw.push; 176 int ret; 177 178 if ((ret = PUSH_WAIT(push, 3))) 179 return ret; 180 181 PUSH_MTHD(push, NV507C, SET_NOTIFIER_CONTROL, 182 NVVAL(NV507C, SET_NOTIFIER_CONTROL, MODE, asyw->ntfy.awaken) | 183 NVVAL(NV507C, SET_NOTIFIER_CONTROL, OFFSET, asyw->ntfy.offset >> 2), 184 185 SET_CONTEXT_DMA_NOTIFIER, asyw->ntfy.handle); 186 return 0; 187 } 188 189 void 190 base507c_ntfy_reset(struct nouveau_bo *bo, u32 offset) 191 { 192 NVBO_WR32(bo, offset, NV_DISP_BASE_NOTIFIER_1, _0, 193 NVDEF(NV_DISP_BASE_NOTIFIER_1, _0, STATUS, NOT_BEGUN)); 194 } 195 196 int 197 base507c_sema_clr(struct nv50_wndw *wndw) 198 { 199 struct nvif_push *push = wndw->wndw.push; 200 int ret; 201 202 if ((ret = PUSH_WAIT(push, 2))) 203 return ret; 204 205 PUSH_MTHD(push, NV507C, SET_CONTEXT_DMA_SEMAPHORE, 0x00000000); 206 return 0; 207 } 208 209 int 210 base507c_sema_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) 211 { 212 struct nvif_push *push = wndw->wndw.push; 213 int ret; 214 215 if ((ret = PUSH_WAIT(push, 5))) 216 return ret; 217 218 PUSH_MTHD(push, NV507C, SET_SEMAPHORE_CONTROL, asyw->sema.offset, 219 SET_SEMAPHORE_ACQUIRE, asyw->sema.acquire, 220 SET_SEMAPHORE_RELEASE, asyw->sema.release, 221 SET_CONTEXT_DMA_SEMAPHORE, asyw->sema.handle); 222 return 0; 223 } 224 225 void 226 base507c_release(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, 227 struct nv50_head_atom *asyh) 228 { 229 asyh->base.cpp = 0; 230 } 231 232 int 233 base507c_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, 234 struct nv50_head_atom *asyh) 235 { 236 const struct drm_framebuffer *fb = asyw->state.fb; 237 int ret; 238 239 ret = drm_atomic_helper_check_plane_state(&asyw->state, &asyh->state, 240 DRM_PLANE_HELPER_NO_SCALING, 241 DRM_PLANE_HELPER_NO_SCALING, 242 false, true); 243 if (ret) 244 return ret; 245 246 if (!wndw->func->ilut) { 247 if ((asyh->base.cpp != 1) ^ (fb->format->cpp[0] != 1)) 248 asyh->state.color_mgmt_changed = true; 249 } 250 251 asyh->base.depth = fb->format->depth; 252 asyh->base.cpp = fb->format->cpp[0]; 253 asyh->base.x = asyw->state.src.x1 >> 16; 254 asyh->base.y = asyw->state.src.y1 >> 16; 255 asyh->base.w = asyw->state.fb->width; 256 asyh->base.h = asyw->state.fb->height; 257 258 /* Some newer formats, esp FP16 ones, don't have a 259 * "depth". There's nothing that really makes sense there 260 * either, so just set it to the implicit bit count. 261 */ 262 if (!asyh->base.depth) 263 asyh->base.depth = asyh->base.cpp * 8; 264 265 return 0; 266 } 267 268 const u32 269 base507c_format[] = { 270 DRM_FORMAT_C8, 271 DRM_FORMAT_RGB565, 272 DRM_FORMAT_XRGB1555, 273 DRM_FORMAT_ARGB1555, 274 DRM_FORMAT_XRGB8888, 275 DRM_FORMAT_ARGB8888, 276 DRM_FORMAT_XBGR2101010, 277 DRM_FORMAT_ABGR2101010, 278 DRM_FORMAT_XBGR8888, 279 DRM_FORMAT_ABGR8888, 280 DRM_FORMAT_XBGR16161616F, 281 DRM_FORMAT_ABGR16161616F, 282 0 283 }; 284 285 static const struct nv50_wndw_func 286 base507c = { 287 .acquire = base507c_acquire, 288 .release = base507c_release, 289 .sema_set = base507c_sema_set, 290 .sema_clr = base507c_sema_clr, 291 .ntfy_reset = base507c_ntfy_reset, 292 .ntfy_set = base507c_ntfy_set, 293 .ntfy_clr = base507c_ntfy_clr, 294 .ntfy_wait_begun = base507c_ntfy_wait_begun, 295 .olut_core = 1, 296 .xlut_set = base507c_xlut_set, 297 .xlut_clr = base507c_xlut_clr, 298 .image_set = base507c_image_set, 299 .image_clr = base507c_image_clr, 300 .update = base507c_update, 301 }; 302 303 int 304 base507c_new_(const struct nv50_wndw_func *func, const u32 *format, 305 struct nouveau_drm *drm, int head, s32 oclass, u32 interlock_data, 306 struct nv50_wndw **pwndw) 307 { 308 struct nvif_disp_chan_v0 args = { 309 .id = head, 310 }; 311 struct nouveau_display *disp = nouveau_display(drm->dev); 312 struct nv50_disp *disp50 = nv50_disp(drm->dev); 313 struct nv50_wndw *wndw; 314 int ret; 315 316 ret = nv50_wndw_new_(func, drm->dev, DRM_PLANE_TYPE_PRIMARY, 317 "base", head, format, BIT(head), 318 NV50_DISP_INTERLOCK_BASE, interlock_data, &wndw); 319 if (*pwndw = wndw, ret) 320 return ret; 321 322 ret = nv50_dmac_create(&drm->client.device, &disp->disp.object, 323 &oclass, head, &args, sizeof(args), 324 disp50->sync->offset, &wndw->wndw); 325 if (ret) { 326 NV_ERROR(drm, "base%04x allocation failed: %d\n", oclass, ret); 327 return ret; 328 } 329 330 wndw->ntfy = NV50_DISP_BASE_NTFY(wndw->id); 331 wndw->sema = NV50_DISP_BASE_SEM0(wndw->id); 332 wndw->data = 0x00000000; 333 return 0; 334 } 335 336 int 337 base507c_new(struct nouveau_drm *drm, int head, s32 oclass, 338 struct nv50_wndw **pwndw) 339 { 340 return base507c_new_(&base507c, base507c_format, drm, head, oclass, 341 0x00000002 << (head * 8), pwndw); 342 } 343