1 /*
2  * Copyright 2018 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 #include "base.h"
23 
24 #include <nvif/cl507c.h>
25 #include <nvif/event.h>
26 #include <nvif/push507c.h>
27 #include <nvif/timer.h>
28 
29 #include <nvhw/class/cl507c.h>
30 
31 #include <drm/drm_atomic_helper.h>
32 #include <drm/drm_fourcc.h>
33 #include <drm/drm_plane_helper.h>
34 
35 #include "nouveau_bo.h"
36 
37 int
38 base507c_update(struct nv50_wndw *wndw, u32 *interlock)
39 {
40 	struct nvif_push *push = wndw->wndw.push;
41 	int ret;
42 
43 	if ((ret = PUSH_WAIT(push, 2)))
44 		return ret;
45 
46 	PUSH_MTHD(push, NV507C, UPDATE, interlock[NV50_DISP_INTERLOCK_CORE]);
47 	return PUSH_KICK(push);
48 }
49 
50 int
51 base507c_image_clr(struct nv50_wndw *wndw)
52 {
53 	struct nvif_push *push = wndw->wndw.push;
54 	int ret;
55 
56 	if ((ret = PUSH_WAIT(push, 4)))
57 		return ret;
58 
59 	PUSH_MTHD(push, NV507C, SET_PRESENT_CONTROL,
60 		  NVDEF(NV507C, SET_PRESENT_CONTROL, BEGIN_MODE, NON_TEARING) |
61 		  NVVAL(NV507C, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, 0));
62 
63 	PUSH_MTHD(push, NV507C, SET_CONTEXT_DMA_ISO, 0x00000000);
64 	return 0;
65 }
66 
67 static int
68 base507c_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
69 {
70 	struct nvif_push *push = wndw->wndw.push;
71 	int ret;
72 
73 	if ((ret = PUSH_WAIT(push, 13)))
74 		return ret;
75 
76 	PUSH_MTHD(push, NV507C, SET_PRESENT_CONTROL,
77 		  NVVAL(NV507C, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) |
78 		  NVVAL(NV507C, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval));
79 
80 	PUSH_MTHD(push, NV507C, SET_CONTEXT_DMA_ISO, asyw->image.handle[0]);
81 
82 	if (asyw->image.format == NV507C_SURFACE_SET_PARAMS_FORMAT_RF16_GF16_BF16_AF16) {
83 		PUSH_MTHD(push, NV507C, SET_PROCESSING,
84 			  NVDEF(NV507C, SET_PROCESSING, USE_GAIN_OFS, ENABLE),
85 
86 					SET_CONVERSION,
87 			  NVVAL(NV507C, SET_CONVERSION, GAIN, 0) |
88 			  NVVAL(NV507C, SET_CONVERSION, OFS, 0x64));
89 	} else {
90 		PUSH_MTHD(push, NV507C, SET_PROCESSING,
91 			  NVDEF(NV507C, SET_PROCESSING, USE_GAIN_OFS, DISABLE));
92 	}
93 
94 	PUSH_MTHD(push, NV507C, SURFACE_SET_OFFSET(0, 0), asyw->image.offset[0] >> 8);
95 
96 	PUSH_MTHD(push, NV507C, SURFACE_SET_SIZE(0),
97 		  NVVAL(NV507C, SURFACE_SET_SIZE, WIDTH, asyw->image.w) |
98 		  NVVAL(NV507C, SURFACE_SET_SIZE, HEIGHT, asyw->image.h),
99 
100 				SURFACE_SET_STORAGE(0),
101 		  NVVAL(NV507C, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout) |
102 		  NVVAL(NV507C, SURFACE_SET_STORAGE, PITCH, asyw->image.pitch[0] >> 8) |
103 		  NVVAL(NV507C, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) |
104 		  NVVAL(NV507C, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh),
105 
106 				SURFACE_SET_PARAMS(0),
107 		  NVVAL(NV507C, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) |
108 		  NVDEF(NV507C, SURFACE_SET_PARAMS, SUPER_SAMPLE, X1_AA) |
109 		  NVDEF(NV507C, SURFACE_SET_PARAMS, GAMMA, LINEAR) |
110 		  NVDEF(NV507C, SURFACE_SET_PARAMS, LAYOUT, FRM) |
111 		  NVVAL(NV507C, SURFACE_SET_PARAMS, KIND, asyw->image.kind) |
112 		  NVDEF(NV507C, SURFACE_SET_PARAMS, PART_STRIDE, PARTSTRIDE_256));
113 	return 0;
114 }
115 
116 int
117 base507c_xlut_clr(struct nv50_wndw *wndw)
118 {
119 	struct nvif_push *push = wndw->wndw.push;
120 	int ret;
121 
122 	if ((ret = PUSH_WAIT(push, 2)))
123 		return ret;
124 
125 	PUSH_MTHD(push, NV507C, SET_BASE_LUT_LO,
126 		  NVDEF(NV507C, SET_BASE_LUT_LO, ENABLE, DISABLE));
127 	return 0;
128 }
129 
130 int
131 base507c_xlut_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
132 {
133 	struct nvif_push *push = wndw->wndw.push;
134 	int ret;
135 
136 	if ((ret = PUSH_WAIT(push, 2)))
137 		return ret;
138 
139 	PUSH_MTHD(push, NV507C, SET_BASE_LUT_LO,
140 		  NVDEF(NV507C, SET_BASE_LUT_LO, ENABLE, USE_CORE_LUT));
141 	return 0;
142 }
143 
144 int
145 base507c_ntfy_wait_begun(struct nouveau_bo *bo, u32 offset,
146 			 struct nvif_device *device)
147 {
148 	s64 time = nvif_msec(device, 2000ULL,
149 		if (NVBO_TD32(bo, offset, NV_DISP_BASE_NOTIFIER_1, _0, STATUS, ==, BEGUN))
150 			break;
151 		usleep_range(1, 2);
152 	);
153 	return time < 0 ? time : 0;
154 }
155 
156 int
157 base507c_ntfy_clr(struct nv50_wndw *wndw)
158 {
159 	struct nvif_push *push = wndw->wndw.push;
160 	int ret;
161 
162 	if ((ret = PUSH_WAIT(push, 2)))
163 		return ret;
164 
165 	PUSH_MTHD(push, NV507C, SET_CONTEXT_DMA_NOTIFIER, 0x00000000);
166 	return 0;
167 }
168 
169 int
170 base507c_ntfy_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
171 {
172 	struct nvif_push *push = wndw->wndw.push;
173 	int ret;
174 
175 	if ((ret = PUSH_WAIT(push, 3)))
176 		return ret;
177 
178 	PUSH_MTHD(push, NV507C, SET_NOTIFIER_CONTROL,
179 		  NVVAL(NV507C, SET_NOTIFIER_CONTROL, MODE, asyw->ntfy.awaken) |
180 		  NVVAL(NV507C, SET_NOTIFIER_CONTROL, OFFSET, asyw->ntfy.offset >> 2),
181 
182 				SET_CONTEXT_DMA_NOTIFIER, asyw->ntfy.handle);
183 	return 0;
184 }
185 
186 void
187 base507c_ntfy_reset(struct nouveau_bo *bo, u32 offset)
188 {
189 	NVBO_WR32(bo, offset, NV_DISP_BASE_NOTIFIER_1, _0,
190 			NVDEF(NV_DISP_BASE_NOTIFIER_1, _0, STATUS, NOT_BEGUN));
191 }
192 
193 int
194 base507c_sema_clr(struct nv50_wndw *wndw)
195 {
196 	struct nvif_push *push = wndw->wndw.push;
197 	int ret;
198 
199 	if ((ret = PUSH_WAIT(push, 2)))
200 		return ret;
201 
202 	PUSH_MTHD(push, NV507C, SET_CONTEXT_DMA_SEMAPHORE, 0x00000000);
203 	return 0;
204 }
205 
206 int
207 base507c_sema_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
208 {
209 	struct nvif_push *push = wndw->wndw.push;
210 	int ret;
211 
212 	if ((ret = PUSH_WAIT(push, 5)))
213 		return ret;
214 
215 	PUSH_MTHD(push, NV507C, SET_SEMAPHORE_CONTROL, asyw->sema.offset,
216 				SET_SEMAPHORE_ACQUIRE, asyw->sema.acquire,
217 				SET_SEMAPHORE_RELEASE, asyw->sema.release,
218 				SET_CONTEXT_DMA_SEMAPHORE, asyw->sema.handle);
219 	return 0;
220 }
221 
222 void
223 base507c_release(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
224 		 struct nv50_head_atom *asyh)
225 {
226 	asyh->base.cpp = 0;
227 }
228 
229 int
230 base507c_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
231 		 struct nv50_head_atom *asyh)
232 {
233 	const struct drm_framebuffer *fb = asyw->state.fb;
234 	int ret;
235 
236 	ret = drm_atomic_helper_check_plane_state(&asyw->state, &asyh->state,
237 						  DRM_PLANE_HELPER_NO_SCALING,
238 						  DRM_PLANE_HELPER_NO_SCALING,
239 						  false, true);
240 	if (ret)
241 		return ret;
242 
243 	if (!wndw->func->ilut) {
244 		if ((asyh->base.cpp != 1) ^ (fb->format->cpp[0] != 1))
245 			asyh->state.color_mgmt_changed = true;
246 	}
247 
248 	asyh->base.depth = fb->format->depth;
249 	asyh->base.cpp = fb->format->cpp[0];
250 	asyh->base.x = asyw->state.src.x1 >> 16;
251 	asyh->base.y = asyw->state.src.y1 >> 16;
252 	asyh->base.w = asyw->state.fb->width;
253 	asyh->base.h = asyw->state.fb->height;
254 
255 	/* Some newer formats, esp FP16 ones, don't have a
256 	 * "depth". There's nothing that really makes sense there
257 	 * either, so just set it to the implicit bit count.
258 	 */
259 	if (!asyh->base.depth)
260 		asyh->base.depth = asyh->base.cpp * 8;
261 
262 	return 0;
263 }
264 
265 const u32
266 base507c_format[] = {
267 	DRM_FORMAT_C8,
268 	DRM_FORMAT_RGB565,
269 	DRM_FORMAT_XRGB1555,
270 	DRM_FORMAT_ARGB1555,
271 	DRM_FORMAT_XRGB8888,
272 	DRM_FORMAT_ARGB8888,
273 	DRM_FORMAT_XBGR2101010,
274 	DRM_FORMAT_ABGR2101010,
275 	DRM_FORMAT_XBGR8888,
276 	DRM_FORMAT_ABGR8888,
277 	DRM_FORMAT_XBGR16161616F,
278 	DRM_FORMAT_ABGR16161616F,
279 	0
280 };
281 
282 static const struct nv50_wndw_func
283 base507c = {
284 	.acquire = base507c_acquire,
285 	.release = base507c_release,
286 	.sema_set = base507c_sema_set,
287 	.sema_clr = base507c_sema_clr,
288 	.ntfy_reset = base507c_ntfy_reset,
289 	.ntfy_set = base507c_ntfy_set,
290 	.ntfy_clr = base507c_ntfy_clr,
291 	.ntfy_wait_begun = base507c_ntfy_wait_begun,
292 	.olut_core = 1,
293 	.xlut_set = base507c_xlut_set,
294 	.xlut_clr = base507c_xlut_clr,
295 	.image_set = base507c_image_set,
296 	.image_clr = base507c_image_clr,
297 	.update = base507c_update,
298 };
299 
300 int
301 base507c_new_(const struct nv50_wndw_func *func, const u32 *format,
302 	      struct nouveau_drm *drm, int head, s32 oclass, u32 interlock_data,
303 	      struct nv50_wndw **pwndw)
304 {
305 	struct nv50_disp_base_channel_dma_v0 args = {
306 		.head = head,
307 	};
308 	struct nouveau_display *disp = nouveau_display(drm->dev);
309 	struct nv50_disp *disp50 = nv50_disp(drm->dev);
310 	struct nv50_wndw *wndw;
311 	int ret;
312 
313 	ret = nv50_wndw_new_(func, drm->dev, DRM_PLANE_TYPE_PRIMARY,
314 			     "base", head, format, BIT(head),
315 			     NV50_DISP_INTERLOCK_BASE, interlock_data, &wndw);
316 	if (*pwndw = wndw, ret)
317 		return ret;
318 
319 	ret = nv50_dmac_create(&drm->client.device, &disp->disp.object,
320 			       &oclass, head, &args, sizeof(args),
321 			       disp50->sync->offset, &wndw->wndw);
322 	if (ret) {
323 		NV_ERROR(drm, "base%04x allocation failed: %d\n", oclass, ret);
324 		return ret;
325 	}
326 
327 	ret = nvif_notify_ctor(&wndw->wndw.base.user, "kmsBaseNtfy",
328 			       wndw->notify.func, false,
329 			       NV50_DISP_BASE_CHANNEL_DMA_V0_NTFY_UEVENT,
330 			       &(struct nvif_notify_uevent_req) {},
331 			       sizeof(struct nvif_notify_uevent_req),
332 			       sizeof(struct nvif_notify_uevent_rep),
333 			       &wndw->notify);
334 	if (ret)
335 		return ret;
336 
337 	wndw->ntfy = NV50_DISP_BASE_NTFY(wndw->id);
338 	wndw->sema = NV50_DISP_BASE_SEM0(wndw->id);
339 	wndw->data = 0x00000000;
340 	return 0;
341 }
342 
343 int
344 base507c_new(struct nouveau_drm *drm, int head, s32 oclass,
345 	     struct nv50_wndw **pwndw)
346 {
347 	return base507c_new_(&base507c, base507c_format, drm, head, oclass,
348 			     0x00000002 << (head * 8), pwndw);
349 }
350