1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2022 Marek Vasut <marex@denx.de> 4 * 5 * This code is based on drivers/gpu/drm/mxsfb/mxsfb* 6 */ 7 8 #include <linux/clk.h> 9 #include <linux/dma-mapping.h> 10 #include <linux/io.h> 11 #include <linux/module.h> 12 #include <linux/of.h> 13 #include <linux/of_graph.h> 14 #include <linux/platform_device.h> 15 #include <linux/pm_runtime.h> 16 17 #include <drm/drm_atomic_helper.h> 18 #include <drm/drm_bridge.h> 19 #include <drm/drm_drv.h> 20 #include <drm/drm_encoder.h> 21 #include <drm/drm_fbdev_dma.h> 22 #include <drm/drm_gem_dma_helper.h> 23 #include <drm/drm_gem_framebuffer_helper.h> 24 #include <drm/drm_mode_config.h> 25 #include <drm/drm_module.h> 26 #include <drm/drm_of.h> 27 #include <drm/drm_probe_helper.h> 28 #include <drm/drm_vblank.h> 29 30 #include "lcdif_drv.h" 31 #include "lcdif_regs.h" 32 33 static const struct drm_mode_config_funcs lcdif_mode_config_funcs = { 34 .fb_create = drm_gem_fb_create, 35 .atomic_check = drm_atomic_helper_check, 36 .atomic_commit = drm_atomic_helper_commit, 37 }; 38 39 static const struct drm_mode_config_helper_funcs lcdif_mode_config_helpers = { 40 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, 41 }; 42 43 static const struct drm_encoder_funcs lcdif_encoder_funcs = { 44 .destroy = drm_encoder_cleanup, 45 }; 46 47 static int lcdif_attach_bridge(struct lcdif_drm_private *lcdif) 48 { 49 struct device *dev = lcdif->drm->dev; 50 struct device_node *ep; 51 struct drm_bridge *bridge; 52 int ret; 53 54 for_each_endpoint_of_node(dev->of_node, ep) { 55 struct device_node *remote; 56 struct of_endpoint of_ep; 57 struct drm_encoder *encoder; 58 59 remote = of_graph_get_remote_port_parent(ep); 60 if (!of_device_is_available(remote)) { 61 of_node_put(remote); 62 continue; 63 } 64 of_node_put(remote); 65 66 ret = of_graph_parse_endpoint(ep, &of_ep); 67 if (ret < 0) { 68 dev_err(dev, "Failed to parse endpoint %pOF\n", ep); 69 of_node_put(ep); 70 return ret; 71 } 72 73 bridge = devm_drm_of_get_bridge(dev, dev->of_node, 0, of_ep.id); 74 if (IS_ERR(bridge)) { 75 of_node_put(ep); 76 return dev_err_probe(dev, PTR_ERR(bridge), 77 "Failed to get bridge for endpoint%u\n", 78 of_ep.id); 79 } 80 81 encoder = devm_kzalloc(dev, sizeof(*encoder), GFP_KERNEL); 82 if (!encoder) { 83 dev_err(dev, "Failed to allocate encoder for endpoint%u\n", 84 of_ep.id); 85 of_node_put(ep); 86 return -ENOMEM; 87 } 88 89 encoder->possible_crtcs = drm_crtc_mask(&lcdif->crtc); 90 ret = drm_encoder_init(lcdif->drm, encoder, &lcdif_encoder_funcs, 91 DRM_MODE_ENCODER_NONE, NULL); 92 if (ret) { 93 dev_err(dev, "Failed to initialize encoder for endpoint%u: %d\n", 94 of_ep.id, ret); 95 of_node_put(ep); 96 return ret; 97 } 98 99 ret = drm_bridge_attach(encoder, bridge, NULL, 0); 100 if (ret) { 101 of_node_put(ep); 102 return dev_err_probe(dev, ret, 103 "Failed to attach bridge for endpoint%u\n", 104 of_ep.id); 105 } 106 } 107 108 return 0; 109 } 110 111 static irqreturn_t lcdif_irq_handler(int irq, void *data) 112 { 113 struct drm_device *drm = data; 114 struct lcdif_drm_private *lcdif = drm->dev_private; 115 u32 reg, stat; 116 117 stat = readl(lcdif->base + LCDC_V8_INT_STATUS_D0); 118 if (!stat) 119 return IRQ_NONE; 120 121 if (stat & INT_STATUS_D0_VS_BLANK) { 122 reg = readl(lcdif->base + LCDC_V8_CTRLDESCL0_5); 123 if (!(reg & CTRLDESCL0_5_SHADOW_LOAD_EN)) 124 drm_crtc_handle_vblank(&lcdif->crtc); 125 } 126 127 writel(stat, lcdif->base + LCDC_V8_INT_STATUS_D0); 128 129 return IRQ_HANDLED; 130 } 131 132 static int lcdif_load(struct drm_device *drm) 133 { 134 struct platform_device *pdev = to_platform_device(drm->dev); 135 struct lcdif_drm_private *lcdif; 136 struct resource *res; 137 int ret; 138 139 lcdif = devm_kzalloc(&pdev->dev, sizeof(*lcdif), GFP_KERNEL); 140 if (!lcdif) 141 return -ENOMEM; 142 143 lcdif->drm = drm; 144 drm->dev_private = lcdif; 145 146 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 147 lcdif->base = devm_ioremap_resource(drm->dev, res); 148 if (IS_ERR(lcdif->base)) 149 return PTR_ERR(lcdif->base); 150 151 lcdif->clk = devm_clk_get(drm->dev, "pix"); 152 if (IS_ERR(lcdif->clk)) 153 return PTR_ERR(lcdif->clk); 154 155 lcdif->clk_axi = devm_clk_get(drm->dev, "axi"); 156 if (IS_ERR(lcdif->clk_axi)) 157 return PTR_ERR(lcdif->clk_axi); 158 159 lcdif->clk_disp_axi = devm_clk_get(drm->dev, "disp_axi"); 160 if (IS_ERR(lcdif->clk_disp_axi)) 161 return PTR_ERR(lcdif->clk_disp_axi); 162 163 platform_set_drvdata(pdev, drm); 164 165 ret = dma_set_mask_and_coherent(drm->dev, DMA_BIT_MASK(36)); 166 if (ret) 167 return ret; 168 169 /* Modeset init */ 170 drm_mode_config_init(drm); 171 172 ret = lcdif_kms_init(lcdif); 173 if (ret < 0) { 174 dev_err(drm->dev, "Failed to initialize KMS pipeline\n"); 175 return ret; 176 } 177 178 ret = drm_vblank_init(drm, drm->mode_config.num_crtc); 179 if (ret < 0) { 180 dev_err(drm->dev, "Failed to initialise vblank\n"); 181 return ret; 182 } 183 184 /* Start with vertical blanking interrupt reporting disabled. */ 185 drm_crtc_vblank_off(&lcdif->crtc); 186 187 ret = lcdif_attach_bridge(lcdif); 188 if (ret) 189 return dev_err_probe(drm->dev, ret, "Cannot connect bridge\n"); 190 191 drm->mode_config.min_width = LCDIF_MIN_XRES; 192 drm->mode_config.min_height = LCDIF_MIN_YRES; 193 drm->mode_config.max_width = LCDIF_MAX_XRES; 194 drm->mode_config.max_height = LCDIF_MAX_YRES; 195 drm->mode_config.funcs = &lcdif_mode_config_funcs; 196 drm->mode_config.helper_private = &lcdif_mode_config_helpers; 197 198 drm_mode_config_reset(drm); 199 200 ret = platform_get_irq(pdev, 0); 201 if (ret < 0) 202 return ret; 203 lcdif->irq = ret; 204 205 ret = devm_request_irq(drm->dev, lcdif->irq, lcdif_irq_handler, 0, 206 drm->driver->name, drm); 207 if (ret < 0) { 208 dev_err(drm->dev, "Failed to install IRQ handler\n"); 209 return ret; 210 } 211 212 drm_kms_helper_poll_init(drm); 213 214 drm_helper_hpd_irq_event(drm); 215 216 pm_runtime_enable(drm->dev); 217 218 return 0; 219 } 220 221 static void lcdif_unload(struct drm_device *drm) 222 { 223 struct lcdif_drm_private *lcdif = drm->dev_private; 224 225 pm_runtime_get_sync(drm->dev); 226 227 drm_crtc_vblank_off(&lcdif->crtc); 228 229 drm_kms_helper_poll_fini(drm); 230 drm_mode_config_cleanup(drm); 231 232 pm_runtime_put_sync(drm->dev); 233 pm_runtime_disable(drm->dev); 234 235 drm->dev_private = NULL; 236 } 237 238 DEFINE_DRM_GEM_DMA_FOPS(fops); 239 240 static const struct drm_driver lcdif_driver = { 241 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, 242 DRM_GEM_DMA_DRIVER_OPS, 243 .fops = &fops, 244 .name = "imx-lcdif", 245 .desc = "i.MX LCDIF Controller DRM", 246 .date = "20220417", 247 .major = 1, 248 .minor = 0, 249 }; 250 251 static const struct of_device_id lcdif_dt_ids[] = { 252 { .compatible = "fsl,imx8mp-lcdif" }, 253 { .compatible = "fsl,imx93-lcdif" }, 254 { /* sentinel */ } 255 }; 256 MODULE_DEVICE_TABLE(of, lcdif_dt_ids); 257 258 static int lcdif_probe(struct platform_device *pdev) 259 { 260 struct drm_device *drm; 261 int ret; 262 263 drm = drm_dev_alloc(&lcdif_driver, &pdev->dev); 264 if (IS_ERR(drm)) 265 return PTR_ERR(drm); 266 267 ret = lcdif_load(drm); 268 if (ret) 269 goto err_free; 270 271 ret = drm_dev_register(drm, 0); 272 if (ret) 273 goto err_unload; 274 275 drm_fbdev_dma_setup(drm, 32); 276 277 return 0; 278 279 err_unload: 280 lcdif_unload(drm); 281 err_free: 282 drm_dev_put(drm); 283 284 return ret; 285 } 286 287 static void lcdif_remove(struct platform_device *pdev) 288 { 289 struct drm_device *drm = platform_get_drvdata(pdev); 290 291 drm_dev_unregister(drm); 292 drm_atomic_helper_shutdown(drm); 293 lcdif_unload(drm); 294 drm_dev_put(drm); 295 } 296 297 static void lcdif_shutdown(struct platform_device *pdev) 298 { 299 struct drm_device *drm = platform_get_drvdata(pdev); 300 301 drm_atomic_helper_shutdown(drm); 302 } 303 304 static int __maybe_unused lcdif_rpm_suspend(struct device *dev) 305 { 306 struct drm_device *drm = dev_get_drvdata(dev); 307 struct lcdif_drm_private *lcdif = drm->dev_private; 308 309 /* These clock supply the DISPLAY CLOCK Domain */ 310 clk_disable_unprepare(lcdif->clk); 311 /* These clock supply the System Bus, AXI, Write Path, LFIFO */ 312 clk_disable_unprepare(lcdif->clk_disp_axi); 313 /* These clock supply the Control Bus, APB, APBH Ctrl Registers */ 314 clk_disable_unprepare(lcdif->clk_axi); 315 316 return 0; 317 } 318 319 static int __maybe_unused lcdif_rpm_resume(struct device *dev) 320 { 321 struct drm_device *drm = dev_get_drvdata(dev); 322 struct lcdif_drm_private *lcdif = drm->dev_private; 323 324 /* These clock supply the Control Bus, APB, APBH Ctrl Registers */ 325 clk_prepare_enable(lcdif->clk_axi); 326 /* These clock supply the System Bus, AXI, Write Path, LFIFO */ 327 clk_prepare_enable(lcdif->clk_disp_axi); 328 /* These clock supply the DISPLAY CLOCK Domain */ 329 clk_prepare_enable(lcdif->clk); 330 331 return 0; 332 } 333 334 static int __maybe_unused lcdif_suspend(struct device *dev) 335 { 336 struct drm_device *drm = dev_get_drvdata(dev); 337 int ret; 338 339 ret = drm_mode_config_helper_suspend(drm); 340 if (ret) 341 return ret; 342 343 if (pm_runtime_suspended(dev)) 344 return 0; 345 346 return lcdif_rpm_suspend(dev); 347 } 348 349 static int __maybe_unused lcdif_resume(struct device *dev) 350 { 351 struct drm_device *drm = dev_get_drvdata(dev); 352 353 if (!pm_runtime_suspended(dev)) 354 lcdif_rpm_resume(dev); 355 356 return drm_mode_config_helper_resume(drm); 357 } 358 359 static const struct dev_pm_ops lcdif_pm_ops = { 360 SET_SYSTEM_SLEEP_PM_OPS(lcdif_suspend, lcdif_resume) 361 SET_RUNTIME_PM_OPS(lcdif_rpm_suspend, lcdif_rpm_resume, NULL) 362 }; 363 364 static struct platform_driver lcdif_platform_driver = { 365 .probe = lcdif_probe, 366 .remove_new = lcdif_remove, 367 .shutdown = lcdif_shutdown, 368 .driver = { 369 .name = "imx-lcdif", 370 .of_match_table = lcdif_dt_ids, 371 .pm = &lcdif_pm_ops, 372 }, 373 }; 374 375 drm_module_platform_driver(lcdif_platform_driver); 376 377 MODULE_AUTHOR("Marek Vasut <marex@denx.de>"); 378 MODULE_DESCRIPTION("Freescale LCDIF DRM/KMS driver"); 379 MODULE_LICENSE("GPL"); 380