xref: /openbmc/linux/drivers/gpu/drm/msm/msm_rd.c (revision e5c86679)
1 /*
2  * Copyright (C) 2013 Red Hat
3  * Author: Rob Clark <robdclark@gmail.com>
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License version 2 as published by
7  * the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program.  If not, see <http://www.gnu.org/licenses/>.
16  */
17 
18 /* For debugging crashes, userspace can:
19  *
20  *   tail -f /sys/kernel/debug/dri/<minor>/rd > logfile.rd
21  *
22  * To log the cmdstream in a format that is understood by freedreno/cffdump
23  * utility.  By comparing the last successfully completed fence #, to the
24  * cmdstream for the next fence, you can narrow down which process and submit
25  * caused the gpu crash/lockup.
26  *
27  * This bypasses drm_debugfs_create_files() mainly because we need to use
28  * our own fops for a bit more control.  In particular, we don't want to
29  * do anything if userspace doesn't have the debugfs file open.
30  *
31  * The module-param "rd_full", which defaults to false, enables snapshotting
32  * all (non-written) buffers in the submit, rather than just cmdstream bo's.
33  * This is useful to capture the contents of (for example) vbo's or textures,
34  * or shader programs (if not emitted inline in cmdstream).
35  */
36 
37 #ifdef CONFIG_DEBUG_FS
38 
39 #include <linux/kfifo.h>
40 #include <linux/debugfs.h>
41 #include <linux/circ_buf.h>
42 #include <linux/wait.h>
43 
44 #include "msm_drv.h"
45 #include "msm_gpu.h"
46 #include "msm_gem.h"
47 
48 static bool rd_full = false;
49 MODULE_PARM_DESC(rd_full, "If true, $debugfs/.../rd will snapshot all buffer contents");
50 module_param_named(rd_full, rd_full, bool, 0600);
51 
52 enum rd_sect_type {
53 	RD_NONE,
54 	RD_TEST,       /* ascii text */
55 	RD_CMD,        /* ascii text */
56 	RD_GPUADDR,    /* u32 gpuaddr, u32 size */
57 	RD_CONTEXT,    /* raw dump */
58 	RD_CMDSTREAM,  /* raw dump */
59 	RD_CMDSTREAM_ADDR, /* gpu addr of cmdstream */
60 	RD_PARAM,      /* u32 param_type, u32 param_val, u32 bitlen */
61 	RD_FLUSH,      /* empty, clear previous params */
62 	RD_PROGRAM,    /* shader program, raw dump */
63 	RD_VERT_SHADER,
64 	RD_FRAG_SHADER,
65 	RD_BUFFER_CONTENTS,
66 	RD_GPU_ID,
67 };
68 
69 #define BUF_SZ 512  /* should be power of 2 */
70 
71 /* space used: */
72 #define circ_count(circ) \
73 	(CIRC_CNT((circ)->head, (circ)->tail, BUF_SZ))
74 #define circ_count_to_end(circ) \
75 	(CIRC_CNT_TO_END((circ)->head, (circ)->tail, BUF_SZ))
76 /* space available: */
77 #define circ_space(circ) \
78 	(CIRC_SPACE((circ)->head, (circ)->tail, BUF_SZ))
79 #define circ_space_to_end(circ) \
80 	(CIRC_SPACE_TO_END((circ)->head, (circ)->tail, BUF_SZ))
81 
82 struct msm_rd_state {
83 	struct drm_device *dev;
84 
85 	bool open;
86 
87 	struct dentry *ent;
88 	struct drm_info_node *node;
89 
90 	/* current submit to read out: */
91 	struct msm_gem_submit *submit;
92 
93 	/* fifo access is synchronized on the producer side by
94 	 * struct_mutex held by submit code (otherwise we could
95 	 * end up w/ cmds logged in different order than they
96 	 * were executed).  And read_lock synchronizes the reads
97 	 */
98 	struct mutex read_lock;
99 
100 	wait_queue_head_t fifo_event;
101 	struct circ_buf fifo;
102 
103 	char buf[BUF_SZ];
104 };
105 
106 static void rd_write(struct msm_rd_state *rd, const void *buf, int sz)
107 {
108 	struct circ_buf *fifo = &rd->fifo;
109 	const char *ptr = buf;
110 
111 	while (sz > 0) {
112 		char *fptr = &fifo->buf[fifo->head];
113 		int n;
114 
115 		wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0);
116 
117 		n = min(sz, circ_space_to_end(&rd->fifo));
118 		memcpy(fptr, ptr, n);
119 
120 		fifo->head = (fifo->head + n) & (BUF_SZ - 1);
121 		sz  -= n;
122 		ptr += n;
123 
124 		wake_up_all(&rd->fifo_event);
125 	}
126 }
127 
128 static void rd_write_section(struct msm_rd_state *rd,
129 		enum rd_sect_type type, const void *buf, int sz)
130 {
131 	rd_write(rd, &type, 4);
132 	rd_write(rd, &sz, 4);
133 	rd_write(rd, buf, sz);
134 }
135 
136 static ssize_t rd_read(struct file *file, char __user *buf,
137 		size_t sz, loff_t *ppos)
138 {
139 	struct msm_rd_state *rd = file->private_data;
140 	struct circ_buf *fifo = &rd->fifo;
141 	const char *fptr = &fifo->buf[fifo->tail];
142 	int n = 0, ret = 0;
143 
144 	mutex_lock(&rd->read_lock);
145 
146 	ret = wait_event_interruptible(rd->fifo_event,
147 			circ_count(&rd->fifo) > 0);
148 	if (ret)
149 		goto out;
150 
151 	n = min_t(int, sz, circ_count_to_end(&rd->fifo));
152 	if (copy_to_user(buf, fptr, n)) {
153 		ret = -EFAULT;
154 		goto out;
155 	}
156 
157 	fifo->tail = (fifo->tail + n) & (BUF_SZ - 1);
158 	*ppos += n;
159 
160 	wake_up_all(&rd->fifo_event);
161 
162 out:
163 	mutex_unlock(&rd->read_lock);
164 	if (ret)
165 		return ret;
166 	return n;
167 }
168 
169 static int rd_open(struct inode *inode, struct file *file)
170 {
171 	struct msm_rd_state *rd = inode->i_private;
172 	struct drm_device *dev = rd->dev;
173 	struct msm_drm_private *priv = dev->dev_private;
174 	struct msm_gpu *gpu = priv->gpu;
175 	uint64_t val;
176 	uint32_t gpu_id;
177 	int ret = 0;
178 
179 	mutex_lock(&dev->struct_mutex);
180 
181 	if (rd->open || !gpu) {
182 		ret = -EBUSY;
183 		goto out;
184 	}
185 
186 	file->private_data = rd;
187 	rd->open = true;
188 
189 	/* the parsing tools need to know gpu-id to know which
190 	 * register database to load.
191 	 */
192 	gpu->funcs->get_param(gpu, MSM_PARAM_GPU_ID, &val);
193 	gpu_id = val;
194 
195 	rd_write_section(rd, RD_GPU_ID, &gpu_id, sizeof(gpu_id));
196 
197 out:
198 	mutex_unlock(&dev->struct_mutex);
199 	return ret;
200 }
201 
202 static int rd_release(struct inode *inode, struct file *file)
203 {
204 	struct msm_rd_state *rd = inode->i_private;
205 	rd->open = false;
206 	return 0;
207 }
208 
209 
210 static const struct file_operations rd_debugfs_fops = {
211 	.owner = THIS_MODULE,
212 	.open = rd_open,
213 	.read = rd_read,
214 	.llseek = no_llseek,
215 	.release = rd_release,
216 };
217 
218 int msm_rd_debugfs_init(struct drm_minor *minor)
219 {
220 	struct msm_drm_private *priv = minor->dev->dev_private;
221 	struct msm_rd_state *rd;
222 
223 	/* only create on first minor: */
224 	if (priv->rd)
225 		return 0;
226 
227 	rd = kzalloc(sizeof(*rd), GFP_KERNEL);
228 	if (!rd)
229 		return -ENOMEM;
230 
231 	rd->dev = minor->dev;
232 	rd->fifo.buf = rd->buf;
233 
234 	mutex_init(&rd->read_lock);
235 	priv->rd = rd;
236 
237 	init_waitqueue_head(&rd->fifo_event);
238 
239 	rd->node = kzalloc(sizeof(*rd->node), GFP_KERNEL);
240 	if (!rd->node)
241 		goto fail;
242 
243 	rd->ent = debugfs_create_file("rd", S_IFREG | S_IRUGO,
244 			minor->debugfs_root, rd, &rd_debugfs_fops);
245 	if (!rd->ent) {
246 		DRM_ERROR("Cannot create /sys/kernel/debug/dri/%pd/rd\n",
247 				minor->debugfs_root);
248 		goto fail;
249 	}
250 
251 	rd->node->minor = minor;
252 	rd->node->dent  = rd->ent;
253 	rd->node->info_ent = NULL;
254 
255 	mutex_lock(&minor->debugfs_lock);
256 	list_add(&rd->node->list, &minor->debugfs_list);
257 	mutex_unlock(&minor->debugfs_lock);
258 
259 	return 0;
260 
261 fail:
262 	msm_rd_debugfs_cleanup(minor);
263 	return -1;
264 }
265 
266 void msm_rd_debugfs_cleanup(struct drm_minor *minor)
267 {
268 	struct msm_drm_private *priv = minor->dev->dev_private;
269 	struct msm_rd_state *rd = priv->rd;
270 
271 	if (!rd)
272 		return;
273 
274 	priv->rd = NULL;
275 
276 	debugfs_remove(rd->ent);
277 
278 	if (rd->node) {
279 		mutex_lock(&minor->debugfs_lock);
280 		list_del(&rd->node->list);
281 		mutex_unlock(&minor->debugfs_lock);
282 		kfree(rd->node);
283 	}
284 
285 	mutex_destroy(&rd->read_lock);
286 
287 	kfree(rd);
288 }
289 
290 static void snapshot_buf(struct msm_rd_state *rd,
291 		struct msm_gem_submit *submit, int idx,
292 		uint64_t iova, uint32_t size)
293 {
294 	struct msm_gem_object *obj = submit->bos[idx].obj;
295 	const char *buf;
296 
297 	buf = msm_gem_get_vaddr_locked(&obj->base);
298 	if (IS_ERR(buf))
299 		return;
300 
301 	if (iova) {
302 		buf += iova - submit->bos[idx].iova;
303 	} else {
304 		iova = submit->bos[idx].iova;
305 		size = obj->base.size;
306 	}
307 
308 	rd_write_section(rd, RD_GPUADDR,
309 			(uint32_t[3]){ iova, size, iova >> 32 }, 12);
310 	rd_write_section(rd, RD_BUFFER_CONTENTS, buf, size);
311 
312 	msm_gem_put_vaddr_locked(&obj->base);
313 }
314 
315 /* called under struct_mutex */
316 void msm_rd_dump_submit(struct msm_gem_submit *submit)
317 {
318 	struct drm_device *dev = submit->dev;
319 	struct msm_drm_private *priv = dev->dev_private;
320 	struct msm_rd_state *rd = priv->rd;
321 	char msg[128];
322 	int i, n;
323 
324 	if (!rd->open)
325 		return;
326 
327 	/* writing into fifo is serialized by caller, and
328 	 * rd->read_lock is used to serialize the reads
329 	 */
330 	WARN_ON(!mutex_is_locked(&dev->struct_mutex));
331 
332 	n = snprintf(msg, sizeof(msg), "%.*s/%d: fence=%u",
333 			TASK_COMM_LEN, current->comm, task_pid_nr(current),
334 			submit->fence->seqno);
335 
336 	rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4));
337 
338 	if (rd_full) {
339 		for (i = 0; i < submit->nr_bos; i++) {
340 			/* buffers that are written to probably don't start out
341 			 * with anything interesting:
342 			 */
343 			if (submit->bos[i].flags & MSM_SUBMIT_BO_WRITE)
344 				continue;
345 
346 			snapshot_buf(rd, submit, i, 0, 0);
347 		}
348 	}
349 
350 	for (i = 0; i < submit->nr_cmds; i++) {
351 		uint32_t iova = submit->cmd[i].iova;
352 		uint32_t szd  = submit->cmd[i].size; /* in dwords */
353 
354 		/* snapshot cmdstream bo's (if we haven't already): */
355 		if (!rd_full) {
356 			snapshot_buf(rd, submit, submit->cmd[i].idx,
357 					submit->cmd[i].iova, szd * 4);
358 		}
359 
360 		switch (submit->cmd[i].type) {
361 		case MSM_SUBMIT_CMD_IB_TARGET_BUF:
362 			/* ignore IB-targets, we've logged the buffer, the
363 			 * parser tool will follow the IB based on the logged
364 			 * buffer/gpuaddr, so nothing more to do.
365 			 */
366 			break;
367 		case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
368 		case MSM_SUBMIT_CMD_BUF:
369 			rd_write_section(rd, RD_CMDSTREAM_ADDR,
370 					(uint32_t[2]){ iova, szd }, 8);
371 			break;
372 		}
373 	}
374 }
375 #endif
376