xref: /openbmc/linux/drivers/gpu/drm/msm/msm_drv.h (revision 8cb5d748)
1 /*
2  * Copyright (C) 2013 Red Hat
3  * Author: Rob Clark <robdclark@gmail.com>
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License version 2 as published by
7  * the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program.  If not, see <http://www.gnu.org/licenses/>.
16  */
17 
18 #ifndef __MSM_DRV_H__
19 #define __MSM_DRV_H__
20 
21 #include <linux/kernel.h>
22 #include <linux/clk.h>
23 #include <linux/cpufreq.h>
24 #include <linux/module.h>
25 #include <linux/component.h>
26 #include <linux/platform_device.h>
27 #include <linux/pm.h>
28 #include <linux/pm_runtime.h>
29 #include <linux/slab.h>
30 #include <linux/list.h>
31 #include <linux/iommu.h>
32 #include <linux/types.h>
33 #include <linux/of_graph.h>
34 #include <linux/of_device.h>
35 #include <asm/sizes.h>
36 
37 #include <drm/drmP.h>
38 #include <drm/drm_atomic.h>
39 #include <drm/drm_atomic_helper.h>
40 #include <drm/drm_crtc_helper.h>
41 #include <drm/drm_plane_helper.h>
42 #include <drm/drm_fb_helper.h>
43 #include <drm/msm_drm.h>
44 #include <drm/drm_gem.h>
45 
46 struct msm_kms;
47 struct msm_gpu;
48 struct msm_mmu;
49 struct msm_mdss;
50 struct msm_rd_state;
51 struct msm_perf_state;
52 struct msm_gem_submit;
53 struct msm_fence_context;
54 struct msm_fence_cb;
55 struct msm_gem_address_space;
56 struct msm_gem_vma;
57 
58 struct msm_file_private {
59 	/* currently we don't do anything useful with this.. but when
60 	 * per-context address spaces are supported we'd keep track of
61 	 * the context's page-tables here.
62 	 */
63 	int dummy;
64 };
65 
66 enum msm_mdp_plane_property {
67 	PLANE_PROP_ZPOS,
68 	PLANE_PROP_ALPHA,
69 	PLANE_PROP_PREMULTIPLIED,
70 	PLANE_PROP_MAX_NUM
71 };
72 
73 struct msm_vblank_ctrl {
74 	struct work_struct work;
75 	struct list_head event_list;
76 	spinlock_t lock;
77 };
78 
79 struct msm_drm_private {
80 
81 	struct drm_device *dev;
82 
83 	struct msm_kms *kms;
84 
85 	/* subordinate devices, if present: */
86 	struct platform_device *gpu_pdev;
87 
88 	/* top level MDSS wrapper device (for MDP5 only) */
89 	struct msm_mdss *mdss;
90 
91 	/* possibly this should be in the kms component, but it is
92 	 * shared by both mdp4 and mdp5..
93 	 */
94 	struct hdmi *hdmi;
95 
96 	/* eDP is for mdp5 only, but kms has not been created
97 	 * when edp_bind() and edp_init() are called. Here is the only
98 	 * place to keep the edp instance.
99 	 */
100 	struct msm_edp *edp;
101 
102 	/* DSI is shared by mdp4 and mdp5 */
103 	struct msm_dsi *dsi[2];
104 
105 	/* when we have more than one 'msm_gpu' these need to be an array: */
106 	struct msm_gpu *gpu;
107 	struct msm_file_private *lastctx;
108 
109 	struct drm_fb_helper *fbdev;
110 
111 	struct msm_rd_state *rd;
112 	struct msm_perf_state *perf;
113 
114 	/* list of GEM objects: */
115 	struct list_head inactive_list;
116 
117 	struct workqueue_struct *wq;
118 	struct workqueue_struct *atomic_wq;
119 
120 	/* crtcs pending async atomic updates: */
121 	uint32_t pending_crtcs;
122 	wait_queue_head_t pending_crtcs_event;
123 
124 	unsigned int num_planes;
125 	struct drm_plane *planes[16];
126 
127 	unsigned int num_crtcs;
128 	struct drm_crtc *crtcs[8];
129 
130 	unsigned int num_encoders;
131 	struct drm_encoder *encoders[8];
132 
133 	unsigned int num_bridges;
134 	struct drm_bridge *bridges[8];
135 
136 	unsigned int num_connectors;
137 	struct drm_connector *connectors[8];
138 
139 	/* Properties */
140 	struct drm_property *plane_property[PLANE_PROP_MAX_NUM];
141 
142 	/* VRAM carveout, used when no IOMMU: */
143 	struct {
144 		unsigned long size;
145 		dma_addr_t paddr;
146 		/* NOTE: mm managed at the page level, size is in # of pages
147 		 * and position mm_node->start is in # of pages:
148 		 */
149 		struct drm_mm mm;
150 		spinlock_t lock; /* Protects drm_mm node allocation/removal */
151 	} vram;
152 
153 	struct notifier_block vmap_notifier;
154 	struct shrinker shrinker;
155 
156 	struct msm_vblank_ctrl vblank_ctrl;
157 
158 	/* task holding struct_mutex.. currently only used in submit path
159 	 * to detect and reject faults from copy_from_user() for submit
160 	 * ioctl.
161 	 */
162 	struct task_struct *struct_mutex_task;
163 };
164 
165 struct msm_format {
166 	uint32_t pixel_format;
167 };
168 
169 int msm_atomic_check(struct drm_device *dev,
170 		     struct drm_atomic_state *state);
171 int msm_atomic_commit(struct drm_device *dev,
172 		struct drm_atomic_state *state, bool nonblock);
173 struct drm_atomic_state *msm_atomic_state_alloc(struct drm_device *dev);
174 void msm_atomic_state_clear(struct drm_atomic_state *state);
175 void msm_atomic_state_free(struct drm_atomic_state *state);
176 
177 void msm_gem_unmap_vma(struct msm_gem_address_space *aspace,
178 		struct msm_gem_vma *vma, struct sg_table *sgt);
179 int msm_gem_map_vma(struct msm_gem_address_space *aspace,
180 		struct msm_gem_vma *vma, struct sg_table *sgt, int npages);
181 
182 void msm_gem_address_space_put(struct msm_gem_address_space *aspace);
183 
184 struct msm_gem_address_space *
185 msm_gem_address_space_create(struct device *dev, struct iommu_domain *domain,
186 		const char *name);
187 
188 void msm_gem_submit_free(struct msm_gem_submit *submit);
189 int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
190 		struct drm_file *file);
191 
192 void msm_gem_shrinker_init(struct drm_device *dev);
193 void msm_gem_shrinker_cleanup(struct drm_device *dev);
194 
195 int msm_gem_mmap_obj(struct drm_gem_object *obj,
196 			struct vm_area_struct *vma);
197 int msm_gem_mmap(struct file *filp, struct vm_area_struct *vma);
198 int msm_gem_fault(struct vm_fault *vmf);
199 uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj);
200 int msm_gem_get_iova(struct drm_gem_object *obj,
201 		struct msm_gem_address_space *aspace, uint64_t *iova);
202 uint64_t msm_gem_iova(struct drm_gem_object *obj,
203 		struct msm_gem_address_space *aspace);
204 struct page **msm_gem_get_pages(struct drm_gem_object *obj);
205 void msm_gem_put_pages(struct drm_gem_object *obj);
206 void msm_gem_put_iova(struct drm_gem_object *obj,
207 		struct msm_gem_address_space *aspace);
208 int msm_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
209 		struct drm_mode_create_dumb *args);
210 int msm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
211 		uint32_t handle, uint64_t *offset);
212 struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj);
213 void *msm_gem_prime_vmap(struct drm_gem_object *obj);
214 void msm_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
215 int msm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
216 struct reservation_object *msm_gem_prime_res_obj(struct drm_gem_object *obj);
217 struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev,
218 		struct dma_buf_attachment *attach, struct sg_table *sg);
219 int msm_gem_prime_pin(struct drm_gem_object *obj);
220 void msm_gem_prime_unpin(struct drm_gem_object *obj);
221 void *msm_gem_get_vaddr(struct drm_gem_object *obj);
222 void msm_gem_put_vaddr(struct drm_gem_object *obj);
223 int msm_gem_madvise(struct drm_gem_object *obj, unsigned madv);
224 int msm_gem_sync_object(struct drm_gem_object *obj,
225 		struct msm_fence_context *fctx, bool exclusive);
226 void msm_gem_move_to_active(struct drm_gem_object *obj,
227 		struct msm_gpu *gpu, bool exclusive, struct dma_fence *fence);
228 void msm_gem_move_to_inactive(struct drm_gem_object *obj);
229 int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op, ktime_t *timeout);
230 int msm_gem_cpu_fini(struct drm_gem_object *obj);
231 void msm_gem_free_object(struct drm_gem_object *obj);
232 int msm_gem_new_handle(struct drm_device *dev, struct drm_file *file,
233 		uint32_t size, uint32_t flags, uint32_t *handle);
234 struct drm_gem_object *msm_gem_new(struct drm_device *dev,
235 		uint32_t size, uint32_t flags);
236 struct drm_gem_object *msm_gem_new_locked(struct drm_device *dev,
237 		uint32_t size, uint32_t flags);
238 void *msm_gem_kernel_new(struct drm_device *dev, uint32_t size,
239 		uint32_t flags, struct msm_gem_address_space *aspace,
240 		struct drm_gem_object **bo, uint64_t *iova);
241 void *msm_gem_kernel_new_locked(struct drm_device *dev, uint32_t size,
242 		uint32_t flags, struct msm_gem_address_space *aspace,
243 		struct drm_gem_object **bo, uint64_t *iova);
244 struct drm_gem_object *msm_gem_import(struct drm_device *dev,
245 		struct dma_buf *dmabuf, struct sg_table *sgt);
246 
247 int msm_framebuffer_prepare(struct drm_framebuffer *fb,
248 		struct msm_gem_address_space *aspace);
249 void msm_framebuffer_cleanup(struct drm_framebuffer *fb,
250 		struct msm_gem_address_space *aspace);
251 uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb,
252 		struct msm_gem_address_space *aspace, int plane);
253 struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane);
254 const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb);
255 struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev,
256 		struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd);
257 struct drm_framebuffer * msm_alloc_stolen_fb(struct drm_device *dev,
258 		int w, int h, int p, uint32_t format);
259 
260 struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev);
261 void msm_fbdev_free(struct drm_device *dev);
262 
263 struct hdmi;
264 int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
265 		struct drm_encoder *encoder);
266 void __init msm_hdmi_register(void);
267 void __exit msm_hdmi_unregister(void);
268 
269 struct msm_edp;
270 void __init msm_edp_register(void);
271 void __exit msm_edp_unregister(void);
272 int msm_edp_modeset_init(struct msm_edp *edp, struct drm_device *dev,
273 		struct drm_encoder *encoder);
274 
275 struct msm_dsi;
276 #ifdef CONFIG_DRM_MSM_DSI
277 void __init msm_dsi_register(void);
278 void __exit msm_dsi_unregister(void);
279 int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, struct drm_device *dev,
280 			 struct drm_encoder *encoder);
281 #else
282 static inline void __init msm_dsi_register(void)
283 {
284 }
285 static inline void __exit msm_dsi_unregister(void)
286 {
287 }
288 static inline int msm_dsi_modeset_init(struct msm_dsi *msm_dsi,
289 				       struct drm_device *dev,
290 				       struct drm_encoder *encoder)
291 {
292 	return -EINVAL;
293 }
294 #endif
295 
296 void __init msm_mdp_register(void);
297 void __exit msm_mdp_unregister(void);
298 
299 #ifdef CONFIG_DEBUG_FS
300 void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m);
301 void msm_gem_describe_objects(struct list_head *list, struct seq_file *m);
302 void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
303 int msm_debugfs_late_init(struct drm_device *dev);
304 int msm_rd_debugfs_init(struct drm_minor *minor);
305 void msm_rd_debugfs_cleanup(struct msm_drm_private *priv);
306 void msm_rd_dump_submit(struct msm_gem_submit *submit);
307 int msm_perf_debugfs_init(struct drm_minor *minor);
308 void msm_perf_debugfs_cleanup(struct msm_drm_private *priv);
309 #else
310 static inline int msm_debugfs_late_init(struct drm_device *dev) { return 0; }
311 static inline void msm_rd_dump_submit(struct msm_gem_submit *submit) {}
312 static inline void msm_rd_debugfs_cleanup(struct msm_drm_private *priv) {}
313 static inline void msm_perf_debugfs_cleanup(struct msm_drm_private *priv) {}
314 #endif
315 
316 struct clk *msm_clk_get(struct platform_device *pdev, const char *name);
317 void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
318 		const char *dbgname);
319 void msm_writel(u32 data, void __iomem *addr);
320 u32 msm_readl(const void __iomem *addr);
321 
322 #define DBG(fmt, ...) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
323 #define VERB(fmt, ...) if (0) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
324 
325 static inline int align_pitch(int width, int bpp)
326 {
327 	int bytespp = (bpp + 7) / 8;
328 	/* adreno needs pitch aligned to 32 pixels: */
329 	return bytespp * ALIGN(width, 32);
330 }
331 
332 /* for the generated headers: */
333 #define INVALID_IDX(idx) ({BUG(); 0;})
334 #define fui(x)                ({BUG(); 0;})
335 #define util_float_to_half(x) ({BUG(); 0;})
336 
337 
338 #define FIELD(val, name) (((val) & name ## __MASK) >> name ## __SHIFT)
339 
340 /* for conditionally setting boolean flag(s): */
341 #define COND(bool, val) ((bool) ? (val) : 0)
342 
343 static inline unsigned long timeout_to_jiffies(const ktime_t *timeout)
344 {
345 	ktime_t now = ktime_get();
346 	unsigned long remaining_jiffies;
347 
348 	if (ktime_compare(*timeout, now) < 0) {
349 		remaining_jiffies = 0;
350 	} else {
351 		ktime_t rem = ktime_sub(*timeout, now);
352 		struct timespec ts = ktime_to_timespec(rem);
353 		remaining_jiffies = timespec_to_jiffies(&ts);
354 	}
355 
356 	return remaining_jiffies;
357 }
358 
359 #endif /* __MSM_DRV_H__ */
360