xref: /openbmc/linux/drivers/gpu/drm/msm/msm_drv.h (revision 6b5fc336)
1 /*
2  * Copyright (C) 2013 Red Hat
3  * Author: Rob Clark <robdclark@gmail.com>
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License version 2 as published by
7  * the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program.  If not, see <http://www.gnu.org/licenses/>.
16  */
17 
18 #ifndef __MSM_DRV_H__
19 #define __MSM_DRV_H__
20 
21 #include <linux/kernel.h>
22 #include <linux/clk.h>
23 #include <linux/cpufreq.h>
24 #include <linux/module.h>
25 #include <linux/component.h>
26 #include <linux/platform_device.h>
27 #include <linux/pm.h>
28 #include <linux/pm_runtime.h>
29 #include <linux/slab.h>
30 #include <linux/list.h>
31 #include <linux/iommu.h>
32 #include <linux/types.h>
33 #include <linux/of_graph.h>
34 #include <linux/of_device.h>
35 #include <asm/sizes.h>
36 
37 #include <drm/drmP.h>
38 #include <drm/drm_atomic.h>
39 #include <drm/drm_atomic_helper.h>
40 #include <drm/drm_crtc_helper.h>
41 #include <drm/drm_plane_helper.h>
42 #include <drm/drm_fb_helper.h>
43 #include <drm/msm_drm.h>
44 #include <drm/drm_gem.h>
45 
46 struct msm_kms;
47 struct msm_gpu;
48 struct msm_mmu;
49 struct msm_mdss;
50 struct msm_rd_state;
51 struct msm_perf_state;
52 struct msm_gem_submit;
53 struct msm_fence_context;
54 struct msm_fence_cb;
55 struct msm_gem_address_space;
56 struct msm_gem_vma;
57 
58 #define NUM_DOMAINS 2    /* one for KMS, then one per gpu core (?) */
59 
60 struct msm_file_private {
61 	/* currently we don't do anything useful with this.. but when
62 	 * per-context address spaces are supported we'd keep track of
63 	 * the context's page-tables here.
64 	 */
65 	int dummy;
66 };
67 
68 enum msm_mdp_plane_property {
69 	PLANE_PROP_ZPOS,
70 	PLANE_PROP_ALPHA,
71 	PLANE_PROP_PREMULTIPLIED,
72 	PLANE_PROP_MAX_NUM
73 };
74 
75 struct msm_vblank_ctrl {
76 	struct work_struct work;
77 	struct list_head event_list;
78 	spinlock_t lock;
79 };
80 
81 struct msm_drm_private {
82 
83 	struct drm_device *dev;
84 
85 	struct msm_kms *kms;
86 
87 	/* subordinate devices, if present: */
88 	struct platform_device *gpu_pdev;
89 
90 	/* top level MDSS wrapper device (for MDP5 only) */
91 	struct msm_mdss *mdss;
92 
93 	/* possibly this should be in the kms component, but it is
94 	 * shared by both mdp4 and mdp5..
95 	 */
96 	struct hdmi *hdmi;
97 
98 	/* eDP is for mdp5 only, but kms has not been created
99 	 * when edp_bind() and edp_init() are called. Here is the only
100 	 * place to keep the edp instance.
101 	 */
102 	struct msm_edp *edp;
103 
104 	/* DSI is shared by mdp4 and mdp5 */
105 	struct msm_dsi *dsi[2];
106 
107 	/* when we have more than one 'msm_gpu' these need to be an array: */
108 	struct msm_gpu *gpu;
109 	struct msm_file_private *lastctx;
110 
111 	struct drm_fb_helper *fbdev;
112 
113 	struct msm_rd_state *rd;
114 	struct msm_perf_state *perf;
115 
116 	/* list of GEM objects: */
117 	struct list_head inactive_list;
118 
119 	struct workqueue_struct *wq;
120 	struct workqueue_struct *atomic_wq;
121 
122 	/* crtcs pending async atomic updates: */
123 	uint32_t pending_crtcs;
124 	wait_queue_head_t pending_crtcs_event;
125 
126 	unsigned int num_planes;
127 	struct drm_plane *planes[16];
128 
129 	unsigned int num_crtcs;
130 	struct drm_crtc *crtcs[8];
131 
132 	unsigned int num_encoders;
133 	struct drm_encoder *encoders[8];
134 
135 	unsigned int num_bridges;
136 	struct drm_bridge *bridges[8];
137 
138 	unsigned int num_connectors;
139 	struct drm_connector *connectors[8];
140 
141 	/* Properties */
142 	struct drm_property *plane_property[PLANE_PROP_MAX_NUM];
143 
144 	/* VRAM carveout, used when no IOMMU: */
145 	struct {
146 		unsigned long size;
147 		dma_addr_t paddr;
148 		/* NOTE: mm managed at the page level, size is in # of pages
149 		 * and position mm_node->start is in # of pages:
150 		 */
151 		struct drm_mm mm;
152 		spinlock_t lock; /* Protects drm_mm node allocation/removal */
153 	} vram;
154 
155 	struct notifier_block vmap_notifier;
156 	struct shrinker shrinker;
157 
158 	struct msm_vblank_ctrl vblank_ctrl;
159 
160 	/* task holding struct_mutex.. currently only used in submit path
161 	 * to detect and reject faults from copy_from_user() for submit
162 	 * ioctl.
163 	 */
164 	struct task_struct *struct_mutex_task;
165 };
166 
167 struct msm_format {
168 	uint32_t pixel_format;
169 };
170 
171 int msm_atomic_check(struct drm_device *dev,
172 		     struct drm_atomic_state *state);
173 int msm_atomic_commit(struct drm_device *dev,
174 		struct drm_atomic_state *state, bool nonblock);
175 struct drm_atomic_state *msm_atomic_state_alloc(struct drm_device *dev);
176 void msm_atomic_state_clear(struct drm_atomic_state *state);
177 void msm_atomic_state_free(struct drm_atomic_state *state);
178 
179 void msm_gem_unmap_vma(struct msm_gem_address_space *aspace,
180 		struct msm_gem_vma *vma, struct sg_table *sgt);
181 int msm_gem_map_vma(struct msm_gem_address_space *aspace,
182 		struct msm_gem_vma *vma, struct sg_table *sgt, int npages);
183 
184 void msm_gem_address_space_put(struct msm_gem_address_space *aspace);
185 
186 struct msm_gem_address_space *
187 msm_gem_address_space_create(struct device *dev, struct iommu_domain *domain,
188 		const char *name);
189 
190 void msm_gem_submit_free(struct msm_gem_submit *submit);
191 int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
192 		struct drm_file *file);
193 
194 void msm_gem_shrinker_init(struct drm_device *dev);
195 void msm_gem_shrinker_cleanup(struct drm_device *dev);
196 
197 int msm_gem_mmap_obj(struct drm_gem_object *obj,
198 			struct vm_area_struct *vma);
199 int msm_gem_mmap(struct file *filp, struct vm_area_struct *vma);
200 int msm_gem_fault(struct vm_fault *vmf);
201 uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj);
202 int msm_gem_get_iova(struct drm_gem_object *obj,
203 		struct msm_gem_address_space *aspace, uint64_t *iova);
204 uint64_t msm_gem_iova(struct drm_gem_object *obj,
205 		struct msm_gem_address_space *aspace);
206 struct page **msm_gem_get_pages(struct drm_gem_object *obj);
207 void msm_gem_put_pages(struct drm_gem_object *obj);
208 void msm_gem_put_iova(struct drm_gem_object *obj,
209 		struct msm_gem_address_space *aspace);
210 int msm_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
211 		struct drm_mode_create_dumb *args);
212 int msm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
213 		uint32_t handle, uint64_t *offset);
214 struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj);
215 void *msm_gem_prime_vmap(struct drm_gem_object *obj);
216 void msm_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
217 int msm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
218 struct reservation_object *msm_gem_prime_res_obj(struct drm_gem_object *obj);
219 struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev,
220 		struct dma_buf_attachment *attach, struct sg_table *sg);
221 int msm_gem_prime_pin(struct drm_gem_object *obj);
222 void msm_gem_prime_unpin(struct drm_gem_object *obj);
223 void *msm_gem_get_vaddr(struct drm_gem_object *obj);
224 void msm_gem_put_vaddr(struct drm_gem_object *obj);
225 int msm_gem_madvise(struct drm_gem_object *obj, unsigned madv);
226 int msm_gem_sync_object(struct drm_gem_object *obj,
227 		struct msm_fence_context *fctx, bool exclusive);
228 void msm_gem_move_to_active(struct drm_gem_object *obj,
229 		struct msm_gpu *gpu, bool exclusive, struct dma_fence *fence);
230 void msm_gem_move_to_inactive(struct drm_gem_object *obj);
231 int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op, ktime_t *timeout);
232 int msm_gem_cpu_fini(struct drm_gem_object *obj);
233 void msm_gem_free_object(struct drm_gem_object *obj);
234 int msm_gem_new_handle(struct drm_device *dev, struct drm_file *file,
235 		uint32_t size, uint32_t flags, uint32_t *handle);
236 struct drm_gem_object *msm_gem_new(struct drm_device *dev,
237 		uint32_t size, uint32_t flags);
238 struct drm_gem_object *msm_gem_new_locked(struct drm_device *dev,
239 		uint32_t size, uint32_t flags);
240 struct drm_gem_object *msm_gem_import(struct drm_device *dev,
241 		struct dma_buf *dmabuf, struct sg_table *sgt);
242 
243 int msm_framebuffer_prepare(struct drm_framebuffer *fb,
244 		struct msm_gem_address_space *aspace);
245 void msm_framebuffer_cleanup(struct drm_framebuffer *fb,
246 		struct msm_gem_address_space *aspace);
247 uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb,
248 		struct msm_gem_address_space *aspace, int plane);
249 struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane);
250 const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb);
251 struct drm_framebuffer *msm_framebuffer_init(struct drm_device *dev,
252 		const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object **bos);
253 struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev,
254 		struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd);
255 
256 struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev);
257 void msm_fbdev_free(struct drm_device *dev);
258 
259 struct hdmi;
260 int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
261 		struct drm_encoder *encoder);
262 void __init msm_hdmi_register(void);
263 void __exit msm_hdmi_unregister(void);
264 
265 struct msm_edp;
266 void __init msm_edp_register(void);
267 void __exit msm_edp_unregister(void);
268 int msm_edp_modeset_init(struct msm_edp *edp, struct drm_device *dev,
269 		struct drm_encoder *encoder);
270 
271 struct msm_dsi;
272 #ifdef CONFIG_DRM_MSM_DSI
273 void __init msm_dsi_register(void);
274 void __exit msm_dsi_unregister(void);
275 int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, struct drm_device *dev,
276 			 struct drm_encoder *encoder);
277 #else
278 static inline void __init msm_dsi_register(void)
279 {
280 }
281 static inline void __exit msm_dsi_unregister(void)
282 {
283 }
284 static inline int msm_dsi_modeset_init(struct msm_dsi *msm_dsi,
285 				       struct drm_device *dev,
286 				       struct drm_encoder *encoder)
287 {
288 	return -EINVAL;
289 }
290 #endif
291 
292 void __init msm_mdp_register(void);
293 void __exit msm_mdp_unregister(void);
294 
295 #ifdef CONFIG_DEBUG_FS
296 void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m);
297 void msm_gem_describe_objects(struct list_head *list, struct seq_file *m);
298 void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
299 int msm_debugfs_late_init(struct drm_device *dev);
300 int msm_rd_debugfs_init(struct drm_minor *minor);
301 void msm_rd_debugfs_cleanup(struct msm_drm_private *priv);
302 void msm_rd_dump_submit(struct msm_gem_submit *submit);
303 int msm_perf_debugfs_init(struct drm_minor *minor);
304 void msm_perf_debugfs_cleanup(struct msm_drm_private *priv);
305 #else
306 static inline int msm_debugfs_late_init(struct drm_device *dev) { return 0; }
307 static inline void msm_rd_dump_submit(struct msm_gem_submit *submit) {}
308 static inline void msm_rd_debugfs_cleanup(struct msm_drm_private *priv) {}
309 static inline void msm_perf_debugfs_cleanup(struct msm_drm_private *priv) {}
310 #endif
311 
312 struct clk *msm_clk_get(struct platform_device *pdev, const char *name);
313 void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
314 		const char *dbgname);
315 void msm_writel(u32 data, void __iomem *addr);
316 u32 msm_readl(const void __iomem *addr);
317 
318 #define DBG(fmt, ...) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
319 #define VERB(fmt, ...) if (0) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
320 
321 static inline int align_pitch(int width, int bpp)
322 {
323 	int bytespp = (bpp + 7) / 8;
324 	/* adreno needs pitch aligned to 32 pixels: */
325 	return bytespp * ALIGN(width, 32);
326 }
327 
328 /* for the generated headers: */
329 #define INVALID_IDX(idx) ({BUG(); 0;})
330 #define fui(x)                ({BUG(); 0;})
331 #define util_float_to_half(x) ({BUG(); 0;})
332 
333 
334 #define FIELD(val, name) (((val) & name ## __MASK) >> name ## __SHIFT)
335 
336 /* for conditionally setting boolean flag(s): */
337 #define COND(bool, val) ((bool) ? (val) : 0)
338 
339 static inline unsigned long timeout_to_jiffies(const ktime_t *timeout)
340 {
341 	ktime_t now = ktime_get();
342 	unsigned long remaining_jiffies;
343 
344 	if (ktime_compare(*timeout, now) < 0) {
345 		remaining_jiffies = 0;
346 	} else {
347 		ktime_t rem = ktime_sub(*timeout, now);
348 		struct timespec ts = ktime_to_timespec(rem);
349 		remaining_jiffies = timespec_to_jiffies(&ts);
350 	}
351 
352 	return remaining_jiffies;
353 }
354 
355 #endif /* __MSM_DRV_H__ */
356