1 /* 2 * Copyright (C) 2013 Red Hat 3 * Author: Rob Clark <robdclark@gmail.com> 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 as published by 7 * the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #include "msm_drv.h" 19 #include "msm_gpu.h" 20 #include "msm_kms.h" 21 22 static void msm_fb_output_poll_changed(struct drm_device *dev) 23 { 24 struct msm_drm_private *priv = dev->dev_private; 25 if (priv->fbdev) 26 drm_fb_helper_hotplug_event(priv->fbdev); 27 } 28 29 static const struct drm_mode_config_funcs mode_config_funcs = { 30 .fb_create = msm_framebuffer_create, 31 .output_poll_changed = msm_fb_output_poll_changed, 32 }; 33 34 int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu) 35 { 36 struct msm_drm_private *priv = dev->dev_private; 37 int idx = priv->num_mmus++; 38 39 if (WARN_ON(idx >= ARRAY_SIZE(priv->mmus))) 40 return -EINVAL; 41 42 priv->mmus[idx] = mmu; 43 44 return idx; 45 } 46 47 #ifdef CONFIG_DRM_MSM_REGISTER_LOGGING 48 static bool reglog = false; 49 MODULE_PARM_DESC(reglog, "Enable register read/write logging"); 50 module_param(reglog, bool, 0600); 51 #else 52 #define reglog 0 53 #endif 54 55 static char *vram; 56 MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without IOMMU/GPUMMU"); 57 module_param(vram, charp, 0); 58 59 /* 60 * Util/helpers: 61 */ 62 63 void __iomem *msm_ioremap(struct platform_device *pdev, const char *name, 64 const char *dbgname) 65 { 66 struct resource *res; 67 unsigned long size; 68 void __iomem *ptr; 69 70 if (name) 71 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name); 72 else 73 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 74 75 if (!res) { 76 dev_err(&pdev->dev, "failed to get memory resource: %s\n", name); 77 return ERR_PTR(-EINVAL); 78 } 79 80 size = resource_size(res); 81 82 ptr = devm_ioremap_nocache(&pdev->dev, res->start, size); 83 if (!ptr) { 84 dev_err(&pdev->dev, "failed to ioremap: %s\n", name); 85 return ERR_PTR(-ENOMEM); 86 } 87 88 if (reglog) 89 printk(KERN_DEBUG "IO:region %s %08x %08lx\n", dbgname, (u32)ptr, size); 90 91 return ptr; 92 } 93 94 void msm_writel(u32 data, void __iomem *addr) 95 { 96 if (reglog) 97 printk(KERN_DEBUG "IO:W %08x %08x\n", (u32)addr, data); 98 writel(data, addr); 99 } 100 101 u32 msm_readl(const void __iomem *addr) 102 { 103 u32 val = readl(addr); 104 if (reglog) 105 printk(KERN_ERR "IO:R %08x %08x\n", (u32)addr, val); 106 return val; 107 } 108 109 /* 110 * DRM operations: 111 */ 112 113 static int msm_unload(struct drm_device *dev) 114 { 115 struct msm_drm_private *priv = dev->dev_private; 116 struct msm_kms *kms = priv->kms; 117 struct msm_gpu *gpu = priv->gpu; 118 119 drm_kms_helper_poll_fini(dev); 120 drm_mode_config_cleanup(dev); 121 drm_vblank_cleanup(dev); 122 123 pm_runtime_get_sync(dev->dev); 124 drm_irq_uninstall(dev); 125 pm_runtime_put_sync(dev->dev); 126 127 flush_workqueue(priv->wq); 128 destroy_workqueue(priv->wq); 129 130 if (kms) { 131 pm_runtime_disable(dev->dev); 132 kms->funcs->destroy(kms); 133 } 134 135 if (gpu) { 136 mutex_lock(&dev->struct_mutex); 137 gpu->funcs->pm_suspend(gpu); 138 gpu->funcs->destroy(gpu); 139 mutex_unlock(&dev->struct_mutex); 140 } 141 142 if (priv->vram.paddr) { 143 DEFINE_DMA_ATTRS(attrs); 144 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs); 145 drm_mm_takedown(&priv->vram.mm); 146 dma_free_attrs(dev->dev, priv->vram.size, NULL, 147 priv->vram.paddr, &attrs); 148 } 149 150 component_unbind_all(dev->dev, dev); 151 152 dev->dev_private = NULL; 153 154 kfree(priv); 155 156 return 0; 157 } 158 159 static int get_mdp_ver(struct platform_device *pdev) 160 { 161 #ifdef CONFIG_OF 162 const static struct of_device_id match_types[] = { { 163 .compatible = "qcom,mdss_mdp", 164 .data = (void *)5, 165 }, { 166 /* end node */ 167 } }; 168 struct device *dev = &pdev->dev; 169 const struct of_device_id *match; 170 match = of_match_node(match_types, dev->of_node); 171 if (match) 172 return (int)match->data; 173 #endif 174 return 4; 175 } 176 177 static int msm_load(struct drm_device *dev, unsigned long flags) 178 { 179 struct platform_device *pdev = dev->platformdev; 180 struct msm_drm_private *priv; 181 struct msm_kms *kms; 182 int ret; 183 184 185 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 186 if (!priv) { 187 dev_err(dev->dev, "failed to allocate private data\n"); 188 return -ENOMEM; 189 } 190 191 dev->dev_private = priv; 192 193 priv->wq = alloc_ordered_workqueue("msm", 0); 194 init_waitqueue_head(&priv->fence_event); 195 196 INIT_LIST_HEAD(&priv->inactive_list); 197 INIT_LIST_HEAD(&priv->fence_cbs); 198 199 drm_mode_config_init(dev); 200 201 /* if we have no IOMMU, then we need to use carveout allocator. 202 * Grab the entire CMA chunk carved out in early startup in 203 * mach-msm: 204 */ 205 if (!iommu_present(&platform_bus_type)) { 206 DEFINE_DMA_ATTRS(attrs); 207 unsigned long size; 208 void *p; 209 210 DBG("using %s VRAM carveout", vram); 211 size = memparse(vram, NULL); 212 priv->vram.size = size; 213 214 drm_mm_init(&priv->vram.mm, 0, (size >> PAGE_SHIFT) - 1); 215 216 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs); 217 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs); 218 219 /* note that for no-kernel-mapping, the vaddr returned 220 * is bogus, but non-null if allocation succeeded: 221 */ 222 p = dma_alloc_attrs(dev->dev, size, 223 &priv->vram.paddr, 0, &attrs); 224 if (!p) { 225 dev_err(dev->dev, "failed to allocate VRAM\n"); 226 priv->vram.paddr = 0; 227 ret = -ENOMEM; 228 goto fail; 229 } 230 231 dev_info(dev->dev, "VRAM: %08x->%08x\n", 232 (uint32_t)priv->vram.paddr, 233 (uint32_t)(priv->vram.paddr + size)); 234 } 235 236 platform_set_drvdata(pdev, dev); 237 238 /* Bind all our sub-components: */ 239 ret = component_bind_all(dev->dev, dev); 240 if (ret) 241 return ret; 242 243 switch (get_mdp_ver(pdev)) { 244 case 4: 245 kms = mdp4_kms_init(dev); 246 break; 247 case 5: 248 kms = mdp5_kms_init(dev); 249 break; 250 default: 251 kms = ERR_PTR(-ENODEV); 252 break; 253 } 254 255 if (IS_ERR(kms)) { 256 /* 257 * NOTE: once we have GPU support, having no kms should not 258 * be considered fatal.. ideally we would still support gpu 259 * and (for example) use dmabuf/prime to share buffers with 260 * imx drm driver on iMX5 261 */ 262 dev_err(dev->dev, "failed to load kms\n"); 263 ret = PTR_ERR(kms); 264 goto fail; 265 } 266 267 priv->kms = kms; 268 269 if (kms) { 270 pm_runtime_enable(dev->dev); 271 ret = kms->funcs->hw_init(kms); 272 if (ret) { 273 dev_err(dev->dev, "kms hw init failed: %d\n", ret); 274 goto fail; 275 } 276 } 277 278 dev->mode_config.min_width = 0; 279 dev->mode_config.min_height = 0; 280 dev->mode_config.max_width = 2048; 281 dev->mode_config.max_height = 2048; 282 dev->mode_config.funcs = &mode_config_funcs; 283 284 ret = drm_vblank_init(dev, 1); 285 if (ret < 0) { 286 dev_err(dev->dev, "failed to initialize vblank\n"); 287 goto fail; 288 } 289 290 pm_runtime_get_sync(dev->dev); 291 ret = drm_irq_install(dev); 292 pm_runtime_put_sync(dev->dev); 293 if (ret < 0) { 294 dev_err(dev->dev, "failed to install IRQ handler\n"); 295 goto fail; 296 } 297 298 #ifdef CONFIG_DRM_MSM_FBDEV 299 priv->fbdev = msm_fbdev_init(dev); 300 #endif 301 302 drm_kms_helper_poll_init(dev); 303 304 return 0; 305 306 fail: 307 msm_unload(dev); 308 return ret; 309 } 310 311 static void load_gpu(struct drm_device *dev) 312 { 313 struct msm_drm_private *priv = dev->dev_private; 314 struct msm_gpu *gpu; 315 316 if (priv->gpu) 317 return; 318 319 mutex_lock(&dev->struct_mutex); 320 gpu = a3xx_gpu_init(dev); 321 if (IS_ERR(gpu)) { 322 dev_warn(dev->dev, "failed to load a3xx gpu\n"); 323 gpu = NULL; 324 /* not fatal */ 325 } 326 327 if (gpu) { 328 int ret; 329 gpu->funcs->pm_resume(gpu); 330 ret = gpu->funcs->hw_init(gpu); 331 if (ret) { 332 dev_err(dev->dev, "gpu hw init failed: %d\n", ret); 333 gpu->funcs->destroy(gpu); 334 gpu = NULL; 335 } else { 336 /* give inactive pm a chance to kick in: */ 337 msm_gpu_retire(gpu); 338 } 339 340 } 341 342 priv->gpu = gpu; 343 344 mutex_unlock(&dev->struct_mutex); 345 } 346 347 static int msm_open(struct drm_device *dev, struct drm_file *file) 348 { 349 struct msm_file_private *ctx; 350 351 /* For now, load gpu on open.. to avoid the requirement of having 352 * firmware in the initrd. 353 */ 354 load_gpu(dev); 355 356 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); 357 if (!ctx) 358 return -ENOMEM; 359 360 file->driver_priv = ctx; 361 362 return 0; 363 } 364 365 static void msm_preclose(struct drm_device *dev, struct drm_file *file) 366 { 367 struct msm_drm_private *priv = dev->dev_private; 368 struct msm_file_private *ctx = file->driver_priv; 369 struct msm_kms *kms = priv->kms; 370 371 if (kms) 372 kms->funcs->preclose(kms, file); 373 374 mutex_lock(&dev->struct_mutex); 375 if (ctx == priv->lastctx) 376 priv->lastctx = NULL; 377 mutex_unlock(&dev->struct_mutex); 378 379 kfree(ctx); 380 } 381 382 static void msm_lastclose(struct drm_device *dev) 383 { 384 struct msm_drm_private *priv = dev->dev_private; 385 if (priv->fbdev) { 386 drm_modeset_lock_all(dev); 387 drm_fb_helper_restore_fbdev_mode(priv->fbdev); 388 drm_modeset_unlock_all(dev); 389 } 390 } 391 392 static irqreturn_t msm_irq(int irq, void *arg) 393 { 394 struct drm_device *dev = arg; 395 struct msm_drm_private *priv = dev->dev_private; 396 struct msm_kms *kms = priv->kms; 397 BUG_ON(!kms); 398 return kms->funcs->irq(kms); 399 } 400 401 static void msm_irq_preinstall(struct drm_device *dev) 402 { 403 struct msm_drm_private *priv = dev->dev_private; 404 struct msm_kms *kms = priv->kms; 405 BUG_ON(!kms); 406 kms->funcs->irq_preinstall(kms); 407 } 408 409 static int msm_irq_postinstall(struct drm_device *dev) 410 { 411 struct msm_drm_private *priv = dev->dev_private; 412 struct msm_kms *kms = priv->kms; 413 BUG_ON(!kms); 414 return kms->funcs->irq_postinstall(kms); 415 } 416 417 static void msm_irq_uninstall(struct drm_device *dev) 418 { 419 struct msm_drm_private *priv = dev->dev_private; 420 struct msm_kms *kms = priv->kms; 421 BUG_ON(!kms); 422 kms->funcs->irq_uninstall(kms); 423 } 424 425 static int msm_enable_vblank(struct drm_device *dev, int crtc_id) 426 { 427 struct msm_drm_private *priv = dev->dev_private; 428 struct msm_kms *kms = priv->kms; 429 if (!kms) 430 return -ENXIO; 431 DBG("dev=%p, crtc=%d", dev, crtc_id); 432 return kms->funcs->enable_vblank(kms, priv->crtcs[crtc_id]); 433 } 434 435 static void msm_disable_vblank(struct drm_device *dev, int crtc_id) 436 { 437 struct msm_drm_private *priv = dev->dev_private; 438 struct msm_kms *kms = priv->kms; 439 if (!kms) 440 return; 441 DBG("dev=%p, crtc=%d", dev, crtc_id); 442 kms->funcs->disable_vblank(kms, priv->crtcs[crtc_id]); 443 } 444 445 /* 446 * DRM debugfs: 447 */ 448 449 #ifdef CONFIG_DEBUG_FS 450 static int msm_gpu_show(struct drm_device *dev, struct seq_file *m) 451 { 452 struct msm_drm_private *priv = dev->dev_private; 453 struct msm_gpu *gpu = priv->gpu; 454 455 if (gpu) { 456 seq_printf(m, "%s Status:\n", gpu->name); 457 gpu->funcs->show(gpu, m); 458 } 459 460 return 0; 461 } 462 463 static int msm_gem_show(struct drm_device *dev, struct seq_file *m) 464 { 465 struct msm_drm_private *priv = dev->dev_private; 466 struct msm_gpu *gpu = priv->gpu; 467 468 if (gpu) { 469 seq_printf(m, "Active Objects (%s):\n", gpu->name); 470 msm_gem_describe_objects(&gpu->active_list, m); 471 } 472 473 seq_printf(m, "Inactive Objects:\n"); 474 msm_gem_describe_objects(&priv->inactive_list, m); 475 476 return 0; 477 } 478 479 static int msm_mm_show(struct drm_device *dev, struct seq_file *m) 480 { 481 return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm); 482 } 483 484 static int msm_fb_show(struct drm_device *dev, struct seq_file *m) 485 { 486 struct msm_drm_private *priv = dev->dev_private; 487 struct drm_framebuffer *fb, *fbdev_fb = NULL; 488 489 if (priv->fbdev) { 490 seq_printf(m, "fbcon "); 491 fbdev_fb = priv->fbdev->fb; 492 msm_framebuffer_describe(fbdev_fb, m); 493 } 494 495 mutex_lock(&dev->mode_config.fb_lock); 496 list_for_each_entry(fb, &dev->mode_config.fb_list, head) { 497 if (fb == fbdev_fb) 498 continue; 499 500 seq_printf(m, "user "); 501 msm_framebuffer_describe(fb, m); 502 } 503 mutex_unlock(&dev->mode_config.fb_lock); 504 505 return 0; 506 } 507 508 static int show_locked(struct seq_file *m, void *arg) 509 { 510 struct drm_info_node *node = (struct drm_info_node *) m->private; 511 struct drm_device *dev = node->minor->dev; 512 int (*show)(struct drm_device *dev, struct seq_file *m) = 513 node->info_ent->data; 514 int ret; 515 516 ret = mutex_lock_interruptible(&dev->struct_mutex); 517 if (ret) 518 return ret; 519 520 ret = show(dev, m); 521 522 mutex_unlock(&dev->struct_mutex); 523 524 return ret; 525 } 526 527 static struct drm_info_list msm_debugfs_list[] = { 528 {"gpu", show_locked, 0, msm_gpu_show}, 529 {"gem", show_locked, 0, msm_gem_show}, 530 { "mm", show_locked, 0, msm_mm_show }, 531 { "fb", show_locked, 0, msm_fb_show }, 532 }; 533 534 static int msm_debugfs_init(struct drm_minor *minor) 535 { 536 struct drm_device *dev = minor->dev; 537 int ret; 538 539 ret = drm_debugfs_create_files(msm_debugfs_list, 540 ARRAY_SIZE(msm_debugfs_list), 541 minor->debugfs_root, minor); 542 543 if (ret) { 544 dev_err(dev->dev, "could not install msm_debugfs_list\n"); 545 return ret; 546 } 547 548 return ret; 549 } 550 551 static void msm_debugfs_cleanup(struct drm_minor *minor) 552 { 553 drm_debugfs_remove_files(msm_debugfs_list, 554 ARRAY_SIZE(msm_debugfs_list), minor); 555 } 556 #endif 557 558 /* 559 * Fences: 560 */ 561 562 int msm_wait_fence_interruptable(struct drm_device *dev, uint32_t fence, 563 struct timespec *timeout) 564 { 565 struct msm_drm_private *priv = dev->dev_private; 566 int ret; 567 568 if (!priv->gpu) 569 return 0; 570 571 if (fence > priv->gpu->submitted_fence) { 572 DRM_ERROR("waiting on invalid fence: %u (of %u)\n", 573 fence, priv->gpu->submitted_fence); 574 return -EINVAL; 575 } 576 577 if (!timeout) { 578 /* no-wait: */ 579 ret = fence_completed(dev, fence) ? 0 : -EBUSY; 580 } else { 581 unsigned long timeout_jiffies = timespec_to_jiffies(timeout); 582 unsigned long start_jiffies = jiffies; 583 unsigned long remaining_jiffies; 584 585 if (time_after(start_jiffies, timeout_jiffies)) 586 remaining_jiffies = 0; 587 else 588 remaining_jiffies = timeout_jiffies - start_jiffies; 589 590 ret = wait_event_interruptible_timeout(priv->fence_event, 591 fence_completed(dev, fence), 592 remaining_jiffies); 593 594 if (ret == 0) { 595 DBG("timeout waiting for fence: %u (completed: %u)", 596 fence, priv->completed_fence); 597 ret = -ETIMEDOUT; 598 } else if (ret != -ERESTARTSYS) { 599 ret = 0; 600 } 601 } 602 603 return ret; 604 } 605 606 /* called from workqueue */ 607 void msm_update_fence(struct drm_device *dev, uint32_t fence) 608 { 609 struct msm_drm_private *priv = dev->dev_private; 610 611 mutex_lock(&dev->struct_mutex); 612 priv->completed_fence = max(fence, priv->completed_fence); 613 614 while (!list_empty(&priv->fence_cbs)) { 615 struct msm_fence_cb *cb; 616 617 cb = list_first_entry(&priv->fence_cbs, 618 struct msm_fence_cb, work.entry); 619 620 if (cb->fence > priv->completed_fence) 621 break; 622 623 list_del_init(&cb->work.entry); 624 queue_work(priv->wq, &cb->work); 625 } 626 627 mutex_unlock(&dev->struct_mutex); 628 629 wake_up_all(&priv->fence_event); 630 } 631 632 void __msm_fence_worker(struct work_struct *work) 633 { 634 struct msm_fence_cb *cb = container_of(work, struct msm_fence_cb, work); 635 cb->func(cb); 636 } 637 638 /* 639 * DRM ioctls: 640 */ 641 642 static int msm_ioctl_get_param(struct drm_device *dev, void *data, 643 struct drm_file *file) 644 { 645 struct msm_drm_private *priv = dev->dev_private; 646 struct drm_msm_param *args = data; 647 struct msm_gpu *gpu; 648 649 /* for now, we just have 3d pipe.. eventually this would need to 650 * be more clever to dispatch to appropriate gpu module: 651 */ 652 if (args->pipe != MSM_PIPE_3D0) 653 return -EINVAL; 654 655 gpu = priv->gpu; 656 657 if (!gpu) 658 return -ENXIO; 659 660 return gpu->funcs->get_param(gpu, args->param, &args->value); 661 } 662 663 static int msm_ioctl_gem_new(struct drm_device *dev, void *data, 664 struct drm_file *file) 665 { 666 struct drm_msm_gem_new *args = data; 667 668 if (args->flags & ~MSM_BO_FLAGS) { 669 DRM_ERROR("invalid flags: %08x\n", args->flags); 670 return -EINVAL; 671 } 672 673 return msm_gem_new_handle(dev, file, args->size, 674 args->flags, &args->handle); 675 } 676 677 #define TS(t) ((struct timespec){ .tv_sec = (t).tv_sec, .tv_nsec = (t).tv_nsec }) 678 679 static int msm_ioctl_gem_cpu_prep(struct drm_device *dev, void *data, 680 struct drm_file *file) 681 { 682 struct drm_msm_gem_cpu_prep *args = data; 683 struct drm_gem_object *obj; 684 int ret; 685 686 if (args->op & ~MSM_PREP_FLAGS) { 687 DRM_ERROR("invalid op: %08x\n", args->op); 688 return -EINVAL; 689 } 690 691 obj = drm_gem_object_lookup(dev, file, args->handle); 692 if (!obj) 693 return -ENOENT; 694 695 ret = msm_gem_cpu_prep(obj, args->op, &TS(args->timeout)); 696 697 drm_gem_object_unreference_unlocked(obj); 698 699 return ret; 700 } 701 702 static int msm_ioctl_gem_cpu_fini(struct drm_device *dev, void *data, 703 struct drm_file *file) 704 { 705 struct drm_msm_gem_cpu_fini *args = data; 706 struct drm_gem_object *obj; 707 int ret; 708 709 obj = drm_gem_object_lookup(dev, file, args->handle); 710 if (!obj) 711 return -ENOENT; 712 713 ret = msm_gem_cpu_fini(obj); 714 715 drm_gem_object_unreference_unlocked(obj); 716 717 return ret; 718 } 719 720 static int msm_ioctl_gem_info(struct drm_device *dev, void *data, 721 struct drm_file *file) 722 { 723 struct drm_msm_gem_info *args = data; 724 struct drm_gem_object *obj; 725 int ret = 0; 726 727 if (args->pad) 728 return -EINVAL; 729 730 obj = drm_gem_object_lookup(dev, file, args->handle); 731 if (!obj) 732 return -ENOENT; 733 734 args->offset = msm_gem_mmap_offset(obj); 735 736 drm_gem_object_unreference_unlocked(obj); 737 738 return ret; 739 } 740 741 static int msm_ioctl_wait_fence(struct drm_device *dev, void *data, 742 struct drm_file *file) 743 { 744 struct drm_msm_wait_fence *args = data; 745 746 if (args->pad) { 747 DRM_ERROR("invalid pad: %08x\n", args->pad); 748 return -EINVAL; 749 } 750 751 return msm_wait_fence_interruptable(dev, args->fence, 752 &TS(args->timeout)); 753 } 754 755 static const struct drm_ioctl_desc msm_ioctls[] = { 756 DRM_IOCTL_DEF_DRV(MSM_GET_PARAM, msm_ioctl_get_param, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), 757 DRM_IOCTL_DEF_DRV(MSM_GEM_NEW, msm_ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), 758 DRM_IOCTL_DEF_DRV(MSM_GEM_INFO, msm_ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), 759 DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), 760 DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), 761 DRM_IOCTL_DEF_DRV(MSM_GEM_SUBMIT, msm_ioctl_gem_submit, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), 762 DRM_IOCTL_DEF_DRV(MSM_WAIT_FENCE, msm_ioctl_wait_fence, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), 763 }; 764 765 static const struct vm_operations_struct vm_ops = { 766 .fault = msm_gem_fault, 767 .open = drm_gem_vm_open, 768 .close = drm_gem_vm_close, 769 }; 770 771 static const struct file_operations fops = { 772 .owner = THIS_MODULE, 773 .open = drm_open, 774 .release = drm_release, 775 .unlocked_ioctl = drm_ioctl, 776 #ifdef CONFIG_COMPAT 777 .compat_ioctl = drm_compat_ioctl, 778 #endif 779 .poll = drm_poll, 780 .read = drm_read, 781 .llseek = no_llseek, 782 .mmap = msm_gem_mmap, 783 }; 784 785 static struct drm_driver msm_driver = { 786 .driver_features = DRIVER_HAVE_IRQ | 787 DRIVER_GEM | 788 DRIVER_PRIME | 789 DRIVER_RENDER | 790 DRIVER_MODESET, 791 .load = msm_load, 792 .unload = msm_unload, 793 .open = msm_open, 794 .preclose = msm_preclose, 795 .lastclose = msm_lastclose, 796 .irq_handler = msm_irq, 797 .irq_preinstall = msm_irq_preinstall, 798 .irq_postinstall = msm_irq_postinstall, 799 .irq_uninstall = msm_irq_uninstall, 800 .get_vblank_counter = drm_vblank_count, 801 .enable_vblank = msm_enable_vblank, 802 .disable_vblank = msm_disable_vblank, 803 .gem_free_object = msm_gem_free_object, 804 .gem_vm_ops = &vm_ops, 805 .dumb_create = msm_gem_dumb_create, 806 .dumb_map_offset = msm_gem_dumb_map_offset, 807 .dumb_destroy = drm_gem_dumb_destroy, 808 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 809 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 810 .gem_prime_export = drm_gem_prime_export, 811 .gem_prime_import = drm_gem_prime_import, 812 .gem_prime_pin = msm_gem_prime_pin, 813 .gem_prime_unpin = msm_gem_prime_unpin, 814 .gem_prime_get_sg_table = msm_gem_prime_get_sg_table, 815 .gem_prime_import_sg_table = msm_gem_prime_import_sg_table, 816 .gem_prime_vmap = msm_gem_prime_vmap, 817 .gem_prime_vunmap = msm_gem_prime_vunmap, 818 #ifdef CONFIG_DEBUG_FS 819 .debugfs_init = msm_debugfs_init, 820 .debugfs_cleanup = msm_debugfs_cleanup, 821 #endif 822 .ioctls = msm_ioctls, 823 .num_ioctls = DRM_MSM_NUM_IOCTLS, 824 .fops = &fops, 825 .name = "msm", 826 .desc = "MSM Snapdragon DRM", 827 .date = "20130625", 828 .major = 1, 829 .minor = 0, 830 }; 831 832 #ifdef CONFIG_PM_SLEEP 833 static int msm_pm_suspend(struct device *dev) 834 { 835 struct drm_device *ddev = dev_get_drvdata(dev); 836 837 drm_kms_helper_poll_disable(ddev); 838 839 return 0; 840 } 841 842 static int msm_pm_resume(struct device *dev) 843 { 844 struct drm_device *ddev = dev_get_drvdata(dev); 845 846 drm_kms_helper_poll_enable(ddev); 847 848 return 0; 849 } 850 #endif 851 852 static const struct dev_pm_ops msm_pm_ops = { 853 SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume) 854 }; 855 856 /* 857 * Componentized driver support: 858 */ 859 860 #ifdef CONFIG_OF 861 /* NOTE: the CONFIG_OF case duplicates the same code as exynos or imx 862 * (or probably any other).. so probably some room for some helpers 863 */ 864 static int compare_of(struct device *dev, void *data) 865 { 866 return dev->of_node == data; 867 } 868 869 static int msm_drm_add_components(struct device *master, struct master *m) 870 { 871 struct device_node *np = master->of_node; 872 unsigned i; 873 int ret; 874 875 for (i = 0; ; i++) { 876 struct device_node *node; 877 878 node = of_parse_phandle(np, "connectors", i); 879 if (!node) 880 break; 881 882 ret = component_master_add_child(m, compare_of, node); 883 of_node_put(node); 884 885 if (ret) 886 return ret; 887 } 888 return 0; 889 } 890 #else 891 static int compare_dev(struct device *dev, void *data) 892 { 893 return dev == data; 894 } 895 896 static int msm_drm_add_components(struct device *master, struct master *m) 897 { 898 /* For non-DT case, it kinda sucks. We don't actually have a way 899 * to know whether or not we are waiting for certain devices (or if 900 * they are simply not present). But for non-DT we only need to 901 * care about apq8064/apq8060/etc (all mdp4/a3xx): 902 */ 903 static const char *devnames[] = { 904 "hdmi_msm.0", "kgsl-3d0.0", 905 }; 906 int i; 907 908 DBG("Adding components.."); 909 910 for (i = 0; i < ARRAY_SIZE(devnames); i++) { 911 struct device *dev; 912 int ret; 913 914 dev = bus_find_device_by_name(&platform_bus_type, 915 NULL, devnames[i]); 916 if (!dev) { 917 dev_info(master, "still waiting for %s\n", devnames[i]); 918 return -EPROBE_DEFER; 919 } 920 921 ret = component_master_add_child(m, compare_dev, dev); 922 if (ret) { 923 DBG("could not add child: %d", ret); 924 return ret; 925 } 926 } 927 928 return 0; 929 } 930 #endif 931 932 static int msm_drm_bind(struct device *dev) 933 { 934 return drm_platform_init(&msm_driver, to_platform_device(dev)); 935 } 936 937 static void msm_drm_unbind(struct device *dev) 938 { 939 drm_put_dev(platform_get_drvdata(to_platform_device(dev))); 940 } 941 942 static const struct component_master_ops msm_drm_ops = { 943 .add_components = msm_drm_add_components, 944 .bind = msm_drm_bind, 945 .unbind = msm_drm_unbind, 946 }; 947 948 /* 949 * Platform driver: 950 */ 951 952 static int msm_pdev_probe(struct platform_device *pdev) 953 { 954 pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); 955 return component_master_add(&pdev->dev, &msm_drm_ops); 956 } 957 958 static int msm_pdev_remove(struct platform_device *pdev) 959 { 960 component_master_del(&pdev->dev, &msm_drm_ops); 961 962 return 0; 963 } 964 965 static const struct platform_device_id msm_id[] = { 966 { "mdp", 0 }, 967 { } 968 }; 969 970 static const struct of_device_id dt_match[] = { 971 { .compatible = "qcom,mdss_mdp" }, 972 {} 973 }; 974 MODULE_DEVICE_TABLE(of, dt_match); 975 976 static struct platform_driver msm_platform_driver = { 977 .probe = msm_pdev_probe, 978 .remove = msm_pdev_remove, 979 .driver = { 980 .owner = THIS_MODULE, 981 .name = "msm", 982 .of_match_table = dt_match, 983 .pm = &msm_pm_ops, 984 }, 985 .id_table = msm_id, 986 }; 987 988 static int __init msm_drm_register(void) 989 { 990 DBG("init"); 991 hdmi_register(); 992 a3xx_register(); 993 return platform_driver_register(&msm_platform_driver); 994 } 995 996 static void __exit msm_drm_unregister(void) 997 { 998 DBG("fini"); 999 platform_driver_unregister(&msm_platform_driver); 1000 hdmi_unregister(); 1001 a3xx_unregister(); 1002 } 1003 1004 module_init(msm_drm_register); 1005 module_exit(msm_drm_unregister); 1006 1007 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com"); 1008 MODULE_DESCRIPTION("MSM DRM Driver"); 1009 MODULE_LICENSE("GPL"); 1010