1 /* 2 * Copyright (C) 2013 Red Hat 3 * Author: Rob Clark <robdclark@gmail.com> 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 as published by 7 * the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #include "msm_drv.h" 19 #include "msm_gpu.h" 20 #include "msm_kms.h" 21 22 static void msm_fb_output_poll_changed(struct drm_device *dev) 23 { 24 struct msm_drm_private *priv = dev->dev_private; 25 if (priv->fbdev) 26 drm_fb_helper_hotplug_event(priv->fbdev); 27 } 28 29 static const struct drm_mode_config_funcs mode_config_funcs = { 30 .fb_create = msm_framebuffer_create, 31 .output_poll_changed = msm_fb_output_poll_changed, 32 }; 33 34 int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu) 35 { 36 struct msm_drm_private *priv = dev->dev_private; 37 int idx = priv->num_mmus++; 38 39 if (WARN_ON(idx >= ARRAY_SIZE(priv->mmus))) 40 return -EINVAL; 41 42 priv->mmus[idx] = mmu; 43 44 return idx; 45 } 46 47 #ifdef CONFIG_DRM_MSM_REGISTER_LOGGING 48 static bool reglog = false; 49 MODULE_PARM_DESC(reglog, "Enable register read/write logging"); 50 module_param(reglog, bool, 0600); 51 #else 52 #define reglog 0 53 #endif 54 55 static char *vram = "16m"; 56 MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without IOMMU/GPUMMU"); 57 module_param(vram, charp, 0); 58 59 /* 60 * Util/helpers: 61 */ 62 63 void __iomem *msm_ioremap(struct platform_device *pdev, const char *name, 64 const char *dbgname) 65 { 66 struct resource *res; 67 unsigned long size; 68 void __iomem *ptr; 69 70 if (name) 71 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name); 72 else 73 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 74 75 if (!res) { 76 dev_err(&pdev->dev, "failed to get memory resource: %s\n", name); 77 return ERR_PTR(-EINVAL); 78 } 79 80 size = resource_size(res); 81 82 ptr = devm_ioremap_nocache(&pdev->dev, res->start, size); 83 if (!ptr) { 84 dev_err(&pdev->dev, "failed to ioremap: %s\n", name); 85 return ERR_PTR(-ENOMEM); 86 } 87 88 if (reglog) 89 printk(KERN_DEBUG "IO:region %s %08x %08lx\n", dbgname, (u32)ptr, size); 90 91 return ptr; 92 } 93 94 void msm_writel(u32 data, void __iomem *addr) 95 { 96 if (reglog) 97 printk(KERN_DEBUG "IO:W %08x %08x\n", (u32)addr, data); 98 writel(data, addr); 99 } 100 101 u32 msm_readl(const void __iomem *addr) 102 { 103 u32 val = readl(addr); 104 if (reglog) 105 printk(KERN_ERR "IO:R %08x %08x\n", (u32)addr, val); 106 return val; 107 } 108 109 /* 110 * DRM operations: 111 */ 112 113 static int msm_unload(struct drm_device *dev) 114 { 115 struct msm_drm_private *priv = dev->dev_private; 116 struct msm_kms *kms = priv->kms; 117 struct msm_gpu *gpu = priv->gpu; 118 119 drm_kms_helper_poll_fini(dev); 120 drm_mode_config_cleanup(dev); 121 drm_vblank_cleanup(dev); 122 123 pm_runtime_get_sync(dev->dev); 124 drm_irq_uninstall(dev); 125 pm_runtime_put_sync(dev->dev); 126 127 flush_workqueue(priv->wq); 128 destroy_workqueue(priv->wq); 129 130 if (kms) { 131 pm_runtime_disable(dev->dev); 132 kms->funcs->destroy(kms); 133 } 134 135 if (gpu) { 136 mutex_lock(&dev->struct_mutex); 137 gpu->funcs->pm_suspend(gpu); 138 gpu->funcs->destroy(gpu); 139 mutex_unlock(&dev->struct_mutex); 140 } 141 142 if (priv->vram.paddr) { 143 DEFINE_DMA_ATTRS(attrs); 144 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs); 145 drm_mm_takedown(&priv->vram.mm); 146 dma_free_attrs(dev->dev, priv->vram.size, NULL, 147 priv->vram.paddr, &attrs); 148 } 149 150 component_unbind_all(dev->dev, dev); 151 152 dev->dev_private = NULL; 153 154 kfree(priv); 155 156 return 0; 157 } 158 159 static int get_mdp_ver(struct platform_device *pdev) 160 { 161 #ifdef CONFIG_OF 162 static const struct of_device_id match_types[] = { { 163 .compatible = "qcom,mdss_mdp", 164 .data = (void *)5, 165 }, { 166 /* end node */ 167 } }; 168 struct device *dev = &pdev->dev; 169 const struct of_device_id *match; 170 match = of_match_node(match_types, dev->of_node); 171 if (match) 172 return (int)match->data; 173 #endif 174 return 4; 175 } 176 177 static int msm_load(struct drm_device *dev, unsigned long flags) 178 { 179 struct platform_device *pdev = dev->platformdev; 180 struct msm_drm_private *priv; 181 struct msm_kms *kms; 182 int ret; 183 184 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 185 if (!priv) { 186 dev_err(dev->dev, "failed to allocate private data\n"); 187 return -ENOMEM; 188 } 189 190 dev->dev_private = priv; 191 192 priv->wq = alloc_ordered_workqueue("msm", 0); 193 init_waitqueue_head(&priv->fence_event); 194 195 INIT_LIST_HEAD(&priv->inactive_list); 196 INIT_LIST_HEAD(&priv->fence_cbs); 197 198 drm_mode_config_init(dev); 199 200 /* if we have no IOMMU, then we need to use carveout allocator. 201 * Grab the entire CMA chunk carved out in early startup in 202 * mach-msm: 203 */ 204 if (!iommu_present(&platform_bus_type)) { 205 DEFINE_DMA_ATTRS(attrs); 206 unsigned long size; 207 void *p; 208 209 DBG("using %s VRAM carveout", vram); 210 size = memparse(vram, NULL); 211 priv->vram.size = size; 212 213 drm_mm_init(&priv->vram.mm, 0, (size >> PAGE_SHIFT) - 1); 214 215 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs); 216 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs); 217 218 /* note that for no-kernel-mapping, the vaddr returned 219 * is bogus, but non-null if allocation succeeded: 220 */ 221 p = dma_alloc_attrs(dev->dev, size, 222 &priv->vram.paddr, GFP_KERNEL, &attrs); 223 if (!p) { 224 dev_err(dev->dev, "failed to allocate VRAM\n"); 225 priv->vram.paddr = 0; 226 ret = -ENOMEM; 227 goto fail; 228 } 229 230 dev_info(dev->dev, "VRAM: %08x->%08x\n", 231 (uint32_t)priv->vram.paddr, 232 (uint32_t)(priv->vram.paddr + size)); 233 } 234 235 platform_set_drvdata(pdev, dev); 236 237 /* Bind all our sub-components: */ 238 ret = component_bind_all(dev->dev, dev); 239 if (ret) 240 return ret; 241 242 switch (get_mdp_ver(pdev)) { 243 case 4: 244 kms = mdp4_kms_init(dev); 245 break; 246 case 5: 247 kms = mdp5_kms_init(dev); 248 break; 249 default: 250 kms = ERR_PTR(-ENODEV); 251 break; 252 } 253 254 if (IS_ERR(kms)) { 255 /* 256 * NOTE: once we have GPU support, having no kms should not 257 * be considered fatal.. ideally we would still support gpu 258 * and (for example) use dmabuf/prime to share buffers with 259 * imx drm driver on iMX5 260 */ 261 dev_err(dev->dev, "failed to load kms\n"); 262 ret = PTR_ERR(kms); 263 goto fail; 264 } 265 266 priv->kms = kms; 267 268 if (kms) { 269 pm_runtime_enable(dev->dev); 270 ret = kms->funcs->hw_init(kms); 271 if (ret) { 272 dev_err(dev->dev, "kms hw init failed: %d\n", ret); 273 goto fail; 274 } 275 } 276 277 dev->mode_config.min_width = 0; 278 dev->mode_config.min_height = 0; 279 dev->mode_config.max_width = 2048; 280 dev->mode_config.max_height = 2048; 281 dev->mode_config.funcs = &mode_config_funcs; 282 283 ret = drm_vblank_init(dev, priv->num_crtcs); 284 if (ret < 0) { 285 dev_err(dev->dev, "failed to initialize vblank\n"); 286 goto fail; 287 } 288 289 pm_runtime_get_sync(dev->dev); 290 ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0)); 291 pm_runtime_put_sync(dev->dev); 292 if (ret < 0) { 293 dev_err(dev->dev, "failed to install IRQ handler\n"); 294 goto fail; 295 } 296 297 #ifdef CONFIG_DRM_MSM_FBDEV 298 priv->fbdev = msm_fbdev_init(dev); 299 #endif 300 301 ret = msm_debugfs_late_init(dev); 302 if (ret) 303 goto fail; 304 305 drm_kms_helper_poll_init(dev); 306 307 return 0; 308 309 fail: 310 msm_unload(dev); 311 return ret; 312 } 313 314 static void load_gpu(struct drm_device *dev) 315 { 316 static DEFINE_MUTEX(init_lock); 317 struct msm_drm_private *priv = dev->dev_private; 318 319 mutex_lock(&init_lock); 320 321 if (!priv->gpu) 322 priv->gpu = adreno_load_gpu(dev); 323 324 mutex_unlock(&init_lock); 325 } 326 327 static int msm_open(struct drm_device *dev, struct drm_file *file) 328 { 329 struct msm_file_private *ctx; 330 331 /* For now, load gpu on open.. to avoid the requirement of having 332 * firmware in the initrd. 333 */ 334 load_gpu(dev); 335 336 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); 337 if (!ctx) 338 return -ENOMEM; 339 340 file->driver_priv = ctx; 341 342 return 0; 343 } 344 345 static void msm_preclose(struct drm_device *dev, struct drm_file *file) 346 { 347 struct msm_drm_private *priv = dev->dev_private; 348 struct msm_file_private *ctx = file->driver_priv; 349 struct msm_kms *kms = priv->kms; 350 351 if (kms) 352 kms->funcs->preclose(kms, file); 353 354 mutex_lock(&dev->struct_mutex); 355 if (ctx == priv->lastctx) 356 priv->lastctx = NULL; 357 mutex_unlock(&dev->struct_mutex); 358 359 kfree(ctx); 360 } 361 362 static void msm_lastclose(struct drm_device *dev) 363 { 364 struct msm_drm_private *priv = dev->dev_private; 365 if (priv->fbdev) 366 drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev); 367 } 368 369 static irqreturn_t msm_irq(int irq, void *arg) 370 { 371 struct drm_device *dev = arg; 372 struct msm_drm_private *priv = dev->dev_private; 373 struct msm_kms *kms = priv->kms; 374 BUG_ON(!kms); 375 return kms->funcs->irq(kms); 376 } 377 378 static void msm_irq_preinstall(struct drm_device *dev) 379 { 380 struct msm_drm_private *priv = dev->dev_private; 381 struct msm_kms *kms = priv->kms; 382 BUG_ON(!kms); 383 kms->funcs->irq_preinstall(kms); 384 } 385 386 static int msm_irq_postinstall(struct drm_device *dev) 387 { 388 struct msm_drm_private *priv = dev->dev_private; 389 struct msm_kms *kms = priv->kms; 390 BUG_ON(!kms); 391 return kms->funcs->irq_postinstall(kms); 392 } 393 394 static void msm_irq_uninstall(struct drm_device *dev) 395 { 396 struct msm_drm_private *priv = dev->dev_private; 397 struct msm_kms *kms = priv->kms; 398 BUG_ON(!kms); 399 kms->funcs->irq_uninstall(kms); 400 } 401 402 static int msm_enable_vblank(struct drm_device *dev, int crtc_id) 403 { 404 struct msm_drm_private *priv = dev->dev_private; 405 struct msm_kms *kms = priv->kms; 406 if (!kms) 407 return -ENXIO; 408 DBG("dev=%p, crtc=%d", dev, crtc_id); 409 return kms->funcs->enable_vblank(kms, priv->crtcs[crtc_id]); 410 } 411 412 static void msm_disable_vblank(struct drm_device *dev, int crtc_id) 413 { 414 struct msm_drm_private *priv = dev->dev_private; 415 struct msm_kms *kms = priv->kms; 416 if (!kms) 417 return; 418 DBG("dev=%p, crtc=%d", dev, crtc_id); 419 kms->funcs->disable_vblank(kms, priv->crtcs[crtc_id]); 420 } 421 422 /* 423 * DRM debugfs: 424 */ 425 426 #ifdef CONFIG_DEBUG_FS 427 static int msm_gpu_show(struct drm_device *dev, struct seq_file *m) 428 { 429 struct msm_drm_private *priv = dev->dev_private; 430 struct msm_gpu *gpu = priv->gpu; 431 432 if (gpu) { 433 seq_printf(m, "%s Status:\n", gpu->name); 434 gpu->funcs->show(gpu, m); 435 } 436 437 return 0; 438 } 439 440 static int msm_gem_show(struct drm_device *dev, struct seq_file *m) 441 { 442 struct msm_drm_private *priv = dev->dev_private; 443 struct msm_gpu *gpu = priv->gpu; 444 445 if (gpu) { 446 seq_printf(m, "Active Objects (%s):\n", gpu->name); 447 msm_gem_describe_objects(&gpu->active_list, m); 448 } 449 450 seq_printf(m, "Inactive Objects:\n"); 451 msm_gem_describe_objects(&priv->inactive_list, m); 452 453 return 0; 454 } 455 456 static int msm_mm_show(struct drm_device *dev, struct seq_file *m) 457 { 458 return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm); 459 } 460 461 static int msm_fb_show(struct drm_device *dev, struct seq_file *m) 462 { 463 struct msm_drm_private *priv = dev->dev_private; 464 struct drm_framebuffer *fb, *fbdev_fb = NULL; 465 466 if (priv->fbdev) { 467 seq_printf(m, "fbcon "); 468 fbdev_fb = priv->fbdev->fb; 469 msm_framebuffer_describe(fbdev_fb, m); 470 } 471 472 mutex_lock(&dev->mode_config.fb_lock); 473 list_for_each_entry(fb, &dev->mode_config.fb_list, head) { 474 if (fb == fbdev_fb) 475 continue; 476 477 seq_printf(m, "user "); 478 msm_framebuffer_describe(fb, m); 479 } 480 mutex_unlock(&dev->mode_config.fb_lock); 481 482 return 0; 483 } 484 485 static int show_locked(struct seq_file *m, void *arg) 486 { 487 struct drm_info_node *node = (struct drm_info_node *) m->private; 488 struct drm_device *dev = node->minor->dev; 489 int (*show)(struct drm_device *dev, struct seq_file *m) = 490 node->info_ent->data; 491 int ret; 492 493 ret = mutex_lock_interruptible(&dev->struct_mutex); 494 if (ret) 495 return ret; 496 497 ret = show(dev, m); 498 499 mutex_unlock(&dev->struct_mutex); 500 501 return ret; 502 } 503 504 static struct drm_info_list msm_debugfs_list[] = { 505 {"gpu", show_locked, 0, msm_gpu_show}, 506 {"gem", show_locked, 0, msm_gem_show}, 507 { "mm", show_locked, 0, msm_mm_show }, 508 { "fb", show_locked, 0, msm_fb_show }, 509 }; 510 511 static int late_init_minor(struct drm_minor *minor) 512 { 513 int ret; 514 515 if (!minor) 516 return 0; 517 518 ret = msm_rd_debugfs_init(minor); 519 if (ret) { 520 dev_err(minor->dev->dev, "could not install rd debugfs\n"); 521 return ret; 522 } 523 524 ret = msm_perf_debugfs_init(minor); 525 if (ret) { 526 dev_err(minor->dev->dev, "could not install perf debugfs\n"); 527 return ret; 528 } 529 530 return 0; 531 } 532 533 int msm_debugfs_late_init(struct drm_device *dev) 534 { 535 int ret; 536 ret = late_init_minor(dev->primary); 537 if (ret) 538 return ret; 539 ret = late_init_minor(dev->render); 540 if (ret) 541 return ret; 542 ret = late_init_minor(dev->control); 543 return ret; 544 } 545 546 static int msm_debugfs_init(struct drm_minor *minor) 547 { 548 struct drm_device *dev = minor->dev; 549 int ret; 550 551 ret = drm_debugfs_create_files(msm_debugfs_list, 552 ARRAY_SIZE(msm_debugfs_list), 553 minor->debugfs_root, minor); 554 555 if (ret) { 556 dev_err(dev->dev, "could not install msm_debugfs_list\n"); 557 return ret; 558 } 559 560 return 0; 561 } 562 563 static void msm_debugfs_cleanup(struct drm_minor *minor) 564 { 565 drm_debugfs_remove_files(msm_debugfs_list, 566 ARRAY_SIZE(msm_debugfs_list), minor); 567 if (!minor->dev->dev_private) 568 return; 569 msm_rd_debugfs_cleanup(minor); 570 msm_perf_debugfs_cleanup(minor); 571 } 572 #endif 573 574 /* 575 * Fences: 576 */ 577 578 int msm_wait_fence_interruptable(struct drm_device *dev, uint32_t fence, 579 struct timespec *timeout) 580 { 581 struct msm_drm_private *priv = dev->dev_private; 582 int ret; 583 584 if (!priv->gpu) 585 return 0; 586 587 if (fence > priv->gpu->submitted_fence) { 588 DRM_ERROR("waiting on invalid fence: %u (of %u)\n", 589 fence, priv->gpu->submitted_fence); 590 return -EINVAL; 591 } 592 593 if (!timeout) { 594 /* no-wait: */ 595 ret = fence_completed(dev, fence) ? 0 : -EBUSY; 596 } else { 597 unsigned long timeout_jiffies = timespec_to_jiffies(timeout); 598 unsigned long start_jiffies = jiffies; 599 unsigned long remaining_jiffies; 600 601 if (time_after(start_jiffies, timeout_jiffies)) 602 remaining_jiffies = 0; 603 else 604 remaining_jiffies = timeout_jiffies - start_jiffies; 605 606 ret = wait_event_interruptible_timeout(priv->fence_event, 607 fence_completed(dev, fence), 608 remaining_jiffies); 609 610 if (ret == 0) { 611 DBG("timeout waiting for fence: %u (completed: %u)", 612 fence, priv->completed_fence); 613 ret = -ETIMEDOUT; 614 } else if (ret != -ERESTARTSYS) { 615 ret = 0; 616 } 617 } 618 619 return ret; 620 } 621 622 /* called from workqueue */ 623 void msm_update_fence(struct drm_device *dev, uint32_t fence) 624 { 625 struct msm_drm_private *priv = dev->dev_private; 626 627 mutex_lock(&dev->struct_mutex); 628 priv->completed_fence = max(fence, priv->completed_fence); 629 630 while (!list_empty(&priv->fence_cbs)) { 631 struct msm_fence_cb *cb; 632 633 cb = list_first_entry(&priv->fence_cbs, 634 struct msm_fence_cb, work.entry); 635 636 if (cb->fence > priv->completed_fence) 637 break; 638 639 list_del_init(&cb->work.entry); 640 queue_work(priv->wq, &cb->work); 641 } 642 643 mutex_unlock(&dev->struct_mutex); 644 645 wake_up_all(&priv->fence_event); 646 } 647 648 void __msm_fence_worker(struct work_struct *work) 649 { 650 struct msm_fence_cb *cb = container_of(work, struct msm_fence_cb, work); 651 cb->func(cb); 652 } 653 654 /* 655 * DRM ioctls: 656 */ 657 658 static int msm_ioctl_get_param(struct drm_device *dev, void *data, 659 struct drm_file *file) 660 { 661 struct msm_drm_private *priv = dev->dev_private; 662 struct drm_msm_param *args = data; 663 struct msm_gpu *gpu; 664 665 /* for now, we just have 3d pipe.. eventually this would need to 666 * be more clever to dispatch to appropriate gpu module: 667 */ 668 if (args->pipe != MSM_PIPE_3D0) 669 return -EINVAL; 670 671 gpu = priv->gpu; 672 673 if (!gpu) 674 return -ENXIO; 675 676 return gpu->funcs->get_param(gpu, args->param, &args->value); 677 } 678 679 static int msm_ioctl_gem_new(struct drm_device *dev, void *data, 680 struct drm_file *file) 681 { 682 struct drm_msm_gem_new *args = data; 683 684 if (args->flags & ~MSM_BO_FLAGS) { 685 DRM_ERROR("invalid flags: %08x\n", args->flags); 686 return -EINVAL; 687 } 688 689 return msm_gem_new_handle(dev, file, args->size, 690 args->flags, &args->handle); 691 } 692 693 #define TS(t) ((struct timespec){ .tv_sec = (t).tv_sec, .tv_nsec = (t).tv_nsec }) 694 695 static int msm_ioctl_gem_cpu_prep(struct drm_device *dev, void *data, 696 struct drm_file *file) 697 { 698 struct drm_msm_gem_cpu_prep *args = data; 699 struct drm_gem_object *obj; 700 int ret; 701 702 if (args->op & ~MSM_PREP_FLAGS) { 703 DRM_ERROR("invalid op: %08x\n", args->op); 704 return -EINVAL; 705 } 706 707 obj = drm_gem_object_lookup(dev, file, args->handle); 708 if (!obj) 709 return -ENOENT; 710 711 ret = msm_gem_cpu_prep(obj, args->op, &TS(args->timeout)); 712 713 drm_gem_object_unreference_unlocked(obj); 714 715 return ret; 716 } 717 718 static int msm_ioctl_gem_cpu_fini(struct drm_device *dev, void *data, 719 struct drm_file *file) 720 { 721 struct drm_msm_gem_cpu_fini *args = data; 722 struct drm_gem_object *obj; 723 int ret; 724 725 obj = drm_gem_object_lookup(dev, file, args->handle); 726 if (!obj) 727 return -ENOENT; 728 729 ret = msm_gem_cpu_fini(obj); 730 731 drm_gem_object_unreference_unlocked(obj); 732 733 return ret; 734 } 735 736 static int msm_ioctl_gem_info(struct drm_device *dev, void *data, 737 struct drm_file *file) 738 { 739 struct drm_msm_gem_info *args = data; 740 struct drm_gem_object *obj; 741 int ret = 0; 742 743 if (args->pad) 744 return -EINVAL; 745 746 obj = drm_gem_object_lookup(dev, file, args->handle); 747 if (!obj) 748 return -ENOENT; 749 750 args->offset = msm_gem_mmap_offset(obj); 751 752 drm_gem_object_unreference_unlocked(obj); 753 754 return ret; 755 } 756 757 static int msm_ioctl_wait_fence(struct drm_device *dev, void *data, 758 struct drm_file *file) 759 { 760 struct drm_msm_wait_fence *args = data; 761 762 if (args->pad) { 763 DRM_ERROR("invalid pad: %08x\n", args->pad); 764 return -EINVAL; 765 } 766 767 return msm_wait_fence_interruptable(dev, args->fence, 768 &TS(args->timeout)); 769 } 770 771 static const struct drm_ioctl_desc msm_ioctls[] = { 772 DRM_IOCTL_DEF_DRV(MSM_GET_PARAM, msm_ioctl_get_param, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), 773 DRM_IOCTL_DEF_DRV(MSM_GEM_NEW, msm_ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), 774 DRM_IOCTL_DEF_DRV(MSM_GEM_INFO, msm_ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), 775 DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), 776 DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), 777 DRM_IOCTL_DEF_DRV(MSM_GEM_SUBMIT, msm_ioctl_gem_submit, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), 778 DRM_IOCTL_DEF_DRV(MSM_WAIT_FENCE, msm_ioctl_wait_fence, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), 779 }; 780 781 static const struct vm_operations_struct vm_ops = { 782 .fault = msm_gem_fault, 783 .open = drm_gem_vm_open, 784 .close = drm_gem_vm_close, 785 }; 786 787 static const struct file_operations fops = { 788 .owner = THIS_MODULE, 789 .open = drm_open, 790 .release = drm_release, 791 .unlocked_ioctl = drm_ioctl, 792 #ifdef CONFIG_COMPAT 793 .compat_ioctl = drm_compat_ioctl, 794 #endif 795 .poll = drm_poll, 796 .read = drm_read, 797 .llseek = no_llseek, 798 .mmap = msm_gem_mmap, 799 }; 800 801 static struct drm_driver msm_driver = { 802 .driver_features = DRIVER_HAVE_IRQ | 803 DRIVER_GEM | 804 DRIVER_PRIME | 805 DRIVER_RENDER | 806 DRIVER_MODESET, 807 .load = msm_load, 808 .unload = msm_unload, 809 .open = msm_open, 810 .preclose = msm_preclose, 811 .lastclose = msm_lastclose, 812 .set_busid = drm_platform_set_busid, 813 .irq_handler = msm_irq, 814 .irq_preinstall = msm_irq_preinstall, 815 .irq_postinstall = msm_irq_postinstall, 816 .irq_uninstall = msm_irq_uninstall, 817 .get_vblank_counter = drm_vblank_count, 818 .enable_vblank = msm_enable_vblank, 819 .disable_vblank = msm_disable_vblank, 820 .gem_free_object = msm_gem_free_object, 821 .gem_vm_ops = &vm_ops, 822 .dumb_create = msm_gem_dumb_create, 823 .dumb_map_offset = msm_gem_dumb_map_offset, 824 .dumb_destroy = drm_gem_dumb_destroy, 825 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 826 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 827 .gem_prime_export = drm_gem_prime_export, 828 .gem_prime_import = drm_gem_prime_import, 829 .gem_prime_pin = msm_gem_prime_pin, 830 .gem_prime_unpin = msm_gem_prime_unpin, 831 .gem_prime_get_sg_table = msm_gem_prime_get_sg_table, 832 .gem_prime_import_sg_table = msm_gem_prime_import_sg_table, 833 .gem_prime_vmap = msm_gem_prime_vmap, 834 .gem_prime_vunmap = msm_gem_prime_vunmap, 835 #ifdef CONFIG_DEBUG_FS 836 .debugfs_init = msm_debugfs_init, 837 .debugfs_cleanup = msm_debugfs_cleanup, 838 #endif 839 .ioctls = msm_ioctls, 840 .num_ioctls = DRM_MSM_NUM_IOCTLS, 841 .fops = &fops, 842 .name = "msm", 843 .desc = "MSM Snapdragon DRM", 844 .date = "20130625", 845 .major = 1, 846 .minor = 0, 847 }; 848 849 #ifdef CONFIG_PM_SLEEP 850 static int msm_pm_suspend(struct device *dev) 851 { 852 struct drm_device *ddev = dev_get_drvdata(dev); 853 854 drm_kms_helper_poll_disable(ddev); 855 856 return 0; 857 } 858 859 static int msm_pm_resume(struct device *dev) 860 { 861 struct drm_device *ddev = dev_get_drvdata(dev); 862 863 drm_kms_helper_poll_enable(ddev); 864 865 return 0; 866 } 867 #endif 868 869 static const struct dev_pm_ops msm_pm_ops = { 870 SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume) 871 }; 872 873 /* 874 * Componentized driver support: 875 */ 876 877 #ifdef CONFIG_OF 878 /* NOTE: the CONFIG_OF case duplicates the same code as exynos or imx 879 * (or probably any other).. so probably some room for some helpers 880 */ 881 static int compare_of(struct device *dev, void *data) 882 { 883 return dev->of_node == data; 884 } 885 886 static int add_components(struct device *dev, struct component_match **matchptr, 887 const char *name) 888 { 889 struct device_node *np = dev->of_node; 890 unsigned i; 891 892 for (i = 0; ; i++) { 893 struct device_node *node; 894 895 node = of_parse_phandle(np, name, i); 896 if (!node) 897 break; 898 899 component_match_add(dev, matchptr, compare_of, node); 900 } 901 902 return 0; 903 } 904 #else 905 static int compare_dev(struct device *dev, void *data) 906 { 907 return dev == data; 908 } 909 #endif 910 911 static int msm_drm_bind(struct device *dev) 912 { 913 return drm_platform_init(&msm_driver, to_platform_device(dev)); 914 } 915 916 static void msm_drm_unbind(struct device *dev) 917 { 918 drm_put_dev(platform_get_drvdata(to_platform_device(dev))); 919 } 920 921 static const struct component_master_ops msm_drm_ops = { 922 .bind = msm_drm_bind, 923 .unbind = msm_drm_unbind, 924 }; 925 926 /* 927 * Platform driver: 928 */ 929 930 static int msm_pdev_probe(struct platform_device *pdev) 931 { 932 struct component_match *match = NULL; 933 #ifdef CONFIG_OF 934 add_components(&pdev->dev, &match, "connectors"); 935 add_components(&pdev->dev, &match, "gpus"); 936 #else 937 /* For non-DT case, it kinda sucks. We don't actually have a way 938 * to know whether or not we are waiting for certain devices (or if 939 * they are simply not present). But for non-DT we only need to 940 * care about apq8064/apq8060/etc (all mdp4/a3xx): 941 */ 942 static const char *devnames[] = { 943 "hdmi_msm.0", "kgsl-3d0.0", 944 }; 945 int i; 946 947 DBG("Adding components.."); 948 949 for (i = 0; i < ARRAY_SIZE(devnames); i++) { 950 struct device *dev; 951 952 dev = bus_find_device_by_name(&platform_bus_type, 953 NULL, devnames[i]); 954 if (!dev) { 955 dev_info(&pdev->dev, "still waiting for %s\n", devnames[i]); 956 return -EPROBE_DEFER; 957 } 958 959 component_match_add(&pdev->dev, &match, compare_dev, dev); 960 } 961 #endif 962 963 pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); 964 return component_master_add_with_match(&pdev->dev, &msm_drm_ops, match); 965 } 966 967 static int msm_pdev_remove(struct platform_device *pdev) 968 { 969 component_master_del(&pdev->dev, &msm_drm_ops); 970 971 return 0; 972 } 973 974 static const struct platform_device_id msm_id[] = { 975 { "mdp", 0 }, 976 { } 977 }; 978 979 static const struct of_device_id dt_match[] = { 980 { .compatible = "qcom,mdp" }, /* mdp4 */ 981 { .compatible = "qcom,mdss_mdp" }, /* mdp5 */ 982 {} 983 }; 984 MODULE_DEVICE_TABLE(of, dt_match); 985 986 static struct platform_driver msm_platform_driver = { 987 .probe = msm_pdev_probe, 988 .remove = msm_pdev_remove, 989 .driver = { 990 .owner = THIS_MODULE, 991 .name = "msm", 992 .of_match_table = dt_match, 993 .pm = &msm_pm_ops, 994 }, 995 .id_table = msm_id, 996 }; 997 998 static int __init msm_drm_register(void) 999 { 1000 DBG("init"); 1001 hdmi_register(); 1002 adreno_register(); 1003 return platform_driver_register(&msm_platform_driver); 1004 } 1005 1006 static void __exit msm_drm_unregister(void) 1007 { 1008 DBG("fini"); 1009 platform_driver_unregister(&msm_platform_driver); 1010 hdmi_unregister(); 1011 adreno_unregister(); 1012 } 1013 1014 module_init(msm_drm_register); 1015 module_exit(msm_drm_unregister); 1016 1017 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com"); 1018 MODULE_DESCRIPTION("MSM DRM Driver"); 1019 MODULE_LICENSE("GPL"); 1020