xref: /openbmc/linux/drivers/gpu/drm/msm/dsi/mmss_cc.xml.h (revision 77d84ff8)
1 #ifndef MMSS_CC_XML
2 #define MMSS_CC_XML
3 
4 /* Autogenerated file, DO NOT EDIT manually!
5 
6 This file was generated by the rules-ng-ng headergen tool in this git repository:
7 http://github.com/freedreno/envytools/
8 git clone https://github.com/freedreno/envytools.git
9 
10 The rules-ng-ng source files this header was generated from are:
11 - /home/robclark/src/freedreno/envytools/rnndb/msm.xml                 (    595 bytes, from 2013-07-05 19:21:12)
12 - /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml (   1453 bytes, from 2013-03-31 16:51:27)
13 - /home/robclark/src/freedreno/envytools/rnndb/mdp4/mdp4.xml           (  19332 bytes, from 2013-10-07 16:36:48)
14 - /home/robclark/src/freedreno/envytools/rnndb/dsi/dsi.xml             (  11712 bytes, from 2013-08-17 17:13:43)
15 - /home/robclark/src/freedreno/envytools/rnndb/dsi/sfpb.xml            (    344 bytes, from 2013-08-11 19:26:32)
16 - /home/robclark/src/freedreno/envytools/rnndb/dsi/mmss_cc.xml         (   1544 bytes, from 2013-08-16 19:17:05)
17 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/qfprom.xml         (    600 bytes, from 2013-07-05 19:21:12)
18 - /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml           (  19288 bytes, from 2013-08-11 18:14:15)
19 
20 Copyright (C) 2013 by the following authors:
21 - Rob Clark <robdclark@gmail.com> (robclark)
22 
23 Permission is hereby granted, free of charge, to any person obtaining
24 a copy of this software and associated documentation files (the
25 "Software"), to deal in the Software without restriction, including
26 without limitation the rights to use, copy, modify, merge, publish,
27 distribute, sublicense, and/or sell copies of the Software, and to
28 permit persons to whom the Software is furnished to do so, subject to
29 the following conditions:
30 
31 The above copyright notice and this permission notice (including the
32 next paragraph) shall be included in all copies or substantial
33 portions of the Software.
34 
35 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
37 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
38 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
39 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
40 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
41 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
42 */
43 
44 
45 enum mmss_cc_clk {
46 	CLK = 0,
47 	PCLK = 1,
48 };
49 
50 #define REG_MMSS_CC_AHB						0x00000008
51 
52 static inline uint32_t __offset_CLK(enum mmss_cc_clk idx)
53 {
54 	switch (idx) {
55 		case CLK: return 0x0000004c;
56 		case PCLK: return 0x00000130;
57 		default: return INVALID_IDX(idx);
58 	}
59 }
60 static inline uint32_t REG_MMSS_CC_CLK(enum mmss_cc_clk i0) { return 0x00000000 + __offset_CLK(i0); }
61 
62 static inline uint32_t REG_MMSS_CC_CLK_CC(enum mmss_cc_clk i0) { return 0x00000000 + __offset_CLK(i0); }
63 #define MMSS_CC_CLK_CC_CLK_EN					0x00000001
64 #define MMSS_CC_CLK_CC_ROOT_EN					0x00000004
65 #define MMSS_CC_CLK_CC_MND_EN					0x00000020
66 #define MMSS_CC_CLK_CC_MND_MODE__MASK				0x000000c0
67 #define MMSS_CC_CLK_CC_MND_MODE__SHIFT				6
68 static inline uint32_t MMSS_CC_CLK_CC_MND_MODE(uint32_t val)
69 {
70 	return ((val) << MMSS_CC_CLK_CC_MND_MODE__SHIFT) & MMSS_CC_CLK_CC_MND_MODE__MASK;
71 }
72 #define MMSS_CC_CLK_CC_PMXO_SEL__MASK				0x00000300
73 #define MMSS_CC_CLK_CC_PMXO_SEL__SHIFT				8
74 static inline uint32_t MMSS_CC_CLK_CC_PMXO_SEL(uint32_t val)
75 {
76 	return ((val) << MMSS_CC_CLK_CC_PMXO_SEL__SHIFT) & MMSS_CC_CLK_CC_PMXO_SEL__MASK;
77 }
78 
79 static inline uint32_t REG_MMSS_CC_CLK_MD(enum mmss_cc_clk i0) { return 0x00000004 + __offset_CLK(i0); }
80 #define MMSS_CC_CLK_MD_D__MASK					0x000000ff
81 #define MMSS_CC_CLK_MD_D__SHIFT					0
82 static inline uint32_t MMSS_CC_CLK_MD_D(uint32_t val)
83 {
84 	return ((val) << MMSS_CC_CLK_MD_D__SHIFT) & MMSS_CC_CLK_MD_D__MASK;
85 }
86 #define MMSS_CC_CLK_MD_M__MASK					0x0000ff00
87 #define MMSS_CC_CLK_MD_M__SHIFT					8
88 static inline uint32_t MMSS_CC_CLK_MD_M(uint32_t val)
89 {
90 	return ((val) << MMSS_CC_CLK_MD_M__SHIFT) & MMSS_CC_CLK_MD_M__MASK;
91 }
92 
93 static inline uint32_t REG_MMSS_CC_CLK_NS(enum mmss_cc_clk i0) { return 0x00000008 + __offset_CLK(i0); }
94 #define MMSS_CC_CLK_NS_SRC__MASK				0x0000000f
95 #define MMSS_CC_CLK_NS_SRC__SHIFT				0
96 static inline uint32_t MMSS_CC_CLK_NS_SRC(uint32_t val)
97 {
98 	return ((val) << MMSS_CC_CLK_NS_SRC__SHIFT) & MMSS_CC_CLK_NS_SRC__MASK;
99 }
100 #define MMSS_CC_CLK_NS_PRE_DIV_FUNC__MASK			0x00fff000
101 #define MMSS_CC_CLK_NS_PRE_DIV_FUNC__SHIFT			12
102 static inline uint32_t MMSS_CC_CLK_NS_PRE_DIV_FUNC(uint32_t val)
103 {
104 	return ((val) << MMSS_CC_CLK_NS_PRE_DIV_FUNC__SHIFT) & MMSS_CC_CLK_NS_PRE_DIV_FUNC__MASK;
105 }
106 #define MMSS_CC_CLK_NS_VAL__MASK				0xff000000
107 #define MMSS_CC_CLK_NS_VAL__SHIFT				24
108 static inline uint32_t MMSS_CC_CLK_NS_VAL(uint32_t val)
109 {
110 	return ((val) << MMSS_CC_CLK_NS_VAL__SHIFT) & MMSS_CC_CLK_NS_VAL__MASK;
111 }
112 
113 
114 #endif /* MMSS_CC_XML */
115