1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2015, The Linux Foundation. All rights reserved. 4 */ 5 6 #include "dsi_cfg.h" 7 8 static const char * const dsi_v2_bus_clk_names[] = { 9 "core_mmss", "iface", "bus", 10 }; 11 12 static const struct regulator_bulk_data apq8064_dsi_regulators[] = { 13 { .supply = "vdda", .init_load_uA = 100000 }, /* 1.2 V */ 14 { .supply = "avdd", .init_load_uA = 10000 }, /* 3.0 V */ 15 { .supply = "vddio", .init_load_uA = 100000 }, /* 1.8 V */ 16 }; 17 18 static const struct msm_dsi_config apq8064_dsi_cfg = { 19 .io_offset = 0, 20 .regulator_data = apq8064_dsi_regulators, 21 .num_regulators = ARRAY_SIZE(apq8064_dsi_regulators), 22 .bus_clk_names = dsi_v2_bus_clk_names, 23 .num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names), 24 .io_start = { 25 { 0x4700000, 0x5800000 }, 26 }, 27 }; 28 29 static const char * const dsi_6g_bus_clk_names[] = { 30 "mdp_core", "iface", "bus", "core_mmss", 31 }; 32 33 static const struct regulator_bulk_data msm8974_apq8084_regulators[] = { 34 { .supply = "vdd", .init_load_uA = 150000 }, /* 3.0 V */ 35 { .supply = "vdda", .init_load_uA = 100000 }, /* 1.2 V */ 36 { .supply = "vddio", .init_load_uA = 100000 }, /* 1.8 V */ 37 }; 38 39 static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = { 40 .io_offset = DSI_6G_REG_SHIFT, 41 .regulator_data = msm8974_apq8084_regulators, 42 .num_regulators = ARRAY_SIZE(msm8974_apq8084_regulators), 43 .bus_clk_names = dsi_6g_bus_clk_names, 44 .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names), 45 .io_start = { 46 { 0xfd922800, 0xfd922b00 }, 47 }, 48 }; 49 50 static const char * const dsi_8916_bus_clk_names[] = { 51 "mdp_core", "iface", "bus", 52 }; 53 54 static const struct regulator_bulk_data msm8916_dsi_regulators[] = { 55 { .supply = "vdda", .init_load_uA = 100000 }, /* 1.2 V */ 56 { .supply = "vddio", .init_load_uA = 100000 }, /* 1.8 V */ 57 }; 58 59 static const struct msm_dsi_config msm8916_dsi_cfg = { 60 .io_offset = DSI_6G_REG_SHIFT, 61 .regulator_data = msm8916_dsi_regulators, 62 .num_regulators = ARRAY_SIZE(msm8916_dsi_regulators), 63 .bus_clk_names = dsi_8916_bus_clk_names, 64 .num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names), 65 .io_start = { 66 { 0x1a98000 }, 67 }, 68 }; 69 70 static const char * const dsi_8976_bus_clk_names[] = { 71 "mdp_core", "iface", "bus", 72 }; 73 74 static const struct regulator_bulk_data msm8976_dsi_regulators[] = { 75 { .supply = "vdda", .init_load_uA = 100000 }, /* 1.2 V */ 76 { .supply = "vddio", .init_load_uA = 100000 }, /* 1.8 V */ 77 }; 78 79 static const struct msm_dsi_config msm8976_dsi_cfg = { 80 .io_offset = DSI_6G_REG_SHIFT, 81 .regulator_data = msm8976_dsi_regulators, 82 .num_regulators = ARRAY_SIZE(msm8976_dsi_regulators), 83 .bus_clk_names = dsi_8976_bus_clk_names, 84 .num_bus_clks = ARRAY_SIZE(dsi_8976_bus_clk_names), 85 .io_start = { 86 { 0x1a94000, 0x1a96000 }, 87 }, 88 }; 89 90 static const struct regulator_bulk_data msm8994_dsi_regulators[] = { 91 { .supply = "vdda", .init_load_uA = 100000 }, /* 1.25 V */ 92 { .supply = "vddio", .init_load_uA = 100000 }, /* 1.8 V */ 93 { .supply = "vcca", .init_load_uA = 10000 }, /* 1.0 V */ 94 { .supply = "vdd", .init_load_uA = 100000 }, /* 1.8 V */ 95 { .supply = "lab_reg", .init_load_uA = -1 }, 96 { .supply = "ibb_reg", .init_load_uA = -1 }, 97 }; 98 99 static const struct msm_dsi_config msm8994_dsi_cfg = { 100 .io_offset = DSI_6G_REG_SHIFT, 101 .regulator_data = msm8994_dsi_regulators, 102 .num_regulators = ARRAY_SIZE(msm8994_dsi_regulators), 103 .bus_clk_names = dsi_6g_bus_clk_names, 104 .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names), 105 .io_start = { 106 { 0xfd998000, 0xfd9a0000 }, 107 }, 108 }; 109 110 static const char * const dsi_8996_bus_clk_names[] = { 111 "mdp_core", "iface", "bus", "core_mmss", 112 }; 113 114 static const struct regulator_bulk_data msm8996_dsi_regulators[] = { 115 { .supply = "vdda", .init_load_uA = 18160 }, /* 1.25 V */ 116 { .supply = "vcca", .init_load_uA = 17000 }, /* 0.925 V */ 117 { .supply = "vddio", .init_load_uA = 100000 }, /* 1.8 V */ 118 }; 119 120 static const struct msm_dsi_config msm8996_dsi_cfg = { 121 .io_offset = DSI_6G_REG_SHIFT, 122 .regulator_data = msm8996_dsi_regulators, 123 .num_regulators = ARRAY_SIZE(msm8996_dsi_regulators), 124 .bus_clk_names = dsi_8996_bus_clk_names, 125 .num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names), 126 .io_start = { 127 { 0x994000, 0x996000 }, 128 }, 129 }; 130 131 static const char * const dsi_msm8998_bus_clk_names[] = { 132 "iface", "bus", "core", 133 }; 134 135 static const struct regulator_bulk_data msm8998_dsi_regulators[] = { 136 { .supply = "vdd", .init_load_uA = 367000 }, /* 0.9 V */ 137 { .supply = "vdda", .init_load_uA = 62800 }, /* 1.2 V */ 138 }; 139 140 static const struct msm_dsi_config msm8998_dsi_cfg = { 141 .io_offset = DSI_6G_REG_SHIFT, 142 .regulator_data = msm8998_dsi_regulators, 143 .num_regulators = ARRAY_SIZE(msm8998_dsi_regulators), 144 .bus_clk_names = dsi_msm8998_bus_clk_names, 145 .num_bus_clks = ARRAY_SIZE(dsi_msm8998_bus_clk_names), 146 .io_start = { 147 { 0xc994000, 0xc996000 }, 148 }, 149 }; 150 151 static const char * const dsi_sdm660_bus_clk_names[] = { 152 "iface", "bus", "core", "core_mmss", 153 }; 154 155 static const struct regulator_bulk_data sdm660_dsi_regulators[] = { 156 { .supply = "vdda", .init_load_uA = 12560 }, /* 1.2 V */ 157 }; 158 159 static const struct msm_dsi_config sdm660_dsi_cfg = { 160 .io_offset = DSI_6G_REG_SHIFT, 161 .regulator_data = sdm660_dsi_regulators, 162 .num_regulators = ARRAY_SIZE(sdm660_dsi_regulators), 163 .bus_clk_names = dsi_sdm660_bus_clk_names, 164 .num_bus_clks = ARRAY_SIZE(dsi_sdm660_bus_clk_names), 165 .io_start = { 166 { 0xc994000, 0xc996000 }, 167 }, 168 }; 169 170 static const char * const dsi_sdm845_bus_clk_names[] = { 171 "iface", "bus", 172 }; 173 174 static const char * const dsi_sc7180_bus_clk_names[] = { 175 "iface", "bus", 176 }; 177 178 static const struct regulator_bulk_data sdm845_dsi_regulators[] = { 179 { .supply = "vdda", .init_load_uA = 21800 }, /* 1.2 V */ 180 }; 181 182 static const struct msm_dsi_config sdm845_dsi_cfg = { 183 .io_offset = DSI_6G_REG_SHIFT, 184 .regulator_data = sdm845_dsi_regulators, 185 .num_regulators = ARRAY_SIZE(sdm845_dsi_regulators), 186 .bus_clk_names = dsi_sdm845_bus_clk_names, 187 .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names), 188 .io_start = { 189 { 0xae94000, 0xae96000 }, 190 }, 191 }; 192 193 static const struct regulator_bulk_data sm8550_dsi_regulators[] = { 194 { .supply = "vdda", .init_load_uA = 16800 }, /* 1.2 V */ 195 }; 196 197 static const struct msm_dsi_config sm8550_dsi_cfg = { 198 .io_offset = DSI_6G_REG_SHIFT, 199 .regulator_data = sm8550_dsi_regulators, 200 .num_regulators = ARRAY_SIZE(sm8550_dsi_regulators), 201 .bus_clk_names = dsi_sdm845_bus_clk_names, 202 .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names), 203 .io_start = { 204 { 0xae94000, 0xae96000 }, 205 }, 206 }; 207 208 static const struct regulator_bulk_data sc7180_dsi_regulators[] = { 209 { .supply = "vdda", .init_load_uA = 21800 }, /* 1.2 V */ 210 }; 211 212 static const struct msm_dsi_config sc7180_dsi_cfg = { 213 .io_offset = DSI_6G_REG_SHIFT, 214 .regulator_data = sc7180_dsi_regulators, 215 .num_regulators = ARRAY_SIZE(sc7180_dsi_regulators), 216 .bus_clk_names = dsi_sc7180_bus_clk_names, 217 .num_bus_clks = ARRAY_SIZE(dsi_sc7180_bus_clk_names), 218 .io_start = { 219 { 0xae94000 }, 220 }, 221 }; 222 223 static const char * const dsi_sc7280_bus_clk_names[] = { 224 "iface", "bus", 225 }; 226 227 static const struct regulator_bulk_data sc7280_dsi_regulators[] = { 228 { .supply = "vdda", .init_load_uA = 8350 }, /* 1.2 V */ 229 }; 230 231 static const struct msm_dsi_config sc7280_dsi_cfg = { 232 .io_offset = DSI_6G_REG_SHIFT, 233 .regulator_data = sc7280_dsi_regulators, 234 .num_regulators = ARRAY_SIZE(sc7280_dsi_regulators), 235 .bus_clk_names = dsi_sc7280_bus_clk_names, 236 .num_bus_clks = ARRAY_SIZE(dsi_sc7280_bus_clk_names), 237 .io_start = { 238 { 0xae94000, 0xae96000 }, 239 }, 240 }; 241 242 static const char * const dsi_qcm2290_bus_clk_names[] = { 243 "iface", "bus", 244 }; 245 246 static const struct regulator_bulk_data qcm2290_dsi_cfg_regulators[] = { 247 { .supply = "vdda", .init_load_uA = 21800 }, /* 1.2 V */ 248 }; 249 250 static const struct msm_dsi_config qcm2290_dsi_cfg = { 251 .io_offset = DSI_6G_REG_SHIFT, 252 .regulator_data = qcm2290_dsi_cfg_regulators, 253 .num_regulators = ARRAY_SIZE(qcm2290_dsi_cfg_regulators), 254 .bus_clk_names = dsi_qcm2290_bus_clk_names, 255 .num_bus_clks = ARRAY_SIZE(dsi_qcm2290_bus_clk_names), 256 .io_start = { 257 { 0x5e94000 }, 258 }, 259 }; 260 261 static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = { 262 .link_clk_set_rate = dsi_link_clk_set_rate_v2, 263 .link_clk_enable = dsi_link_clk_enable_v2, 264 .link_clk_disable = dsi_link_clk_disable_v2, 265 .clk_init_ver = dsi_clk_init_v2, 266 .tx_buf_alloc = dsi_tx_buf_alloc_v2, 267 .tx_buf_get = dsi_tx_buf_get_v2, 268 .tx_buf_put = NULL, 269 .dma_base_get = dsi_dma_base_get_v2, 270 .calc_clk_rate = dsi_calc_clk_rate_v2, 271 }; 272 273 static const struct msm_dsi_host_cfg_ops msm_dsi_6g_host_ops = { 274 .link_clk_set_rate = dsi_link_clk_set_rate_6g, 275 .link_clk_enable = dsi_link_clk_enable_6g, 276 .link_clk_disable = dsi_link_clk_disable_6g, 277 .clk_init_ver = NULL, 278 .tx_buf_alloc = dsi_tx_buf_alloc_6g, 279 .tx_buf_get = dsi_tx_buf_get_6g, 280 .tx_buf_put = dsi_tx_buf_put_6g, 281 .dma_base_get = dsi_dma_base_get_6g, 282 .calc_clk_rate = dsi_calc_clk_rate_6g, 283 }; 284 285 static const struct msm_dsi_host_cfg_ops msm_dsi_6g_v2_host_ops = { 286 .link_clk_set_rate = dsi_link_clk_set_rate_6g, 287 .link_clk_enable = dsi_link_clk_enable_6g, 288 .link_clk_disable = dsi_link_clk_disable_6g, 289 .clk_init_ver = dsi_clk_init_6g_v2, 290 .tx_buf_alloc = dsi_tx_buf_alloc_6g, 291 .tx_buf_get = dsi_tx_buf_get_6g, 292 .tx_buf_put = dsi_tx_buf_put_6g, 293 .dma_base_get = dsi_dma_base_get_6g, 294 .calc_clk_rate = dsi_calc_clk_rate_6g, 295 }; 296 297 static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = { 298 {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064, 299 &apq8064_dsi_cfg, &msm_dsi_v2_host_ops}, 300 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0, 301 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 302 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1, 303 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 304 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1, 305 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 306 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2, 307 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 308 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3, 309 &msm8994_dsi_cfg, &msm_dsi_6g_host_ops}, 310 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1, 311 &msm8916_dsi_cfg, &msm_dsi_6g_host_ops}, 312 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1, 313 &msm8996_dsi_cfg, &msm_dsi_6g_host_ops}, 314 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_2, 315 &msm8976_dsi_cfg, &msm_dsi_6g_host_ops}, 316 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_1_0, 317 &sdm660_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 318 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_0, 319 &msm8998_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 320 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1, 321 &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 322 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_3_0, 323 &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 324 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_0, 325 &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 326 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_1, 327 &sc7180_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 328 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_5_0, 329 &sc7280_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 330 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_6_0, 331 &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 332 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_7_0, 333 &sm8550_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 334 }; 335 336 const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor) 337 { 338 const struct msm_dsi_cfg_handler *cfg_hnd = NULL; 339 int i; 340 341 for (i = ARRAY_SIZE(dsi_cfg_handlers) - 1; i >= 0; i--) { 342 if ((dsi_cfg_handlers[i].major == major) && 343 (dsi_cfg_handlers[i].minor == minor)) { 344 cfg_hnd = &dsi_cfg_handlers[i]; 345 break; 346 } 347 } 348 349 return cfg_hnd; 350 } 351 352 /* Non autodetect configs */ 353 const struct msm_dsi_cfg_handler qcm2290_dsi_cfg_handler = { 354 .cfg = &qcm2290_dsi_cfg, 355 .ops = &msm_dsi_6g_v2_host_ops, 356 }; 357