1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2015, The Linux Foundation. All rights reserved. 4 */ 5 6 #include "dsi_cfg.h" 7 8 static const char * const dsi_v2_bus_clk_names[] = { 9 "core_mmss", "iface", "bus", 10 }; 11 12 static const struct msm_dsi_config apq8064_dsi_cfg = { 13 .io_offset = 0, 14 .reg_cfg = { 15 .num = 3, 16 .regs = { 17 {"vdda", 100000, 100}, /* 1.2 V */ 18 {"avdd", 10000, 100}, /* 3.0 V */ 19 {"vddio", 100000, 100}, /* 1.8 V */ 20 }, 21 }, 22 .bus_clk_names = dsi_v2_bus_clk_names, 23 .num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names), 24 .io_start = { 0x4700000, 0x5800000 }, 25 .num_dsi = 2, 26 }; 27 28 static const char * const dsi_6g_bus_clk_names[] = { 29 "mdp_core", "iface", "bus", "core_mmss", 30 }; 31 32 static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = { 33 .io_offset = DSI_6G_REG_SHIFT, 34 .reg_cfg = { 35 .num = 3, 36 .regs = { 37 {"vdd", 150000, 100}, /* 3.0 V */ 38 {"vdda", 100000, 100}, /* 1.2 V */ 39 {"vddio", 100000, 100}, /* 1.8 V */ 40 }, 41 }, 42 .bus_clk_names = dsi_6g_bus_clk_names, 43 .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names), 44 .io_start = { 0xfd922800, 0xfd922b00 }, 45 .num_dsi = 2, 46 }; 47 48 static const char * const dsi_8916_bus_clk_names[] = { 49 "mdp_core", "iface", "bus", 50 }; 51 52 static const struct msm_dsi_config msm8916_dsi_cfg = { 53 .io_offset = DSI_6G_REG_SHIFT, 54 .reg_cfg = { 55 .num = 2, 56 .regs = { 57 {"vdda", 100000, 100}, /* 1.2 V */ 58 {"vddio", 100000, 100}, /* 1.8 V */ 59 }, 60 }, 61 .bus_clk_names = dsi_8916_bus_clk_names, 62 .num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names), 63 .io_start = { 0x1a98000 }, 64 .num_dsi = 1, 65 }; 66 67 static const char * const dsi_8976_bus_clk_names[] = { 68 "mdp_core", "iface", "bus", 69 }; 70 71 static const struct msm_dsi_config msm8976_dsi_cfg = { 72 .io_offset = DSI_6G_REG_SHIFT, 73 .reg_cfg = { 74 .num = 2, 75 .regs = { 76 {"vdda", 100000, 100}, /* 1.2 V */ 77 {"vddio", 100000, 100}, /* 1.8 V */ 78 }, 79 }, 80 .bus_clk_names = dsi_8976_bus_clk_names, 81 .num_bus_clks = ARRAY_SIZE(dsi_8976_bus_clk_names), 82 .io_start = { 0x1a94000, 0x1a96000 }, 83 .num_dsi = 2, 84 }; 85 86 static const struct msm_dsi_config msm8994_dsi_cfg = { 87 .io_offset = DSI_6G_REG_SHIFT, 88 .reg_cfg = { 89 .num = 6, 90 .regs = { 91 {"vdda", 100000, 100}, /* 1.25 V */ 92 {"vddio", 100000, 100}, /* 1.8 V */ 93 {"vcca", 10000, 100}, /* 1.0 V */ 94 {"vdd", 100000, 100}, /* 1.8 V */ 95 {"lab_reg", -1, -1}, 96 {"ibb_reg", -1, -1}, 97 }, 98 }, 99 .bus_clk_names = dsi_6g_bus_clk_names, 100 .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names), 101 .io_start = { 0xfd998000, 0xfd9a0000 }, 102 .num_dsi = 2, 103 }; 104 105 static const char * const dsi_8996_bus_clk_names[] = { 106 "mdp_core", "iface", "bus", "core_mmss", 107 }; 108 109 static const struct msm_dsi_config msm8996_dsi_cfg = { 110 .io_offset = DSI_6G_REG_SHIFT, 111 .reg_cfg = { 112 .num = 2, 113 .regs = { 114 {"vdda", 18160, 1 }, /* 1.25 V */ 115 {"vcca", 17000, 32 }, /* 0.925 V */ 116 {"vddio", 100000, 100 },/* 1.8 V */ 117 }, 118 }, 119 .bus_clk_names = dsi_8996_bus_clk_names, 120 .num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names), 121 .io_start = { 0x994000, 0x996000 }, 122 .num_dsi = 2, 123 }; 124 125 static const char * const dsi_msm8998_bus_clk_names[] = { 126 "iface", "bus", "core", 127 }; 128 129 static const struct msm_dsi_config msm8998_dsi_cfg = { 130 .io_offset = DSI_6G_REG_SHIFT, 131 .reg_cfg = { 132 .num = 2, 133 .regs = { 134 {"vdd", 367000, 16 }, /* 0.9 V */ 135 {"vdda", 62800, 2 }, /* 1.2 V */ 136 }, 137 }, 138 .bus_clk_names = dsi_msm8998_bus_clk_names, 139 .num_bus_clks = ARRAY_SIZE(dsi_msm8998_bus_clk_names), 140 .io_start = { 0xc994000, 0xc996000 }, 141 .num_dsi = 2, 142 }; 143 144 static const char * const dsi_sdm660_bus_clk_names[] = { 145 "iface", "bus", "core", "core_mmss", 146 }; 147 148 static const struct msm_dsi_config sdm660_dsi_cfg = { 149 .io_offset = DSI_6G_REG_SHIFT, 150 .reg_cfg = { 151 .num = 2, 152 .regs = { 153 {"vdd", 73400, 32 }, /* 0.9 V */ 154 {"vdda", 12560, 4 }, /* 1.2 V */ 155 }, 156 }, 157 .bus_clk_names = dsi_sdm660_bus_clk_names, 158 .num_bus_clks = ARRAY_SIZE(dsi_sdm660_bus_clk_names), 159 .io_start = { 0xc994000, 0xc996000 }, 160 .num_dsi = 2, 161 }; 162 163 static const char * const dsi_sdm845_bus_clk_names[] = { 164 "iface", "bus", 165 }; 166 167 static const char * const dsi_sc7180_bus_clk_names[] = { 168 "iface", "bus", 169 }; 170 171 static const struct msm_dsi_config sdm845_dsi_cfg = { 172 .io_offset = DSI_6G_REG_SHIFT, 173 .reg_cfg = { 174 .num = 1, 175 .regs = { 176 {"vdda", 21800, 4 }, /* 1.2 V */ 177 }, 178 }, 179 .bus_clk_names = dsi_sdm845_bus_clk_names, 180 .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names), 181 .io_start = { 0xae94000, 0xae96000 }, 182 .num_dsi = 2, 183 }; 184 185 static const struct msm_dsi_config sc7180_dsi_cfg = { 186 .io_offset = DSI_6G_REG_SHIFT, 187 .reg_cfg = { 188 .num = 1, 189 .regs = { 190 {"vdda", 21800, 4 }, /* 1.2 V */ 191 }, 192 }, 193 .bus_clk_names = dsi_sc7180_bus_clk_names, 194 .num_bus_clks = ARRAY_SIZE(dsi_sc7180_bus_clk_names), 195 .io_start = { 0xae94000 }, 196 .num_dsi = 1, 197 }; 198 199 static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = { 200 .link_clk_set_rate = dsi_link_clk_set_rate_v2, 201 .link_clk_enable = dsi_link_clk_enable_v2, 202 .link_clk_disable = dsi_link_clk_disable_v2, 203 .clk_init_ver = dsi_clk_init_v2, 204 .tx_buf_alloc = dsi_tx_buf_alloc_v2, 205 .tx_buf_get = dsi_tx_buf_get_v2, 206 .tx_buf_put = NULL, 207 .dma_base_get = dsi_dma_base_get_v2, 208 .calc_clk_rate = dsi_calc_clk_rate_v2, 209 }; 210 211 static const struct msm_dsi_host_cfg_ops msm_dsi_6g_host_ops = { 212 .link_clk_set_rate = dsi_link_clk_set_rate_6g, 213 .link_clk_enable = dsi_link_clk_enable_6g, 214 .link_clk_disable = dsi_link_clk_disable_6g, 215 .clk_init_ver = NULL, 216 .tx_buf_alloc = dsi_tx_buf_alloc_6g, 217 .tx_buf_get = dsi_tx_buf_get_6g, 218 .tx_buf_put = dsi_tx_buf_put_6g, 219 .dma_base_get = dsi_dma_base_get_6g, 220 .calc_clk_rate = dsi_calc_clk_rate_6g, 221 }; 222 223 static const struct msm_dsi_host_cfg_ops msm_dsi_6g_v2_host_ops = { 224 .link_clk_set_rate = dsi_link_clk_set_rate_6g, 225 .link_clk_enable = dsi_link_clk_enable_6g, 226 .link_clk_disable = dsi_link_clk_disable_6g, 227 .clk_init_ver = dsi_clk_init_6g_v2, 228 .tx_buf_alloc = dsi_tx_buf_alloc_6g, 229 .tx_buf_get = dsi_tx_buf_get_6g, 230 .tx_buf_put = dsi_tx_buf_put_6g, 231 .dma_base_get = dsi_dma_base_get_6g, 232 .calc_clk_rate = dsi_calc_clk_rate_6g, 233 }; 234 235 static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = { 236 {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064, 237 &apq8064_dsi_cfg, &msm_dsi_v2_host_ops}, 238 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0, 239 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 240 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1, 241 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 242 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1, 243 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 244 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2, 245 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 246 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3, 247 &msm8994_dsi_cfg, &msm_dsi_6g_host_ops}, 248 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1, 249 &msm8916_dsi_cfg, &msm_dsi_6g_host_ops}, 250 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1, 251 &msm8996_dsi_cfg, &msm_dsi_6g_host_ops}, 252 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_2, 253 &msm8976_dsi_cfg, &msm_dsi_6g_host_ops}, 254 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_1_0, 255 &sdm660_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 256 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_0, 257 &msm8998_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 258 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1, 259 &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 260 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_3_0, 261 &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 262 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_0, 263 &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 264 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_1, 265 &sc7180_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 266 }; 267 268 const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor) 269 { 270 const struct msm_dsi_cfg_handler *cfg_hnd = NULL; 271 int i; 272 273 for (i = ARRAY_SIZE(dsi_cfg_handlers) - 1; i >= 0; i--) { 274 if ((dsi_cfg_handlers[i].major == major) && 275 (dsi_cfg_handlers[i].minor == minor)) { 276 cfg_hnd = &dsi_cfg_handlers[i]; 277 break; 278 } 279 } 280 281 return cfg_hnd; 282 } 283 284