1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2015, The Linux Foundation. All rights reserved. 4 */ 5 6 #include "dsi_cfg.h" 7 8 static const char * const dsi_v2_bus_clk_names[] = { 9 "core_mmss", "iface", "bus", 10 }; 11 12 static const struct regulator_bulk_data apq8064_dsi_regulators[] = { 13 { .supply = "vdda", .init_load_uA = 100000 }, /* 1.2 V */ 14 { .supply = "avdd", .init_load_uA = 10000 }, /* 3.0 V */ 15 { .supply = "vddio", .init_load_uA = 100000 }, /* 1.8 V */ 16 }; 17 18 static const struct msm_dsi_config apq8064_dsi_cfg = { 19 .io_offset = 0, 20 .regulator_data = apq8064_dsi_regulators, 21 .num_regulators = ARRAY_SIZE(apq8064_dsi_regulators), 22 .bus_clk_names = dsi_v2_bus_clk_names, 23 .num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names), 24 .io_start = { 0x4700000, 0x5800000 }, 25 .num_dsi = 2, 26 }; 27 28 static const char * const dsi_6g_bus_clk_names[] = { 29 "mdp_core", "iface", "bus", "core_mmss", 30 }; 31 32 static const struct regulator_bulk_data msm8974_apq8084_regulators[] = { 33 { .supply = "vdd", .init_load_uA = 150000 }, /* 3.0 V */ 34 { .supply = "vdda", .init_load_uA = 100000 }, /* 1.2 V */ 35 { .supply = "vddio", .init_load_uA = 100000 }, /* 1.8 V */ 36 }; 37 38 static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = { 39 .io_offset = DSI_6G_REG_SHIFT, 40 .regulator_data = msm8974_apq8084_regulators, 41 .num_regulators = ARRAY_SIZE(msm8974_apq8084_regulators), 42 .bus_clk_names = dsi_6g_bus_clk_names, 43 .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names), 44 .io_start = { 0xfd922800, 0xfd922b00 }, 45 .num_dsi = 2, 46 }; 47 48 static const char * const dsi_8916_bus_clk_names[] = { 49 "mdp_core", "iface", "bus", 50 }; 51 52 static const struct regulator_bulk_data msm8916_dsi_regulators[] = { 53 { .supply = "vdda", .init_load_uA = 100000 }, /* 1.2 V */ 54 { .supply = "vddio", .init_load_uA = 100000 }, /* 1.8 V */ 55 }; 56 57 static const struct msm_dsi_config msm8916_dsi_cfg = { 58 .io_offset = DSI_6G_REG_SHIFT, 59 .regulator_data = msm8916_dsi_regulators, 60 .num_regulators = ARRAY_SIZE(msm8916_dsi_regulators), 61 .bus_clk_names = dsi_8916_bus_clk_names, 62 .num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names), 63 .io_start = { 0x1a98000 }, 64 .num_dsi = 1, 65 }; 66 67 static const char * const dsi_8976_bus_clk_names[] = { 68 "mdp_core", "iface", "bus", 69 }; 70 71 static const struct regulator_bulk_data msm8976_dsi_regulators[] = { 72 { .supply = "vdda", .init_load_uA = 100000 }, /* 1.2 V */ 73 { .supply = "vddio", .init_load_uA = 100000 }, /* 1.8 V */ 74 }; 75 76 static const struct msm_dsi_config msm8976_dsi_cfg = { 77 .io_offset = DSI_6G_REG_SHIFT, 78 .regulator_data = msm8976_dsi_regulators, 79 .num_regulators = ARRAY_SIZE(msm8976_dsi_regulators), 80 .bus_clk_names = dsi_8976_bus_clk_names, 81 .num_bus_clks = ARRAY_SIZE(dsi_8976_bus_clk_names), 82 .io_start = { 0x1a94000, 0x1a96000 }, 83 .num_dsi = 2, 84 }; 85 86 static const struct regulator_bulk_data msm8994_dsi_regulators[] = { 87 { .supply = "vdda", .init_load_uA = 100000 }, /* 1.25 V */ 88 { .supply = "vddio", .init_load_uA = 100000 }, /* 1.8 V */ 89 { .supply = "vcca", .init_load_uA = 10000 }, /* 1.0 V */ 90 { .supply = "vdd", .init_load_uA = 100000 }, /* 1.8 V */ 91 { .supply = "lab_reg", .init_load_uA = -1 }, 92 { .supply = "ibb_reg", .init_load_uA = -1 }, 93 }; 94 95 static const struct msm_dsi_config msm8994_dsi_cfg = { 96 .io_offset = DSI_6G_REG_SHIFT, 97 .regulator_data = msm8994_dsi_regulators, 98 .num_regulators = ARRAY_SIZE(msm8994_dsi_regulators), 99 .bus_clk_names = dsi_6g_bus_clk_names, 100 .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names), 101 .io_start = { 0xfd998000, 0xfd9a0000 }, 102 .num_dsi = 2, 103 }; 104 105 static const char * const dsi_8996_bus_clk_names[] = { 106 "mdp_core", "iface", "bus", "core_mmss", 107 }; 108 109 static const struct regulator_bulk_data msm8996_dsi_regulators[] = { 110 { .supply = "vdda", .init_load_uA = 18160 }, /* 1.25 V */ 111 { .supply = "vcca", .init_load_uA = 17000 }, /* 0.925 V */ 112 { .supply = "vddio", .init_load_uA = 100000 }, /* 1.8 V */ 113 }; 114 115 static const struct msm_dsi_config msm8996_dsi_cfg = { 116 .io_offset = DSI_6G_REG_SHIFT, 117 .regulator_data = msm8996_dsi_regulators, 118 .num_regulators = ARRAY_SIZE(msm8996_dsi_regulators), 119 .bus_clk_names = dsi_8996_bus_clk_names, 120 .num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names), 121 .io_start = { 0x994000, 0x996000 }, 122 .num_dsi = 2, 123 }; 124 125 static const char * const dsi_msm8998_bus_clk_names[] = { 126 "iface", "bus", "core", 127 }; 128 129 static const struct regulator_bulk_data msm8998_dsi_regulators[] = { 130 { .supply = "vdd", .init_load_uA = 367000 }, /* 0.9 V */ 131 { .supply = "vdda", .init_load_uA = 62800 }, /* 1.2 V */ 132 }; 133 134 static const struct msm_dsi_config msm8998_dsi_cfg = { 135 .io_offset = DSI_6G_REG_SHIFT, 136 .regulator_data = msm8998_dsi_regulators, 137 .num_regulators = ARRAY_SIZE(msm8998_dsi_regulators), 138 .bus_clk_names = dsi_msm8998_bus_clk_names, 139 .num_bus_clks = ARRAY_SIZE(dsi_msm8998_bus_clk_names), 140 .io_start = { 0xc994000, 0xc996000 }, 141 .num_dsi = 2, 142 }; 143 144 static const char * const dsi_sdm660_bus_clk_names[] = { 145 "iface", "bus", "core", "core_mmss", 146 }; 147 148 static const struct regulator_bulk_data sdm660_dsi_regulators[] = { 149 { .supply = "vdda", .init_load_uA = 12560 }, /* 1.2 V */ 150 }; 151 152 static const struct msm_dsi_config sdm660_dsi_cfg = { 153 .io_offset = DSI_6G_REG_SHIFT, 154 .regulator_data = sdm660_dsi_regulators, 155 .num_regulators = ARRAY_SIZE(sdm660_dsi_regulators), 156 .bus_clk_names = dsi_sdm660_bus_clk_names, 157 .num_bus_clks = ARRAY_SIZE(dsi_sdm660_bus_clk_names), 158 .io_start = { 0xc994000, 0xc996000 }, 159 .num_dsi = 2, 160 }; 161 162 static const char * const dsi_sdm845_bus_clk_names[] = { 163 "iface", "bus", 164 }; 165 166 static const char * const dsi_sc7180_bus_clk_names[] = { 167 "iface", "bus", 168 }; 169 170 static const struct regulator_bulk_data sdm845_dsi_regulators[] = { 171 { .supply = "vdda", .init_load_uA = 21800 }, /* 1.2 V */ 172 }; 173 174 static const struct msm_dsi_config sdm845_dsi_cfg = { 175 .io_offset = DSI_6G_REG_SHIFT, 176 .regulator_data = sdm845_dsi_regulators, 177 .num_regulators = ARRAY_SIZE(sdm845_dsi_regulators), 178 .bus_clk_names = dsi_sdm845_bus_clk_names, 179 .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names), 180 .io_start = { 0xae94000, 0xae96000 }, 181 .num_dsi = 2, 182 }; 183 184 static const struct regulator_bulk_data sc7180_dsi_regulators[] = { 185 { .supply = "vdda", .init_load_uA = 21800 }, /* 1.2 V */ 186 }; 187 188 static const struct msm_dsi_config sc7180_dsi_cfg = { 189 .io_offset = DSI_6G_REG_SHIFT, 190 .regulator_data = sc7180_dsi_regulators, 191 .num_regulators = ARRAY_SIZE(sc7180_dsi_regulators), 192 .bus_clk_names = dsi_sc7180_bus_clk_names, 193 .num_bus_clks = ARRAY_SIZE(dsi_sc7180_bus_clk_names), 194 .io_start = { 0xae94000 }, 195 .num_dsi = 1, 196 }; 197 198 static const char * const dsi_sc7280_bus_clk_names[] = { 199 "iface", "bus", 200 }; 201 202 static const struct regulator_bulk_data sc7280_dsi_regulators[] = { 203 { .supply = "vdda", .init_load_uA = 8350 }, /* 1.2 V */ 204 }; 205 206 static const struct msm_dsi_config sc7280_dsi_cfg = { 207 .io_offset = DSI_6G_REG_SHIFT, 208 .regulator_data = sc7280_dsi_regulators, 209 .num_regulators = ARRAY_SIZE(sc7280_dsi_regulators), 210 .bus_clk_names = dsi_sc7280_bus_clk_names, 211 .num_bus_clks = ARRAY_SIZE(dsi_sc7280_bus_clk_names), 212 .io_start = { 0xae94000 }, 213 .num_dsi = 1, 214 }; 215 216 static const char * const dsi_qcm2290_bus_clk_names[] = { 217 "iface", "bus", 218 }; 219 220 static const struct regulator_bulk_data qcm2290_dsi_cfg_regulators[] = { 221 { .supply = "vdda", .init_load_uA = 21800 }, /* 1.2 V */ 222 }; 223 224 static const struct msm_dsi_config qcm2290_dsi_cfg = { 225 .io_offset = DSI_6G_REG_SHIFT, 226 .regulator_data = qcm2290_dsi_cfg_regulators, 227 .num_regulators = ARRAY_SIZE(qcm2290_dsi_cfg_regulators), 228 .bus_clk_names = dsi_qcm2290_bus_clk_names, 229 .num_bus_clks = ARRAY_SIZE(dsi_qcm2290_bus_clk_names), 230 .io_start = { 0x5e94000 }, 231 .num_dsi = 1, 232 }; 233 234 static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = { 235 .link_clk_set_rate = dsi_link_clk_set_rate_v2, 236 .link_clk_enable = dsi_link_clk_enable_v2, 237 .link_clk_disable = dsi_link_clk_disable_v2, 238 .clk_init_ver = dsi_clk_init_v2, 239 .tx_buf_alloc = dsi_tx_buf_alloc_v2, 240 .tx_buf_get = dsi_tx_buf_get_v2, 241 .tx_buf_put = NULL, 242 .dma_base_get = dsi_dma_base_get_v2, 243 .calc_clk_rate = dsi_calc_clk_rate_v2, 244 }; 245 246 static const struct msm_dsi_host_cfg_ops msm_dsi_6g_host_ops = { 247 .link_clk_set_rate = dsi_link_clk_set_rate_6g, 248 .link_clk_enable = dsi_link_clk_enable_6g, 249 .link_clk_disable = dsi_link_clk_disable_6g, 250 .clk_init_ver = NULL, 251 .tx_buf_alloc = dsi_tx_buf_alloc_6g, 252 .tx_buf_get = dsi_tx_buf_get_6g, 253 .tx_buf_put = dsi_tx_buf_put_6g, 254 .dma_base_get = dsi_dma_base_get_6g, 255 .calc_clk_rate = dsi_calc_clk_rate_6g, 256 }; 257 258 static const struct msm_dsi_host_cfg_ops msm_dsi_6g_v2_host_ops = { 259 .link_clk_set_rate = dsi_link_clk_set_rate_6g, 260 .link_clk_enable = dsi_link_clk_enable_6g, 261 .link_clk_disable = dsi_link_clk_disable_6g, 262 .clk_init_ver = dsi_clk_init_6g_v2, 263 .tx_buf_alloc = dsi_tx_buf_alloc_6g, 264 .tx_buf_get = dsi_tx_buf_get_6g, 265 .tx_buf_put = dsi_tx_buf_put_6g, 266 .dma_base_get = dsi_dma_base_get_6g, 267 .calc_clk_rate = dsi_calc_clk_rate_6g, 268 }; 269 270 static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = { 271 {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064, 272 &apq8064_dsi_cfg, &msm_dsi_v2_host_ops}, 273 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0, 274 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 275 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1, 276 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 277 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1, 278 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 279 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2, 280 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 281 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3, 282 &msm8994_dsi_cfg, &msm_dsi_6g_host_ops}, 283 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1, 284 &msm8916_dsi_cfg, &msm_dsi_6g_host_ops}, 285 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1, 286 &msm8996_dsi_cfg, &msm_dsi_6g_host_ops}, 287 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_2, 288 &msm8976_dsi_cfg, &msm_dsi_6g_host_ops}, 289 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_1_0, 290 &sdm660_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 291 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_0, 292 &msm8998_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 293 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1, 294 &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 295 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_3_0, 296 &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 297 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_0, 298 &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 299 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_1, 300 &sc7180_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 301 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_5_0, 302 &sc7280_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 303 }; 304 305 const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor) 306 { 307 const struct msm_dsi_cfg_handler *cfg_hnd = NULL; 308 int i; 309 310 for (i = ARRAY_SIZE(dsi_cfg_handlers) - 1; i >= 0; i--) { 311 if ((dsi_cfg_handlers[i].major == major) && 312 (dsi_cfg_handlers[i].minor == minor)) { 313 cfg_hnd = &dsi_cfg_handlers[i]; 314 break; 315 } 316 } 317 318 return cfg_hnd; 319 } 320 321 /* Non autodetect configs */ 322 const struct msm_dsi_cfg_handler qcm2290_dsi_cfg_handler = { 323 .cfg = &qcm2290_dsi_cfg, 324 .ops = &msm_dsi_6g_v2_host_ops, 325 }; 326