1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2015, The Linux Foundation. All rights reserved. 4 */ 5 6 #include "dsi_cfg.h" 7 8 static const char * const dsi_v2_bus_clk_names[] = { 9 "core_mmss", "iface", "bus", 10 }; 11 12 static const struct msm_dsi_config apq8064_dsi_cfg = { 13 .io_offset = 0, 14 .reg_cfg = { 15 .num = 3, 16 .regs = { 17 {"vdda", 100000, 100}, /* 1.2 V */ 18 {"avdd", 10000, 100}, /* 3.0 V */ 19 {"vddio", 100000, 100}, /* 1.8 V */ 20 }, 21 }, 22 .bus_clk_names = dsi_v2_bus_clk_names, 23 .num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names), 24 .io_start = { 0x4700000, 0x5800000 }, 25 .num_dsi = 2, 26 }; 27 28 static const char * const dsi_6g_bus_clk_names[] = { 29 "mdp_core", "iface", "bus", "core_mmss", 30 }; 31 32 static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = { 33 .io_offset = DSI_6G_REG_SHIFT, 34 .reg_cfg = { 35 .num = 4, 36 .regs = { 37 {"gdsc", -1, -1}, 38 {"vdd", 150000, 100}, /* 3.0 V */ 39 {"vdda", 100000, 100}, /* 1.2 V */ 40 {"vddio", 100000, 100}, /* 1.8 V */ 41 }, 42 }, 43 .bus_clk_names = dsi_6g_bus_clk_names, 44 .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names), 45 .io_start = { 0xfd922800, 0xfd922b00 }, 46 .num_dsi = 2, 47 }; 48 49 static const char * const dsi_8916_bus_clk_names[] = { 50 "mdp_core", "iface", "bus", 51 }; 52 53 static const struct msm_dsi_config msm8916_dsi_cfg = { 54 .io_offset = DSI_6G_REG_SHIFT, 55 .reg_cfg = { 56 .num = 3, 57 .regs = { 58 {"gdsc", -1, -1}, 59 {"vdda", 100000, 100}, /* 1.2 V */ 60 {"vddio", 100000, 100}, /* 1.8 V */ 61 }, 62 }, 63 .bus_clk_names = dsi_8916_bus_clk_names, 64 .num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names), 65 .io_start = { 0x1a98000 }, 66 .num_dsi = 1, 67 }; 68 69 static const char * const dsi_8976_bus_clk_names[] = { 70 "mdp_core", "iface", "bus", 71 }; 72 73 static const struct msm_dsi_config msm8976_dsi_cfg = { 74 .io_offset = DSI_6G_REG_SHIFT, 75 .reg_cfg = { 76 .num = 3, 77 .regs = { 78 {"gdsc", -1, -1}, 79 {"vdda", 100000, 100}, /* 1.2 V */ 80 {"vddio", 100000, 100}, /* 1.8 V */ 81 }, 82 }, 83 .bus_clk_names = dsi_8976_bus_clk_names, 84 .num_bus_clks = ARRAY_SIZE(dsi_8976_bus_clk_names), 85 .io_start = { 0x1a94000, 0x1a96000 }, 86 .num_dsi = 2, 87 }; 88 89 static const struct msm_dsi_config msm8994_dsi_cfg = { 90 .io_offset = DSI_6G_REG_SHIFT, 91 .reg_cfg = { 92 .num = 7, 93 .regs = { 94 {"gdsc", -1, -1}, 95 {"vdda", 100000, 100}, /* 1.25 V */ 96 {"vddio", 100000, 100}, /* 1.8 V */ 97 {"vcca", 10000, 100}, /* 1.0 V */ 98 {"vdd", 100000, 100}, /* 1.8 V */ 99 {"lab_reg", -1, -1}, 100 {"ibb_reg", -1, -1}, 101 }, 102 }, 103 .bus_clk_names = dsi_6g_bus_clk_names, 104 .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names), 105 .io_start = { 0xfd998000, 0xfd9a0000 }, 106 .num_dsi = 2, 107 }; 108 109 static const char * const dsi_8996_bus_clk_names[] = { 110 "mdp_core", "iface", "bus", "core_mmss", 111 }; 112 113 static const struct msm_dsi_config msm8996_dsi_cfg = { 114 .io_offset = DSI_6G_REG_SHIFT, 115 .reg_cfg = { 116 .num = 2, 117 .regs = { 118 {"vdda", 18160, 1 }, /* 1.25 V */ 119 {"vcca", 17000, 32 }, /* 0.925 V */ 120 {"vddio", 100000, 100 },/* 1.8 V */ 121 }, 122 }, 123 .bus_clk_names = dsi_8996_bus_clk_names, 124 .num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names), 125 .io_start = { 0x994000, 0x996000 }, 126 .num_dsi = 2, 127 }; 128 129 static const char * const dsi_msm8998_bus_clk_names[] = { 130 "iface", "bus", "core", 131 }; 132 133 static const struct msm_dsi_config msm8998_dsi_cfg = { 134 .io_offset = DSI_6G_REG_SHIFT, 135 .reg_cfg = { 136 .num = 2, 137 .regs = { 138 {"vdd", 367000, 16 }, /* 0.9 V */ 139 {"vdda", 62800, 2 }, /* 1.2 V */ 140 }, 141 }, 142 .bus_clk_names = dsi_msm8998_bus_clk_names, 143 .num_bus_clks = ARRAY_SIZE(dsi_msm8998_bus_clk_names), 144 .io_start = { 0xc994000, 0xc996000 }, 145 .num_dsi = 2, 146 }; 147 148 static const char * const dsi_sdm660_bus_clk_names[] = { 149 "iface", "bus", "core", "core_mmss", 150 }; 151 152 static const struct msm_dsi_config sdm660_dsi_cfg = { 153 .io_offset = DSI_6G_REG_SHIFT, 154 .reg_cfg = { 155 .num = 2, 156 .regs = { 157 {"vdd", 73400, 32 }, /* 0.9 V */ 158 {"vdda", 12560, 4 }, /* 1.2 V */ 159 }, 160 }, 161 .bus_clk_names = dsi_sdm660_bus_clk_names, 162 .num_bus_clks = ARRAY_SIZE(dsi_sdm660_bus_clk_names), 163 .io_start = { 0xc994000, 0xc996000 }, 164 .num_dsi = 2, 165 }; 166 167 static const char * const dsi_sdm845_bus_clk_names[] = { 168 "iface", "bus", 169 }; 170 171 static const char * const dsi_sc7180_bus_clk_names[] = { 172 "iface", "bus", 173 }; 174 175 static const struct msm_dsi_config sdm845_dsi_cfg = { 176 .io_offset = DSI_6G_REG_SHIFT, 177 .reg_cfg = { 178 .num = 1, 179 .regs = { 180 {"vdda", 21800, 4 }, /* 1.2 V */ 181 }, 182 }, 183 .bus_clk_names = dsi_sdm845_bus_clk_names, 184 .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names), 185 .io_start = { 0xae94000, 0xae96000 }, 186 .num_dsi = 2, 187 }; 188 189 static const struct msm_dsi_config sc7180_dsi_cfg = { 190 .io_offset = DSI_6G_REG_SHIFT, 191 .reg_cfg = { 192 .num = 1, 193 .regs = { 194 {"vdda", 21800, 4 }, /* 1.2 V */ 195 }, 196 }, 197 .bus_clk_names = dsi_sc7180_bus_clk_names, 198 .num_bus_clks = ARRAY_SIZE(dsi_sc7180_bus_clk_names), 199 .io_start = { 0xae94000 }, 200 .num_dsi = 1, 201 }; 202 203 static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = { 204 .link_clk_set_rate = dsi_link_clk_set_rate_v2, 205 .link_clk_enable = dsi_link_clk_enable_v2, 206 .link_clk_disable = dsi_link_clk_disable_v2, 207 .clk_init_ver = dsi_clk_init_v2, 208 .tx_buf_alloc = dsi_tx_buf_alloc_v2, 209 .tx_buf_get = dsi_tx_buf_get_v2, 210 .tx_buf_put = NULL, 211 .dma_base_get = dsi_dma_base_get_v2, 212 .calc_clk_rate = dsi_calc_clk_rate_v2, 213 }; 214 215 static const struct msm_dsi_host_cfg_ops msm_dsi_6g_host_ops = { 216 .link_clk_set_rate = dsi_link_clk_set_rate_6g, 217 .link_clk_enable = dsi_link_clk_enable_6g, 218 .link_clk_disable = dsi_link_clk_disable_6g, 219 .clk_init_ver = NULL, 220 .tx_buf_alloc = dsi_tx_buf_alloc_6g, 221 .tx_buf_get = dsi_tx_buf_get_6g, 222 .tx_buf_put = dsi_tx_buf_put_6g, 223 .dma_base_get = dsi_dma_base_get_6g, 224 .calc_clk_rate = dsi_calc_clk_rate_6g, 225 }; 226 227 static const struct msm_dsi_host_cfg_ops msm_dsi_6g_v2_host_ops = { 228 .link_clk_set_rate = dsi_link_clk_set_rate_6g, 229 .link_clk_enable = dsi_link_clk_enable_6g, 230 .link_clk_disable = dsi_link_clk_disable_6g, 231 .clk_init_ver = dsi_clk_init_6g_v2, 232 .tx_buf_alloc = dsi_tx_buf_alloc_6g, 233 .tx_buf_get = dsi_tx_buf_get_6g, 234 .tx_buf_put = dsi_tx_buf_put_6g, 235 .dma_base_get = dsi_dma_base_get_6g, 236 .calc_clk_rate = dsi_calc_clk_rate_6g, 237 }; 238 239 static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = { 240 {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064, 241 &apq8064_dsi_cfg, &msm_dsi_v2_host_ops}, 242 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0, 243 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 244 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1, 245 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 246 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1, 247 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 248 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2, 249 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 250 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3, 251 &msm8994_dsi_cfg, &msm_dsi_6g_host_ops}, 252 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1, 253 &msm8916_dsi_cfg, &msm_dsi_6g_host_ops}, 254 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1, 255 &msm8996_dsi_cfg, &msm_dsi_6g_host_ops}, 256 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_2, 257 &msm8976_dsi_cfg, &msm_dsi_6g_host_ops}, 258 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_1_0, 259 &sdm660_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 260 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_0, 261 &msm8998_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 262 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1, 263 &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 264 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_3_0, 265 &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 266 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_0, 267 &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 268 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_1, 269 &sc7180_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 270 }; 271 272 const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor) 273 { 274 const struct msm_dsi_cfg_handler *cfg_hnd = NULL; 275 int i; 276 277 for (i = ARRAY_SIZE(dsi_cfg_handlers) - 1; i >= 0; i--) { 278 if ((dsi_cfg_handlers[i].major == major) && 279 (dsi_cfg_handlers[i].minor == minor)) { 280 cfg_hnd = &dsi_cfg_handlers[i]; 281 break; 282 } 283 } 284 285 return cfg_hnd; 286 } 287 288