1 /* 2 * Copyright (c) 2015, The Linux Foundation. All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 and 6 * only version 2 as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 */ 13 14 #include "dsi_cfg.h" 15 16 static const char * const dsi_v2_bus_clk_names[] = { 17 "core_mmss", "iface", "bus", 18 }; 19 20 static const struct msm_dsi_config apq8064_dsi_cfg = { 21 .io_offset = 0, 22 .reg_cfg = { 23 .num = 3, 24 .regs = { 25 {"vdda", 100000, 100}, /* 1.2 V */ 26 {"avdd", 10000, 100}, /* 3.0 V */ 27 {"vddio", 100000, 100}, /* 1.8 V */ 28 }, 29 }, 30 .bus_clk_names = dsi_v2_bus_clk_names, 31 .num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names), 32 .io_start = { 0x4700000, 0x5800000 }, 33 .num_dsi = 2, 34 }; 35 36 static const char * const dsi_6g_bus_clk_names[] = { 37 "mdp_core", "iface", "bus", "core_mmss", 38 }; 39 40 static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = { 41 .io_offset = DSI_6G_REG_SHIFT, 42 .reg_cfg = { 43 .num = 4, 44 .regs = { 45 {"gdsc", -1, -1}, 46 {"vdd", 150000, 100}, /* 3.0 V */ 47 {"vdda", 100000, 100}, /* 1.2 V */ 48 {"vddio", 100000, 100}, /* 1.8 V */ 49 }, 50 }, 51 .bus_clk_names = dsi_6g_bus_clk_names, 52 .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names), 53 .io_start = { 0xfd922800, 0xfd922b00 }, 54 .num_dsi = 2, 55 }; 56 57 static const char * const dsi_8916_bus_clk_names[] = { 58 "mdp_core", "iface", "bus", 59 }; 60 61 static const struct msm_dsi_config msm8916_dsi_cfg = { 62 .io_offset = DSI_6G_REG_SHIFT, 63 .reg_cfg = { 64 .num = 3, 65 .regs = { 66 {"gdsc", -1, -1}, 67 {"vdda", 100000, 100}, /* 1.2 V */ 68 {"vddio", 100000, 100}, /* 1.8 V */ 69 }, 70 }, 71 .bus_clk_names = dsi_8916_bus_clk_names, 72 .num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names), 73 .io_start = { 0x1a98000 }, 74 .num_dsi = 1, 75 }; 76 77 static const struct msm_dsi_config msm8994_dsi_cfg = { 78 .io_offset = DSI_6G_REG_SHIFT, 79 .reg_cfg = { 80 .num = 7, 81 .regs = { 82 {"gdsc", -1, -1}, 83 {"vdda", 100000, 100}, /* 1.25 V */ 84 {"vddio", 100000, 100}, /* 1.8 V */ 85 {"vcca", 10000, 100}, /* 1.0 V */ 86 {"vdd", 100000, 100}, /* 1.8 V */ 87 {"lab_reg", -1, -1}, 88 {"ibb_reg", -1, -1}, 89 }, 90 }, 91 .bus_clk_names = dsi_6g_bus_clk_names, 92 .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names), 93 .io_start = { 0xfd998000, 0xfd9a0000 }, 94 .num_dsi = 2, 95 }; 96 97 /* 98 * TODO: core_mmss_clk fails to enable for some reason, but things work fine 99 * without it too. Figure out why it doesn't enable and uncomment below 100 */ 101 static const char * const dsi_8996_bus_clk_names[] = { 102 "mdp_core", "iface", "bus", /* "core_mmss", */ 103 }; 104 105 static const struct msm_dsi_config msm8996_dsi_cfg = { 106 .io_offset = DSI_6G_REG_SHIFT, 107 .reg_cfg = { 108 .num = 2, 109 .regs = { 110 {"vdda", 18160, 1 }, /* 1.25 V */ 111 {"vcca", 17000, 32 }, /* 0.925 V */ 112 {"vddio", 100000, 100 },/* 1.8 V */ 113 }, 114 }, 115 .bus_clk_names = dsi_8996_bus_clk_names, 116 .num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names), 117 .io_start = { 0x994000, 0x996000 }, 118 .num_dsi = 2, 119 }; 120 121 static const char * const dsi_msm8998_bus_clk_names[] = { 122 "iface", "bus", "core", 123 }; 124 125 static const struct msm_dsi_config msm8998_dsi_cfg = { 126 .io_offset = DSI_6G_REG_SHIFT, 127 .reg_cfg = { 128 .num = 2, 129 .regs = { 130 {"vdd", 367000, 16 }, /* 0.9 V */ 131 {"vdda", 62800, 2 }, /* 1.2 V */ 132 }, 133 }, 134 .bus_clk_names = dsi_msm8998_bus_clk_names, 135 .num_bus_clks = ARRAY_SIZE(dsi_msm8998_bus_clk_names), 136 .io_start = { 0xc994000, 0xc996000 }, 137 .num_dsi = 2, 138 }; 139 140 static const char * const dsi_sdm845_bus_clk_names[] = { 141 "iface", "bus", 142 }; 143 144 static const struct msm_dsi_config sdm845_dsi_cfg = { 145 .io_offset = DSI_6G_REG_SHIFT, 146 .reg_cfg = { 147 .num = 1, 148 .regs = { 149 {"vdda", 21800, 4 }, /* 1.2 V */ 150 }, 151 }, 152 .bus_clk_names = dsi_sdm845_bus_clk_names, 153 .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names), 154 .io_start = { 0xae94000, 0xae96000 }, 155 .num_dsi = 2, 156 }; 157 158 const static struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = { 159 .link_clk_enable = dsi_link_clk_enable_v2, 160 .link_clk_disable = dsi_link_clk_disable_v2, 161 .clk_init_ver = dsi_clk_init_v2, 162 .tx_buf_alloc = dsi_tx_buf_alloc_v2, 163 .tx_buf_get = dsi_tx_buf_get_v2, 164 .tx_buf_put = NULL, 165 .dma_base_get = dsi_dma_base_get_v2, 166 .calc_clk_rate = dsi_calc_clk_rate_v2, 167 }; 168 169 const static struct msm_dsi_host_cfg_ops msm_dsi_6g_host_ops = { 170 .link_clk_enable = dsi_link_clk_enable_6g, 171 .link_clk_disable = dsi_link_clk_disable_6g, 172 .clk_init_ver = NULL, 173 .tx_buf_alloc = dsi_tx_buf_alloc_6g, 174 .tx_buf_get = dsi_tx_buf_get_6g, 175 .tx_buf_put = dsi_tx_buf_put_6g, 176 .dma_base_get = dsi_dma_base_get_6g, 177 .calc_clk_rate = dsi_calc_clk_rate_6g, 178 }; 179 180 const static struct msm_dsi_host_cfg_ops msm_dsi_6g_v2_host_ops = { 181 .link_clk_enable = dsi_link_clk_enable_6g, 182 .link_clk_disable = dsi_link_clk_disable_6g, 183 .clk_init_ver = dsi_clk_init_6g_v2, 184 .tx_buf_alloc = dsi_tx_buf_alloc_6g, 185 .tx_buf_get = dsi_tx_buf_get_6g, 186 .tx_buf_put = dsi_tx_buf_put_6g, 187 .dma_base_get = dsi_dma_base_get_6g, 188 .calc_clk_rate = dsi_calc_clk_rate_6g, 189 }; 190 191 static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = { 192 {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064, 193 &apq8064_dsi_cfg, &msm_dsi_v2_host_ops}, 194 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0, 195 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 196 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1, 197 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 198 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1, 199 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 200 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2, 201 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops}, 202 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3, 203 &msm8994_dsi_cfg, &msm_dsi_6g_host_ops}, 204 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1, 205 &msm8916_dsi_cfg, &msm_dsi_6g_host_ops}, 206 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1, 207 &msm8996_dsi_cfg, &msm_dsi_6g_host_ops}, 208 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_0, 209 &msm8998_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 210 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1, 211 &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, 212 }; 213 214 const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor) 215 { 216 const struct msm_dsi_cfg_handler *cfg_hnd = NULL; 217 int i; 218 219 for (i = ARRAY_SIZE(dsi_cfg_handlers) - 1; i >= 0; i--) { 220 if ((dsi_cfg_handlers[i].major == major) && 221 (dsi_cfg_handlers[i].minor == minor)) { 222 cfg_hnd = &dsi_cfg_handlers[i]; 223 break; 224 } 225 } 226 227 return cfg_hnd; 228 } 229 230