1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef _DP_PARSER_H_ 7 #define _DP_PARSER_H_ 8 9 #include <linux/platform_device.h> 10 #include <linux/phy/phy.h> 11 #include <linux/phy/phy-dp.h> 12 13 #include "msm_drv.h" 14 15 #define DP_LABEL "MDSS DP DISPLAY" 16 #define DP_MAX_PIXEL_CLK_KHZ 675000 17 #define DP_MAX_NUM_DP_LANES 4 18 19 enum dp_pm_type { 20 DP_CORE_PM, 21 DP_CTRL_PM, 22 DP_STREAM_PM, 23 DP_PHY_PM, 24 DP_MAX_PM 25 }; 26 27 struct dss_io_region { 28 size_t len; 29 void __iomem *base; 30 }; 31 32 struct dss_io_data { 33 struct dss_io_region ahb; 34 struct dss_io_region aux; 35 struct dss_io_region link; 36 struct dss_io_region p0; 37 }; 38 39 static inline const char *dp_parser_pm_name(enum dp_pm_type module) 40 { 41 switch (module) { 42 case DP_CORE_PM: return "DP_CORE_PM"; 43 case DP_CTRL_PM: return "DP_CTRL_PM"; 44 case DP_STREAM_PM: return "DP_STREAM_PM"; 45 case DP_PHY_PM: return "DP_PHY_PM"; 46 default: return "???"; 47 } 48 } 49 50 /** 51 * struct dp_display_data - display related device tree data. 52 * 53 * @ctrl_node: referece to controller device 54 * @phy_node: reference to phy device 55 * @is_active: is the controller currently active 56 * @name: name of the display 57 * @display_type: type of the display 58 */ 59 struct dp_display_data { 60 struct device_node *ctrl_node; 61 struct device_node *phy_node; 62 bool is_active; 63 const char *name; 64 const char *display_type; 65 }; 66 67 /** 68 * struct dp_ctrl_resource - controller's IO related data 69 * 70 * @dp_controller: Display Port controller mapped memory address 71 * @phy_io: phy's mapped memory address 72 */ 73 struct dp_io { 74 struct dss_io_data dp_controller; 75 struct phy *phy; 76 union phy_configure_opts phy_opts; 77 }; 78 79 /** 80 * struct dp_pinctrl - DP's pin control 81 * 82 * @pin: pin-controller's instance 83 * @state_active: active state pin control 84 * @state_hpd_active: hpd active state pin control 85 * @state_suspend: suspend state pin control 86 */ 87 struct dp_pinctrl { 88 struct pinctrl *pin; 89 struct pinctrl_state *state_active; 90 struct pinctrl_state *state_hpd_active; 91 struct pinctrl_state *state_suspend; 92 }; 93 94 /* Regulators for DP devices */ 95 struct dp_reg_entry { 96 char name[32]; 97 int enable_load; 98 int disable_load; 99 }; 100 101 struct dss_module_power { 102 unsigned int num_clk; 103 struct clk_bulk_data *clocks; 104 }; 105 106 /** 107 * struct dp_parser - DP parser's data exposed to clients 108 * 109 * @pdev: platform data of the client 110 * @mp: gpio, regulator and clock related data 111 * @pinctrl: pin-control related data 112 * @disp_data: controller's display related data 113 * @parse: function to be called by client to parse device tree. 114 */ 115 struct dp_parser { 116 struct platform_device *pdev; 117 struct dss_module_power mp[DP_MAX_PM]; 118 struct dp_pinctrl pinctrl; 119 struct dp_io io; 120 struct dp_display_data disp_data; 121 u32 max_dp_lanes; 122 struct drm_bridge *next_bridge; 123 124 int (*parse)(struct dp_parser *parser); 125 }; 126 127 /** 128 * dp_parser_get() - get the DP's device tree parser module 129 * 130 * @pdev: platform data of the client 131 * return: pointer to dp_parser structure. 132 * 133 * This function provides client capability to parse the 134 * device tree and populate the data structures. The data 135 * related to clock, regulators, pin-control and other 136 * can be parsed using this module. 137 */ 138 struct dp_parser *dp_parser_get(struct platform_device *pdev); 139 140 /** 141 * dp_parser_find_next_bridge() - find an additional bridge to DP 142 * 143 * @parser: dp_parser data from client 144 * 145 * This function is used to find any additional bridge attached to 146 * the DP controller. The eDP interface requires a panel bridge. 147 * 148 * Return: 0 if able to get the bridge, otherwise negative errno for failure. 149 */ 150 int dp_parser_find_next_bridge(struct dp_parser *parser); 151 152 #endif 153