1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef _DP_PARSER_H_ 7 #define _DP_PARSER_H_ 8 9 #include <linux/platform_device.h> 10 11 #include "dpu_io_util.h" 12 #include "msm_drv.h" 13 #include "dp_pll.h" 14 15 #define DP_LABEL "MDSS DP DISPLAY" 16 #define DP_MAX_PIXEL_CLK_KHZ 675000 17 #define DP_MAX_NUM_DP_LANES 4 18 19 enum dp_pm_type { 20 DP_CORE_PM, 21 DP_CTRL_PM, 22 DP_STREAM_PM, 23 DP_PHY_PM, 24 DP_MAX_PM 25 }; 26 27 struct dss_io_data { 28 u32 len; 29 void __iomem *base; 30 }; 31 32 static inline const char *dp_parser_pm_name(enum dp_pm_type module) 33 { 34 switch (module) { 35 case DP_CORE_PM: return "DP_CORE_PM"; 36 case DP_CTRL_PM: return "DP_CTRL_PM"; 37 case DP_STREAM_PM: return "DP_STREAM_PM"; 38 case DP_PHY_PM: return "DP_PHY_PM"; 39 default: return "???"; 40 } 41 } 42 43 /** 44 * struct dp_display_data - display related device tree data. 45 * 46 * @ctrl_node: referece to controller device 47 * @phy_node: reference to phy device 48 * @is_active: is the controller currently active 49 * @name: name of the display 50 * @display_type: type of the display 51 */ 52 struct dp_display_data { 53 struct device_node *ctrl_node; 54 struct device_node *phy_node; 55 bool is_active; 56 const char *name; 57 const char *display_type; 58 }; 59 60 /** 61 * struct dp_ctrl_resource - controller's IO related data 62 * 63 * @dp_controller: Display Port controller mapped memory address 64 * @phy_io: phy's mapped memory address 65 * @ln_tx0_io: USB-DP lane TX0's mapped memory address 66 * @ln_tx1_io: USB-DP lane TX1's mapped memory address 67 * @dp_pll_io: DP PLL mapped memory address 68 * @usb3_dp_com: USB3 DP PHY combo mapped memory address 69 */ 70 struct dp_io { 71 struct dss_io_data dp_controller; 72 struct dss_io_data phy_reg; 73 struct dss_io_data usb3_dp_com; 74 }; 75 76 /** 77 * struct dp_pinctrl - DP's pin control 78 * 79 * @pin: pin-controller's instance 80 * @state_active: active state pin control 81 * @state_hpd_active: hpd active state pin control 82 * @state_suspend: suspend state pin control 83 */ 84 struct dp_pinctrl { 85 struct pinctrl *pin; 86 struct pinctrl_state *state_active; 87 struct pinctrl_state *state_hpd_active; 88 struct pinctrl_state *state_suspend; 89 }; 90 91 #define DP_DEV_REGULATOR_MAX 4 92 93 /* Regulators for DP devices */ 94 struct dp_reg_entry { 95 char name[32]; 96 int enable_load; 97 int disable_load; 98 }; 99 100 struct dp_regulator_cfg { 101 int num; 102 struct dp_reg_entry regs[DP_DEV_REGULATOR_MAX]; 103 }; 104 105 /** 106 * struct dp_parser - DP parser's data exposed to clients 107 * 108 * @pdev: platform data of the client 109 * @mp: gpio, regulator and clock related data 110 * @pinctrl: pin-control related data 111 * @disp_data: controller's display related data 112 * @parse: function to be called by client to parse device tree. 113 */ 114 struct dp_parser { 115 struct platform_device *pdev; 116 struct dss_module_power mp[DP_MAX_PM]; 117 struct dp_pinctrl pinctrl; 118 struct dp_io io; 119 struct dp_display_data disp_data; 120 struct msm_dp_pll *pll; 121 const struct dp_regulator_cfg *regulator_cfg; 122 u32 max_dp_lanes; 123 124 int (*parse)(struct dp_parser *parser); 125 }; 126 127 /** 128 * dp_parser_get() - get the DP's device tree parser module 129 * 130 * @pdev: platform data of the client 131 * return: pointer to dp_parser structure. 132 * 133 * This function provides client capability to parse the 134 * device tree and populate the data structures. The data 135 * related to clock, regulators, pin-control and other 136 * can be parsed using this module. 137 */ 138 struct dp_parser *dp_parser_get(struct platform_device *pdev); 139 140 #endif 141