1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef _DP_PARSER_H_ 7 #define _DP_PARSER_H_ 8 9 #include <linux/platform_device.h> 10 11 #include "dpu_io_util.h" 12 #include "msm_drv.h" 13 #include "dp_pll.h" 14 15 #define DP_LABEL "MDSS DP DISPLAY" 16 #define DP_MAX_PIXEL_CLK_KHZ 675000 17 #define DP_MAX_NUM_DP_LANES 4 18 19 enum dp_pm_type { 20 DP_CORE_PM, 21 DP_CTRL_PM, 22 DP_PHY_PM, 23 DP_MAX_PM 24 }; 25 26 struct dss_io_data { 27 u32 len; 28 void __iomem *base; 29 }; 30 31 static inline const char *dp_parser_pm_name(enum dp_pm_type module) 32 { 33 switch (module) { 34 case DP_CORE_PM: return "DP_CORE_PM"; 35 case DP_CTRL_PM: return "DP_CTRL_PM"; 36 case DP_PHY_PM: return "DP_PHY_PM"; 37 default: return "???"; 38 } 39 } 40 41 /** 42 * struct dp_display_data - display related device tree data. 43 * 44 * @ctrl_node: referece to controller device 45 * @phy_node: reference to phy device 46 * @is_active: is the controller currently active 47 * @name: name of the display 48 * @display_type: type of the display 49 */ 50 struct dp_display_data { 51 struct device_node *ctrl_node; 52 struct device_node *phy_node; 53 bool is_active; 54 const char *name; 55 const char *display_type; 56 }; 57 58 /** 59 * struct dp_ctrl_resource - controller's IO related data 60 * 61 * @dp_controller: Display Port controller mapped memory address 62 * @phy_io: phy's mapped memory address 63 * @ln_tx0_io: USB-DP lane TX0's mapped memory address 64 * @ln_tx1_io: USB-DP lane TX1's mapped memory address 65 * @dp_pll_io: DP PLL mapped memory address 66 * @usb3_dp_com: USB3 DP PHY combo mapped memory address 67 */ 68 struct dp_io { 69 struct dss_io_data dp_controller; 70 struct dss_io_data phy_reg; 71 struct dss_io_data usb3_dp_com; 72 }; 73 74 /** 75 * struct dp_pinctrl - DP's pin control 76 * 77 * @pin: pin-controller's instance 78 * @state_active: active state pin control 79 * @state_hpd_active: hpd active state pin control 80 * @state_suspend: suspend state pin control 81 */ 82 struct dp_pinctrl { 83 struct pinctrl *pin; 84 struct pinctrl_state *state_active; 85 struct pinctrl_state *state_hpd_active; 86 struct pinctrl_state *state_suspend; 87 }; 88 89 #define DP_DEV_REGULATOR_MAX 4 90 91 /* Regulators for DP devices */ 92 struct dp_reg_entry { 93 char name[32]; 94 int enable_load; 95 int disable_load; 96 }; 97 98 struct dp_regulator_cfg { 99 int num; 100 struct dp_reg_entry regs[DP_DEV_REGULATOR_MAX]; 101 }; 102 103 /** 104 * struct dp_parser - DP parser's data exposed to clients 105 * 106 * @pdev: platform data of the client 107 * @mp: gpio, regulator and clock related data 108 * @pinctrl: pin-control related data 109 * @disp_data: controller's display related data 110 * @parse: function to be called by client to parse device tree. 111 */ 112 struct dp_parser { 113 struct platform_device *pdev; 114 struct dss_module_power mp[DP_MAX_PM]; 115 struct dp_pinctrl pinctrl; 116 struct dp_io io; 117 struct dp_display_data disp_data; 118 struct msm_dp_pll *pll; 119 const struct dp_regulator_cfg *regulator_cfg; 120 u32 max_dp_lanes; 121 122 int (*parse)(struct dp_parser *parser); 123 }; 124 125 /** 126 * dp_parser_get() - get the DP's device tree parser module 127 * 128 * @pdev: platform data of the client 129 * return: pointer to dp_parser structure. 130 * 131 * This function provides client capability to parse the 132 * device tree and populate the data structures. The data 133 * related to clock, regulators, pin-control and other 134 * can be parsed using this module. 135 */ 136 struct dp_parser *dp_parser_get(struct platform_device *pdev); 137 138 #endif 139