xref: /openbmc/linux/drivers/gpu/drm/msm/dp/dp_panel.h (revision 6726d552)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
4  */
5 
6 #ifndef _DP_PANEL_H_
7 #define _DP_PANEL_H_
8 
9 #include <drm/msm_drm.h>
10 
11 #include "dp_aux.h"
12 #include "dp_link.h"
13 #include "dp_hpd.h"
14 
15 struct edid;
16 
17 #define DPRX_EXTENDED_DPCD_FIELD	0x2200
18 
19 #define DP_DOWNSTREAM_PORTS		4
20 #define DP_DOWNSTREAM_CAP_SIZE		4
21 
22 struct dp_display_mode {
23 	struct drm_display_mode drm_mode;
24 	u32 capabilities;
25 	u32 bpp;
26 	u32 h_active_low;
27 	u32 v_active_low;
28 };
29 
30 struct dp_panel_in {
31 	struct device *dev;
32 	struct drm_dp_aux *aux;
33 	struct dp_link *link;
34 	struct dp_catalog *catalog;
35 };
36 
37 struct dp_panel {
38 	/* dpcd raw data */
39 	u8 dpcd[DP_RECEIVER_CAP_SIZE + 1];
40 	u8 ds_cap_info[DP_DOWNSTREAM_PORTS * DP_DOWNSTREAM_CAP_SIZE];
41 	u32 ds_port_cnt;
42 	u32 dfp_present;
43 
44 	struct dp_link_info link_info;
45 	struct drm_dp_desc desc;
46 	struct edid *edid;
47 	struct drm_connector *connector;
48 	struct dp_display_mode dp_mode;
49 	bool video_test;
50 
51 	u32 vic;
52 	u32 max_dp_lanes;
53 
54 	u32 max_bw_code;
55 };
56 
57 int dp_panel_init_panel_info(struct dp_panel *dp_panel);
58 int dp_panel_deinit(struct dp_panel *dp_panel);
59 int dp_panel_timing_cfg(struct dp_panel *dp_panel);
60 void dp_panel_dump_regs(struct dp_panel *dp_panel);
61 int dp_panel_read_sink_caps(struct dp_panel *dp_panel,
62 		struct drm_connector *connector);
63 u32 dp_panel_get_mode_bpp(struct dp_panel *dp_panel, u32 mode_max_bpp,
64 			u32 mode_pclk_khz);
65 int dp_panel_get_modes(struct dp_panel *dp_panel,
66 		struct drm_connector *connector);
67 void dp_panel_handle_sink_request(struct dp_panel *dp_panel);
68 void dp_panel_tpg_config(struct dp_panel *dp_panel, bool enable);
69 
70 /**
71  * is_link_rate_valid() - validates the link rate
72  * @lane_rate: link rate requested by the sink
73  *
74  * Returns true if the requested link rate is supported.
75  */
76 static inline bool is_link_rate_valid(u32 bw_code)
77 {
78 	return (bw_code == DP_LINK_BW_1_62 ||
79 		bw_code == DP_LINK_BW_2_7 ||
80 		bw_code == DP_LINK_BW_5_4 ||
81 		bw_code == DP_LINK_BW_8_1);
82 }
83 
84 /**
85  * dp_link_is_lane_count_valid() - validates the lane count
86  * @lane_count: lane count requested by the sink
87  *
88  * Returns true if the requested lane count is supported.
89  */
90 static inline bool is_lane_count_valid(u32 lane_count)
91 {
92 	return (lane_count == 1 ||
93 		lane_count == 2 ||
94 		lane_count == 4);
95 }
96 
97 struct dp_panel *dp_panel_get(struct dp_panel_in *in);
98 void dp_panel_put(struct dp_panel *dp_panel);
99 #endif /* _DP_PANEL_H_ */
100