xref: /openbmc/linux/drivers/gpu/drm/msm/dp/dp_panel.c (revision d5771670)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
4  */
5 
6 #include "dp_panel.h"
7 
8 #include <drm/drm_connector.h>
9 #include <drm/drm_edid.h>
10 #include <drm/drm_print.h>
11 
12 struct dp_panel_private {
13 	struct device *dev;
14 	struct drm_device *drm_dev;
15 	struct dp_panel dp_panel;
16 	struct drm_dp_aux *aux;
17 	struct dp_link *link;
18 	struct dp_catalog *catalog;
19 	bool panel_on;
20 	bool aux_cfg_update_done;
21 };
22 
23 static int dp_panel_read_dpcd(struct dp_panel *dp_panel)
24 {
25 	int rc = 0;
26 	size_t len;
27 	ssize_t rlen;
28 	struct dp_panel_private *panel;
29 	struct dp_link_info *link_info;
30 	u8 *dpcd, major = 0, minor = 0, temp;
31 	u32 offset = DP_DPCD_REV;
32 
33 	dpcd = dp_panel->dpcd;
34 
35 	panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
36 	link_info = &dp_panel->link_info;
37 
38 	rlen = drm_dp_dpcd_read(panel->aux, offset,
39 			dpcd, (DP_RECEIVER_CAP_SIZE + 1));
40 	if (rlen < (DP_RECEIVER_CAP_SIZE + 1)) {
41 		DRM_ERROR("dpcd read failed, rlen=%zd\n", rlen);
42 		if (rlen == -ETIMEDOUT)
43 			rc = rlen;
44 		else
45 			rc = -EINVAL;
46 
47 		goto end;
48 	}
49 
50 	temp = dpcd[DP_TRAINING_AUX_RD_INTERVAL];
51 
52 	/* check for EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT */
53 	if (temp & BIT(7)) {
54 		drm_dbg_dp(panel->drm_dev,
55 				"using EXTENDED_RECEIVER_CAPABILITY_FIELD\n");
56 		offset = DPRX_EXTENDED_DPCD_FIELD;
57 	}
58 
59 	rlen = drm_dp_dpcd_read(panel->aux, offset,
60 		dpcd, (DP_RECEIVER_CAP_SIZE + 1));
61 	if (rlen < (DP_RECEIVER_CAP_SIZE + 1)) {
62 		DRM_ERROR("dpcd read failed, rlen=%zd\n", rlen);
63 		if (rlen == -ETIMEDOUT)
64 			rc = rlen;
65 		else
66 			rc = -EINVAL;
67 
68 		goto end;
69 	}
70 
71 	link_info->revision = dpcd[DP_DPCD_REV];
72 	major = (link_info->revision >> 4) & 0x0f;
73 	minor = link_info->revision & 0x0f;
74 
75 	link_info->rate = drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]);
76 	link_info->num_lanes = dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK;
77 
78 	if (link_info->num_lanes > dp_panel->max_dp_lanes)
79 		link_info->num_lanes = dp_panel->max_dp_lanes;
80 
81 	/* Limit support upto HBR2 until HBR3 support is added */
82 	if (link_info->rate >= (drm_dp_bw_code_to_link_rate(DP_LINK_BW_5_4)))
83 		link_info->rate = drm_dp_bw_code_to_link_rate(DP_LINK_BW_5_4);
84 
85 	drm_dbg_dp(panel->drm_dev, "version: %d.%d\n", major, minor);
86 	drm_dbg_dp(panel->drm_dev, "link_rate=%d\n", link_info->rate);
87 	drm_dbg_dp(panel->drm_dev, "lane_count=%d\n", link_info->num_lanes);
88 
89 	if (drm_dp_enhanced_frame_cap(dpcd))
90 		link_info->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;
91 
92 	dp_panel->dfp_present = dpcd[DP_DOWNSTREAMPORT_PRESENT];
93 	dp_panel->dfp_present &= DP_DWN_STRM_PORT_PRESENT;
94 
95 	if (dp_panel->dfp_present && (dpcd[DP_DPCD_REV] > 0x10)) {
96 		dp_panel->ds_port_cnt = dpcd[DP_DOWN_STREAM_PORT_COUNT];
97 		dp_panel->ds_port_cnt &= DP_PORT_COUNT_MASK;
98 		len = DP_DOWNSTREAM_PORTS * DP_DOWNSTREAM_CAP_SIZE;
99 
100 		rlen = drm_dp_dpcd_read(panel->aux,
101 			DP_DOWNSTREAM_PORT_0, dp_panel->ds_cap_info, len);
102 		if (rlen < len) {
103 			DRM_ERROR("ds port status failed, rlen=%zd\n", rlen);
104 			rc = -EINVAL;
105 			goto end;
106 		}
107 	}
108 
109 end:
110 	return rc;
111 }
112 
113 static u32 dp_panel_get_supported_bpp(struct dp_panel *dp_panel,
114 		u32 mode_edid_bpp, u32 mode_pclk_khz)
115 {
116 	struct dp_link_info *link_info;
117 	const u32 max_supported_bpp = 30, min_supported_bpp = 18;
118 	u32 bpp = 0, data_rate_khz = 0;
119 
120 	bpp = min_t(u32, mode_edid_bpp, max_supported_bpp);
121 
122 	link_info = &dp_panel->link_info;
123 	data_rate_khz = link_info->num_lanes * link_info->rate * 8;
124 
125 	while (bpp > min_supported_bpp) {
126 		if (mode_pclk_khz * bpp <= data_rate_khz)
127 			break;
128 		bpp -= 6;
129 	}
130 
131 	return bpp;
132 }
133 
134 static int dp_panel_update_modes(struct drm_connector *connector,
135 	struct edid *edid)
136 {
137 	int rc = 0;
138 
139 	if (edid) {
140 		rc = drm_connector_update_edid_property(connector, edid);
141 		if (rc) {
142 			DRM_ERROR("failed to update edid property %d\n", rc);
143 			return rc;
144 		}
145 		rc = drm_add_edid_modes(connector, edid);
146 		return rc;
147 	}
148 
149 	rc = drm_connector_update_edid_property(connector, NULL);
150 	if (rc)
151 		DRM_ERROR("failed to update edid property %d\n", rc);
152 
153 	return rc;
154 }
155 
156 void dp_panel_add_fail_safe_mode(struct drm_connector *connector)
157 {
158 	/* fail safe edid */
159 	mutex_lock(&connector->dev->mode_config.mutex);
160 	if (drm_add_modes_noedid(connector, 640, 480))
161 		drm_set_preferred_mode(connector, 640, 480);
162 	mutex_unlock(&connector->dev->mode_config.mutex);
163 }
164 
165 int dp_panel_read_sink_caps(struct dp_panel *dp_panel,
166 	struct drm_connector *connector)
167 {
168 	int rc = 0, bw_code;
169 	int rlen, count;
170 	struct dp_panel_private *panel;
171 
172 	if (!dp_panel || !connector) {
173 		DRM_ERROR("invalid input\n");
174 		return -EINVAL;
175 	}
176 
177 	panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
178 
179 	rc = dp_panel_read_dpcd(dp_panel);
180 	if (rc) {
181 		DRM_ERROR("read dpcd failed %d\n", rc);
182 		return rc;
183 	}
184 
185 	bw_code = drm_dp_link_rate_to_bw_code(dp_panel->link_info.rate);
186 	if (!is_link_rate_valid(bw_code) ||
187 			!is_lane_count_valid(dp_panel->link_info.num_lanes) ||
188 			(bw_code > dp_panel->max_bw_code)) {
189 		DRM_ERROR("Illegal link rate=%d lane=%d\n", dp_panel->link_info.rate,
190 				dp_panel->link_info.num_lanes);
191 		return -EINVAL;
192 	}
193 
194 	if (dp_panel->dfp_present) {
195 		rlen = drm_dp_dpcd_read(panel->aux, DP_SINK_COUNT,
196 				&count, 1);
197 		if (rlen == 1) {
198 			count = DP_GET_SINK_COUNT(count);
199 			if (!count) {
200 				DRM_ERROR("no downstream ports connected\n");
201 				panel->link->sink_count = 0;
202 				rc = -ENOTCONN;
203 				goto end;
204 			}
205 		}
206 	}
207 
208 	kfree(dp_panel->edid);
209 	dp_panel->edid = NULL;
210 
211 	dp_panel->edid = drm_get_edid(connector,
212 					      &panel->aux->ddc);
213 	if (!dp_panel->edid) {
214 		DRM_ERROR("panel edid read failed\n");
215 		/* check edid read fail is due to unplug */
216 		if (!dp_catalog_link_is_connected(panel->catalog)) {
217 			rc = -ETIMEDOUT;
218 			goto end;
219 		}
220 
221 		dp_panel_add_fail_safe_mode(connector);
222 	}
223 
224 	if (panel->aux_cfg_update_done) {
225 		drm_dbg_dp(panel->drm_dev,
226 				"read DPCD with updated AUX config\n");
227 		rc = dp_panel_read_dpcd(dp_panel);
228 		bw_code = drm_dp_link_rate_to_bw_code(dp_panel->link_info.rate);
229 		if (rc || !is_link_rate_valid(bw_code) ||
230 			!is_lane_count_valid(dp_panel->link_info.num_lanes)
231 			|| (bw_code > dp_panel->max_bw_code)) {
232 			DRM_ERROR("read dpcd failed %d\n", rc);
233 			return rc;
234 		}
235 		panel->aux_cfg_update_done = false;
236 	}
237 end:
238 	return rc;
239 }
240 
241 u32 dp_panel_get_mode_bpp(struct dp_panel *dp_panel,
242 		u32 mode_edid_bpp, u32 mode_pclk_khz)
243 {
244 	struct dp_panel_private *panel;
245 	u32 bpp;
246 
247 	if (!dp_panel || !mode_edid_bpp || !mode_pclk_khz) {
248 		DRM_ERROR("invalid input\n");
249 		return 0;
250 	}
251 
252 	panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
253 
254 	if (dp_panel->video_test)
255 		bpp = dp_link_bit_depth_to_bpp(
256 				panel->link->test_video.test_bit_depth);
257 	else
258 		bpp = dp_panel_get_supported_bpp(dp_panel, mode_edid_bpp,
259 				mode_pclk_khz);
260 
261 	return bpp;
262 }
263 
264 int dp_panel_get_modes(struct dp_panel *dp_panel,
265 	struct drm_connector *connector)
266 {
267 	if (!dp_panel) {
268 		DRM_ERROR("invalid input\n");
269 		return -EINVAL;
270 	}
271 
272 	if (dp_panel->edid)
273 		return dp_panel_update_modes(connector, dp_panel->edid);
274 
275 	return 0;
276 }
277 
278 static u8 dp_panel_get_edid_checksum(struct edid *edid)
279 {
280 	struct edid *last_block;
281 	u8 *raw_edid;
282 	bool is_edid_corrupt = false;
283 
284 	if (!edid) {
285 		DRM_ERROR("invalid edid input\n");
286 		return 0;
287 	}
288 
289 	raw_edid = (u8 *)edid;
290 	raw_edid += (edid->extensions * EDID_LENGTH);
291 	last_block = (struct edid *)raw_edid;
292 
293 	/* block type extension */
294 	drm_edid_block_valid(raw_edid, 1, false, &is_edid_corrupt);
295 	if (!is_edid_corrupt)
296 		return last_block->checksum;
297 
298 	DRM_ERROR("Invalid block, no checksum\n");
299 	return 0;
300 }
301 
302 void dp_panel_handle_sink_request(struct dp_panel *dp_panel)
303 {
304 	struct dp_panel_private *panel;
305 
306 	if (!dp_panel) {
307 		DRM_ERROR("invalid input\n");
308 		return;
309 	}
310 
311 	panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
312 
313 	if (panel->link->sink_request & DP_TEST_LINK_EDID_READ) {
314 		u8 checksum;
315 
316 		if (dp_panel->edid)
317 			checksum = dp_panel_get_edid_checksum(dp_panel->edid);
318 		else
319 			checksum = dp_panel->connector->real_edid_checksum;
320 
321 		dp_link_send_edid_checksum(panel->link, checksum);
322 		dp_link_send_test_response(panel->link);
323 	}
324 }
325 
326 void dp_panel_tpg_config(struct dp_panel *dp_panel, bool enable)
327 {
328 	struct dp_catalog *catalog;
329 	struct dp_panel_private *panel;
330 
331 	if (!dp_panel) {
332 		DRM_ERROR("invalid input\n");
333 		return;
334 	}
335 
336 	panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
337 	catalog = panel->catalog;
338 
339 	if (!panel->panel_on) {
340 		drm_dbg_dp(panel->drm_dev,
341 				"DP panel not enabled, handle TPG on next on\n");
342 		return;
343 	}
344 
345 	if (!enable) {
346 		dp_catalog_panel_tpg_disable(catalog);
347 		return;
348 	}
349 
350 	drm_dbg_dp(panel->drm_dev, "calling catalog tpg_enable\n");
351 	dp_catalog_panel_tpg_enable(catalog, &panel->dp_panel.dp_mode.drm_mode);
352 }
353 
354 void dp_panel_dump_regs(struct dp_panel *dp_panel)
355 {
356 	struct dp_catalog *catalog;
357 	struct dp_panel_private *panel;
358 
359 	panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
360 	catalog = panel->catalog;
361 
362 	dp_catalog_dump_regs(catalog);
363 }
364 
365 int dp_panel_timing_cfg(struct dp_panel *dp_panel)
366 {
367 	u32 data, total_ver, total_hor;
368 	struct dp_catalog *catalog;
369 	struct dp_panel_private *panel;
370 	struct drm_display_mode *drm_mode;
371 
372 	panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
373 	catalog = panel->catalog;
374 	drm_mode = &panel->dp_panel.dp_mode.drm_mode;
375 
376 	drm_dbg_dp(panel->drm_dev, "width=%d hporch= %d %d %d\n",
377 		drm_mode->hdisplay, drm_mode->htotal - drm_mode->hsync_end,
378 		drm_mode->hsync_start - drm_mode->hdisplay,
379 		drm_mode->hsync_end - drm_mode->hsync_start);
380 
381 	drm_dbg_dp(panel->drm_dev, "height=%d vporch= %d %d %d\n",
382 		drm_mode->vdisplay, drm_mode->vtotal - drm_mode->vsync_end,
383 		drm_mode->vsync_start - drm_mode->vdisplay,
384 		drm_mode->vsync_end - drm_mode->vsync_start);
385 
386 	total_hor = drm_mode->htotal;
387 
388 	total_ver = drm_mode->vtotal;
389 
390 	data = total_ver;
391 	data <<= 16;
392 	data |= total_hor;
393 
394 	catalog->total = data;
395 
396 	data = (drm_mode->vtotal - drm_mode->vsync_start);
397 	data <<= 16;
398 	data |= (drm_mode->htotal - drm_mode->hsync_start);
399 
400 	catalog->sync_start = data;
401 
402 	data = drm_mode->vsync_end - drm_mode->vsync_start;
403 	data <<= 16;
404 	data |= (panel->dp_panel.dp_mode.v_active_low << 31);
405 	data |= drm_mode->hsync_end - drm_mode->hsync_start;
406 	data |= (panel->dp_panel.dp_mode.h_active_low << 15);
407 
408 	catalog->width_blanking = data;
409 
410 	data = drm_mode->vdisplay;
411 	data <<= 16;
412 	data |= drm_mode->hdisplay;
413 
414 	catalog->dp_active = data;
415 
416 	dp_catalog_panel_timing_cfg(catalog);
417 	panel->panel_on = true;
418 
419 	return 0;
420 }
421 
422 int dp_panel_init_panel_info(struct dp_panel *dp_panel)
423 {
424 	struct drm_display_mode *drm_mode;
425 	struct dp_panel_private *panel;
426 
427 	drm_mode = &dp_panel->dp_mode.drm_mode;
428 
429 	panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
430 
431 	/*
432 	 * print resolution info as this is a result
433 	 * of user initiated action of cable connection
434 	 */
435 	drm_dbg_dp(panel->drm_dev, "SET NEW RESOLUTION:\n");
436 	drm_dbg_dp(panel->drm_dev, "%dx%d@%dfps\n",
437 		drm_mode->hdisplay, drm_mode->vdisplay, drm_mode_vrefresh(drm_mode));
438 	drm_dbg_dp(panel->drm_dev,
439 			"h_porches(back|front|width) = (%d|%d|%d)\n",
440 			drm_mode->htotal - drm_mode->hsync_end,
441 			drm_mode->hsync_start - drm_mode->hdisplay,
442 			drm_mode->hsync_end - drm_mode->hsync_start);
443 	drm_dbg_dp(panel->drm_dev,
444 			"v_porches(back|front|width) = (%d|%d|%d)\n",
445 			drm_mode->vtotal - drm_mode->vsync_end,
446 			drm_mode->vsync_start - drm_mode->vdisplay,
447 			drm_mode->vsync_end - drm_mode->vsync_start);
448 	drm_dbg_dp(panel->drm_dev, "pixel clock (KHz)=(%d)\n",
449 				drm_mode->clock);
450 	drm_dbg_dp(panel->drm_dev, "bpp = %d\n", dp_panel->dp_mode.bpp);
451 
452 	dp_panel->dp_mode.bpp = max_t(u32, 18,
453 				min_t(u32, dp_panel->dp_mode.bpp, 30));
454 	drm_dbg_dp(panel->drm_dev, "updated bpp = %d\n",
455 				dp_panel->dp_mode.bpp);
456 
457 	return 0;
458 }
459 
460 struct dp_panel *dp_panel_get(struct dp_panel_in *in)
461 {
462 	struct dp_panel_private *panel;
463 	struct dp_panel *dp_panel;
464 
465 	if (!in->dev || !in->catalog || !in->aux || !in->link) {
466 		DRM_ERROR("invalid input\n");
467 		return ERR_PTR(-EINVAL);
468 	}
469 
470 	panel = devm_kzalloc(in->dev, sizeof(*panel), GFP_KERNEL);
471 	if (!panel)
472 		return ERR_PTR(-ENOMEM);
473 
474 	panel->dev = in->dev;
475 	panel->aux = in->aux;
476 	panel->catalog = in->catalog;
477 	panel->link = in->link;
478 
479 	dp_panel = &panel->dp_panel;
480 	dp_panel->max_bw_code = DP_LINK_BW_8_1;
481 	panel->aux_cfg_update_done = false;
482 
483 	return dp_panel;
484 }
485 
486 void dp_panel_put(struct dp_panel *dp_panel)
487 {
488 	if (!dp_panel)
489 		return;
490 
491 	kfree(dp_panel->edid);
492 }
493