1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2014, The Linux Foundation. All rights reserved.
4  * Copyright (C) 2013 Red Hat
5  * Author: Rob Clark <robdclark@gmail.com>
6  */
7 
8 #include <drm/drm_fourcc.h>
9 #include <drm/drm_util.h>
10 
11 #include "mdp5_kms.h"
12 #include "mdp5_smp.h"
13 
14 
15 struct mdp5_smp {
16 	struct drm_device *dev;
17 
18 	uint8_t reserved[MAX_CLIENTS]; /* fixed MMBs allocation per client */
19 
20 	int blk_cnt;
21 	int blk_size;
22 
23 	/* register cache */
24 	u32 alloc_w[22];
25 	u32 alloc_r[22];
26 	u32 pipe_reqprio_fifo_wm0[SSPP_MAX];
27 	u32 pipe_reqprio_fifo_wm1[SSPP_MAX];
28 	u32 pipe_reqprio_fifo_wm2[SSPP_MAX];
29 };
30 
31 static inline
32 struct mdp5_kms *get_kms(struct mdp5_smp *smp)
33 {
34 	struct msm_drm_private *priv = smp->dev->dev_private;
35 
36 	return to_mdp5_kms(to_mdp_kms(priv->kms));
37 }
38 
39 static inline u32 pipe2client(enum mdp5_pipe pipe, int plane)
40 {
41 #define CID_UNUSED	0
42 
43 	if (WARN_ON(plane >= pipe2nclients(pipe)))
44 		return CID_UNUSED;
45 
46 	/*
47 	 * Note on SMP clients:
48 	 * For ViG pipes, fetch Y/Cr/Cb-components clients are always
49 	 * consecutive, and in that order.
50 	 *
51 	 * e.g.:
52 	 * if mdp5_cfg->smp.clients[SSPP_VIG0] = N,
53 	 *	Y  plane's client ID is N
54 	 *	Cr plane's client ID is N + 1
55 	 *	Cb plane's client ID is N + 2
56 	 */
57 
58 	return mdp5_cfg->smp.clients[pipe] + plane;
59 }
60 
61 /* allocate blocks for the specified request: */
62 static int smp_request_block(struct mdp5_smp *smp,
63 		struct mdp5_smp_state *state,
64 		u32 cid, int nblks)
65 {
66 	void *cs = state->client_state[cid];
67 	int i, avail, cnt = smp->blk_cnt;
68 	uint8_t reserved;
69 
70 	/* we shouldn't be requesting blocks for an in-use client: */
71 	WARN_ON(bitmap_weight(cs, cnt) > 0);
72 
73 	reserved = smp->reserved[cid];
74 
75 	if (reserved) {
76 		nblks = max(0, nblks - reserved);
77 		DBG("%d MMBs allocated (%d reserved)", nblks, reserved);
78 	}
79 
80 	avail = cnt - bitmap_weight(state->state, cnt);
81 	if (nblks > avail) {
82 		DRM_DEV_ERROR(smp->dev->dev, "out of blks (req=%d > avail=%d)\n",
83 				nblks, avail);
84 		return -ENOSPC;
85 	}
86 
87 	for (i = 0; i < nblks; i++) {
88 		int blk = find_first_zero_bit(state->state, cnt);
89 		set_bit(blk, cs);
90 		set_bit(blk, state->state);
91 	}
92 
93 	return 0;
94 }
95 
96 static void set_fifo_thresholds(struct mdp5_smp *smp,
97 		enum mdp5_pipe pipe, int nblks)
98 {
99 	u32 smp_entries_per_blk = smp->blk_size / (128 / BITS_PER_BYTE);
100 	u32 val;
101 
102 	/* 1/4 of SMP pool that is being fetched */
103 	val = (nblks * smp_entries_per_blk) / 4;
104 
105 	smp->pipe_reqprio_fifo_wm0[pipe] = val * 1;
106 	smp->pipe_reqprio_fifo_wm1[pipe] = val * 2;
107 	smp->pipe_reqprio_fifo_wm2[pipe] = val * 3;
108 }
109 
110 /*
111  * NOTE: looks like if horizontal decimation is used (if we supported that)
112  * then the width used to calculate SMP block requirements is the post-
113  * decimated width.  Ie. SMP buffering sits downstream of decimation (which
114  * presumably happens during the dma from scanout buffer).
115  */
116 uint32_t mdp5_smp_calculate(struct mdp5_smp *smp,
117 		const struct mdp_format *format,
118 		u32 width, bool hdecim)
119 {
120 	const struct drm_format_info *info = drm_format_info(format->base.pixel_format);
121 	struct mdp5_kms *mdp5_kms = get_kms(smp);
122 	int rev = mdp5_cfg_get_hw_rev(mdp5_kms->cfg);
123 	int i, hsub, nplanes, nlines;
124 	u32 fmt = format->base.pixel_format;
125 	uint32_t blkcfg = 0;
126 
127 	nplanes = info->num_planes;
128 	hsub = info->hsub;
129 
130 	/* different if BWC (compressed framebuffer?) enabled: */
131 	nlines = 2;
132 
133 	/* Newer MDPs have split/packing logic, which fetches sub-sampled
134 	 * U and V components (splits them from Y if necessary) and packs
135 	 * them together, writes to SMP using a single client.
136 	 */
137 	if ((rev > 0) && (format->chroma_sample > CHROMA_FULL)) {
138 		fmt = DRM_FORMAT_NV24;
139 		nplanes = 2;
140 
141 		/* if decimation is enabled, HW decimates less on the
142 		 * sub sampled chroma components
143 		 */
144 		if (hdecim && (hsub > 1))
145 			hsub = 1;
146 	}
147 
148 	for (i = 0; i < nplanes; i++) {
149 		int n, fetch_stride, cpp;
150 
151 		cpp = info->cpp[i];
152 		fetch_stride = width * cpp / (i ? hsub : 1);
153 
154 		n = DIV_ROUND_UP(fetch_stride * nlines, smp->blk_size);
155 
156 		/* for hw rev v1.00 */
157 		if (rev == 0)
158 			n = roundup_pow_of_two(n);
159 
160 		blkcfg |= (n << (8 * i));
161 	}
162 
163 	return blkcfg;
164 }
165 
166 int mdp5_smp_assign(struct mdp5_smp *smp, struct mdp5_smp_state *state,
167 		enum mdp5_pipe pipe, uint32_t blkcfg)
168 {
169 	struct mdp5_kms *mdp5_kms = get_kms(smp);
170 	struct drm_device *dev = mdp5_kms->dev;
171 	int i, ret;
172 
173 	for (i = 0; i < pipe2nclients(pipe); i++) {
174 		u32 cid = pipe2client(pipe, i);
175 		int n = blkcfg & 0xff;
176 
177 		if (!n)
178 			continue;
179 
180 		DBG("%s[%d]: request %d SMP blocks", pipe2name(pipe), i, n);
181 		ret = smp_request_block(smp, state, cid, n);
182 		if (ret) {
183 			DRM_DEV_ERROR(dev->dev, "Cannot allocate %d SMP blocks: %d\n",
184 					n, ret);
185 			return ret;
186 		}
187 
188 		blkcfg >>= 8;
189 	}
190 
191 	state->assigned |= (1 << pipe);
192 
193 	return 0;
194 }
195 
196 /* Release SMP blocks for all clients of the pipe */
197 void mdp5_smp_release(struct mdp5_smp *smp, struct mdp5_smp_state *state,
198 		enum mdp5_pipe pipe)
199 {
200 	int i;
201 	int cnt = smp->blk_cnt;
202 
203 	for (i = 0; i < pipe2nclients(pipe); i++) {
204 		u32 cid = pipe2client(pipe, i);
205 		void *cs = state->client_state[cid];
206 
207 		/* update global state: */
208 		bitmap_andnot(state->state, state->state, cs, cnt);
209 
210 		/* clear client's state */
211 		bitmap_zero(cs, cnt);
212 	}
213 
214 	state->released |= (1 << pipe);
215 }
216 
217 /* NOTE: SMP_ALLOC_* regs are *not* double buffered, so release has to
218  * happen after scanout completes.
219  */
220 static unsigned update_smp_state(struct mdp5_smp *smp,
221 		u32 cid, mdp5_smp_state_t *assigned)
222 {
223 	int cnt = smp->blk_cnt;
224 	unsigned nblks = 0;
225 	u32 blk, val;
226 
227 	for_each_set_bit(blk, *assigned, cnt) {
228 		int idx = blk / 3;
229 		int fld = blk % 3;
230 
231 		val = smp->alloc_w[idx];
232 
233 		switch (fld) {
234 		case 0:
235 			val &= ~MDP5_SMP_ALLOC_W_REG_CLIENT0__MASK;
236 			val |= MDP5_SMP_ALLOC_W_REG_CLIENT0(cid);
237 			break;
238 		case 1:
239 			val &= ~MDP5_SMP_ALLOC_W_REG_CLIENT1__MASK;
240 			val |= MDP5_SMP_ALLOC_W_REG_CLIENT1(cid);
241 			break;
242 		case 2:
243 			val &= ~MDP5_SMP_ALLOC_W_REG_CLIENT2__MASK;
244 			val |= MDP5_SMP_ALLOC_W_REG_CLIENT2(cid);
245 			break;
246 		}
247 
248 		smp->alloc_w[idx] = val;
249 		smp->alloc_r[idx] = val;
250 
251 		nblks++;
252 	}
253 
254 	return nblks;
255 }
256 
257 static void write_smp_alloc_regs(struct mdp5_smp *smp)
258 {
259 	struct mdp5_kms *mdp5_kms = get_kms(smp);
260 	int i, num_regs;
261 
262 	num_regs = smp->blk_cnt / 3 + 1;
263 
264 	for (i = 0; i < num_regs; i++) {
265 		mdp5_write(mdp5_kms, REG_MDP5_SMP_ALLOC_W_REG(i),
266 			   smp->alloc_w[i]);
267 		mdp5_write(mdp5_kms, REG_MDP5_SMP_ALLOC_R_REG(i),
268 			   smp->alloc_r[i]);
269 	}
270 }
271 
272 static void write_smp_fifo_regs(struct mdp5_smp *smp)
273 {
274 	struct mdp5_kms *mdp5_kms = get_kms(smp);
275 	int i;
276 
277 	for (i = 0; i < mdp5_kms->num_hwpipes; i++) {
278 		struct mdp5_hw_pipe *hwpipe = mdp5_kms->hwpipes[i];
279 		enum mdp5_pipe pipe = hwpipe->pipe;
280 
281 		mdp5_write(mdp5_kms, REG_MDP5_PIPE_REQPRIO_FIFO_WM_0(pipe),
282 			   smp->pipe_reqprio_fifo_wm0[pipe]);
283 		mdp5_write(mdp5_kms, REG_MDP5_PIPE_REQPRIO_FIFO_WM_1(pipe),
284 			   smp->pipe_reqprio_fifo_wm1[pipe]);
285 		mdp5_write(mdp5_kms, REG_MDP5_PIPE_REQPRIO_FIFO_WM_2(pipe),
286 			   smp->pipe_reqprio_fifo_wm2[pipe]);
287 	}
288 }
289 
290 void mdp5_smp_prepare_commit(struct mdp5_smp *smp, struct mdp5_smp_state *state)
291 {
292 	enum mdp5_pipe pipe;
293 
294 	for_each_set_bit(pipe, &state->assigned, sizeof(state->assigned) * 8) {
295 		unsigned i, nblks = 0;
296 
297 		for (i = 0; i < pipe2nclients(pipe); i++) {
298 			u32 cid = pipe2client(pipe, i);
299 			void *cs = state->client_state[cid];
300 
301 			nblks += update_smp_state(smp, cid, cs);
302 
303 			DBG("assign %s:%u, %u blks",
304 				pipe2name(pipe), i, nblks);
305 		}
306 
307 		set_fifo_thresholds(smp, pipe, nblks);
308 	}
309 
310 	write_smp_alloc_regs(smp);
311 	write_smp_fifo_regs(smp);
312 
313 	state->assigned = 0;
314 }
315 
316 void mdp5_smp_complete_commit(struct mdp5_smp *smp, struct mdp5_smp_state *state)
317 {
318 	enum mdp5_pipe pipe;
319 
320 	for_each_set_bit(pipe, &state->released, sizeof(state->released) * 8) {
321 		DBG("release %s", pipe2name(pipe));
322 		set_fifo_thresholds(smp, pipe, 0);
323 	}
324 
325 	write_smp_fifo_regs(smp);
326 
327 	state->released = 0;
328 }
329 
330 void mdp5_smp_dump(struct mdp5_smp *smp, struct drm_printer *p)
331 {
332 	struct mdp5_kms *mdp5_kms = get_kms(smp);
333 	struct mdp5_hw_pipe_state *hwpstate;
334 	struct mdp5_smp_state *state;
335 	struct mdp5_global_state *global_state;
336 	int total = 0, i, j;
337 
338 	drm_printf(p, "name\tinuse\tplane\n");
339 	drm_printf(p, "----\t-----\t-----\n");
340 
341 	if (drm_can_sleep())
342 		drm_modeset_lock(&mdp5_kms->glob_state_lock, NULL);
343 
344 	global_state = mdp5_get_existing_global_state(mdp5_kms);
345 
346 	/* grab these *after* we hold the state_lock */
347 	hwpstate = &global_state->hwpipe;
348 	state = &global_state->smp;
349 
350 	for (i = 0; i < mdp5_kms->num_hwpipes; i++) {
351 		struct mdp5_hw_pipe *hwpipe = mdp5_kms->hwpipes[i];
352 		struct drm_plane *plane = hwpstate->hwpipe_to_plane[hwpipe->idx];
353 		enum mdp5_pipe pipe = hwpipe->pipe;
354 		for (j = 0; j < pipe2nclients(pipe); j++) {
355 			u32 cid = pipe2client(pipe, j);
356 			void *cs = state->client_state[cid];
357 			int inuse = bitmap_weight(cs, smp->blk_cnt);
358 
359 			drm_printf(p, "%s:%d\t%d\t%s\n",
360 				pipe2name(pipe), j, inuse,
361 				plane ? plane->name : NULL);
362 
363 			total += inuse;
364 		}
365 	}
366 
367 	drm_printf(p, "TOTAL:\t%d\t(of %d)\n", total, smp->blk_cnt);
368 	drm_printf(p, "AVAIL:\t%d\n", smp->blk_cnt -
369 			bitmap_weight(state->state, smp->blk_cnt));
370 
371 	if (drm_can_sleep())
372 		drm_modeset_unlock(&mdp5_kms->glob_state_lock);
373 }
374 
375 void mdp5_smp_destroy(struct mdp5_smp *smp)
376 {
377 	kfree(smp);
378 }
379 
380 struct mdp5_smp *mdp5_smp_init(struct mdp5_kms *mdp5_kms, const struct mdp5_smp_block *cfg)
381 {
382 	struct mdp5_smp_state *state;
383 	struct mdp5_global_state *global_state;
384 	struct mdp5_smp *smp = NULL;
385 	int ret;
386 
387 	smp = kzalloc(sizeof(*smp), GFP_KERNEL);
388 	if (unlikely(!smp)) {
389 		ret = -ENOMEM;
390 		goto fail;
391 	}
392 
393 	smp->dev = mdp5_kms->dev;
394 	smp->blk_cnt = cfg->mmb_count;
395 	smp->blk_size = cfg->mmb_size;
396 
397 	global_state = mdp5_get_existing_global_state(mdp5_kms);
398 	state = &global_state->smp;
399 
400 	/* statically tied MMBs cannot be re-allocated: */
401 	bitmap_copy(state->state, cfg->reserved_state, smp->blk_cnt);
402 	memcpy(smp->reserved, cfg->reserved, sizeof(smp->reserved));
403 
404 	return smp;
405 fail:
406 	if (smp)
407 		mdp5_smp_destroy(smp);
408 
409 	return ERR_PTR(ret);
410 }
411