1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2013 Red Hat
4  * Author: Rob Clark <robdclark@gmail.com>
5  */
6 
7 #include <drm/drm_atomic.h>
8 #include <drm/drm_damage_helper.h>
9 #include <drm/drm_fourcc.h>
10 #include <drm/drm_framebuffer.h>
11 #include <drm/drm_gem_atomic_helper.h>
12 
13 #include "mdp4_kms.h"
14 
15 #define DOWN_SCALE_MAX	8
16 #define UP_SCALE_MAX	8
17 
18 struct mdp4_plane {
19 	struct drm_plane base;
20 	const char *name;
21 
22 	enum mdp4_pipe pipe;
23 
24 	uint32_t caps;
25 	uint32_t nformats;
26 	uint32_t formats[32];
27 
28 	bool enabled;
29 };
30 #define to_mdp4_plane(x) container_of(x, struct mdp4_plane, base)
31 
32 /* MDP format helper functions */
33 static inline
34 enum mdp4_frame_format mdp4_get_frame_format(struct drm_framebuffer *fb)
35 {
36 	bool is_tile = false;
37 
38 	if (fb->modifier == DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
39 		is_tile = true;
40 
41 	if (fb->format->format == DRM_FORMAT_NV12 && is_tile)
42 		return FRAME_TILE_YCBCR_420;
43 
44 	return FRAME_LINEAR;
45 }
46 
47 static void mdp4_plane_set_scanout(struct drm_plane *plane,
48 		struct drm_framebuffer *fb);
49 static int mdp4_plane_mode_set(struct drm_plane *plane,
50 		struct drm_crtc *crtc, struct drm_framebuffer *fb,
51 		int crtc_x, int crtc_y,
52 		unsigned int crtc_w, unsigned int crtc_h,
53 		uint32_t src_x, uint32_t src_y,
54 		uint32_t src_w, uint32_t src_h);
55 
56 static struct mdp4_kms *get_kms(struct drm_plane *plane)
57 {
58 	struct msm_drm_private *priv = plane->dev->dev_private;
59 	return to_mdp4_kms(to_mdp_kms(priv->kms));
60 }
61 
62 static void mdp4_plane_destroy(struct drm_plane *plane)
63 {
64 	struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
65 
66 	drm_plane_cleanup(plane);
67 
68 	kfree(mdp4_plane);
69 }
70 
71 /* helper to install properties which are common to planes and crtcs */
72 static void mdp4_plane_install_properties(struct drm_plane *plane,
73 		struct drm_mode_object *obj)
74 {
75 	// XXX
76 }
77 
78 static int mdp4_plane_set_property(struct drm_plane *plane,
79 		struct drm_property *property, uint64_t val)
80 {
81 	// XXX
82 	return -EINVAL;
83 }
84 
85 static const struct drm_plane_funcs mdp4_plane_funcs = {
86 		.update_plane = drm_atomic_helper_update_plane,
87 		.disable_plane = drm_atomic_helper_disable_plane,
88 		.destroy = mdp4_plane_destroy,
89 		.set_property = mdp4_plane_set_property,
90 		.reset = drm_atomic_helper_plane_reset,
91 		.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
92 		.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
93 };
94 
95 static int mdp4_plane_prepare_fb(struct drm_plane *plane,
96 				 struct drm_plane_state *new_state)
97 {
98 	struct msm_drm_private *priv = plane->dev->dev_private;
99 	struct msm_kms *kms = priv->kms;
100 
101 	if (!new_state->fb)
102 		return 0;
103 
104 	drm_gem_plane_helper_prepare_fb(plane, new_state);
105 
106 	return msm_framebuffer_prepare(new_state->fb, kms->aspace, false);
107 }
108 
109 static void mdp4_plane_cleanup_fb(struct drm_plane *plane,
110 				  struct drm_plane_state *old_state)
111 {
112 	struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
113 	struct mdp4_kms *mdp4_kms = get_kms(plane);
114 	struct msm_kms *kms = &mdp4_kms->base.base;
115 	struct drm_framebuffer *fb = old_state->fb;
116 
117 	if (!fb)
118 		return;
119 
120 	DBG("%s: cleanup: FB[%u]", mdp4_plane->name, fb->base.id);
121 	msm_framebuffer_cleanup(fb, kms->aspace, false);
122 }
123 
124 
125 static int mdp4_plane_atomic_check(struct drm_plane *plane,
126 		struct drm_atomic_state *state)
127 {
128 	return 0;
129 }
130 
131 static void mdp4_plane_atomic_update(struct drm_plane *plane,
132 				     struct drm_atomic_state *state)
133 {
134 	struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
135 									   plane);
136 	int ret;
137 
138 	ret = mdp4_plane_mode_set(plane,
139 			new_state->crtc, new_state->fb,
140 			new_state->crtc_x, new_state->crtc_y,
141 			new_state->crtc_w, new_state->crtc_h,
142 			new_state->src_x,  new_state->src_y,
143 			new_state->src_w, new_state->src_h);
144 	/* atomic_check should have ensured that this doesn't fail */
145 	WARN_ON(ret < 0);
146 }
147 
148 static const struct drm_plane_helper_funcs mdp4_plane_helper_funcs = {
149 		.prepare_fb = mdp4_plane_prepare_fb,
150 		.cleanup_fb = mdp4_plane_cleanup_fb,
151 		.atomic_check = mdp4_plane_atomic_check,
152 		.atomic_update = mdp4_plane_atomic_update,
153 };
154 
155 static void mdp4_plane_set_scanout(struct drm_plane *plane,
156 		struct drm_framebuffer *fb)
157 {
158 	struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
159 	struct mdp4_kms *mdp4_kms = get_kms(plane);
160 	struct msm_kms *kms = &mdp4_kms->base.base;
161 	enum mdp4_pipe pipe = mdp4_plane->pipe;
162 
163 	mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_A(pipe),
164 			MDP4_PIPE_SRC_STRIDE_A_P0(fb->pitches[0]) |
165 			MDP4_PIPE_SRC_STRIDE_A_P1(fb->pitches[1]));
166 
167 	mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_B(pipe),
168 			MDP4_PIPE_SRC_STRIDE_B_P2(fb->pitches[2]) |
169 			MDP4_PIPE_SRC_STRIDE_B_P3(fb->pitches[3]));
170 
171 	mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP0_BASE(pipe),
172 			msm_framebuffer_iova(fb, kms->aspace, 0));
173 	mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP1_BASE(pipe),
174 			msm_framebuffer_iova(fb, kms->aspace, 1));
175 	mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP2_BASE(pipe),
176 			msm_framebuffer_iova(fb, kms->aspace, 2));
177 	mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP3_BASE(pipe),
178 			msm_framebuffer_iova(fb, kms->aspace, 3));
179 }
180 
181 static void mdp4_write_csc_config(struct mdp4_kms *mdp4_kms,
182 		enum mdp4_pipe pipe, struct csc_cfg *csc)
183 {
184 	int i;
185 
186 	for (i = 0; i < ARRAY_SIZE(csc->matrix); i++) {
187 		mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_MV(pipe, i),
188 				csc->matrix[i]);
189 	}
190 
191 	for (i = 0; i < ARRAY_SIZE(csc->post_bias) ; i++) {
192 		mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_BV(pipe, i),
193 				csc->pre_bias[i]);
194 
195 		mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_BV(pipe, i),
196 				csc->post_bias[i]);
197 	}
198 
199 	for (i = 0; i < ARRAY_SIZE(csc->post_clamp) ; i++) {
200 		mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_LV(pipe, i),
201 				csc->pre_clamp[i]);
202 
203 		mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_LV(pipe, i),
204 				csc->post_clamp[i]);
205 	}
206 }
207 
208 #define MDP4_VG_PHASE_STEP_DEFAULT	0x20000000
209 
210 static int mdp4_plane_mode_set(struct drm_plane *plane,
211 		struct drm_crtc *crtc, struct drm_framebuffer *fb,
212 		int crtc_x, int crtc_y,
213 		unsigned int crtc_w, unsigned int crtc_h,
214 		uint32_t src_x, uint32_t src_y,
215 		uint32_t src_w, uint32_t src_h)
216 {
217 	struct drm_device *dev = plane->dev;
218 	struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
219 	struct mdp4_kms *mdp4_kms = get_kms(plane);
220 	enum mdp4_pipe pipe = mdp4_plane->pipe;
221 	const struct mdp_format *format;
222 	uint32_t op_mode = 0;
223 	uint32_t phasex_step = MDP4_VG_PHASE_STEP_DEFAULT;
224 	uint32_t phasey_step = MDP4_VG_PHASE_STEP_DEFAULT;
225 	enum mdp4_frame_format frame_type;
226 
227 	if (!(crtc && fb)) {
228 		DBG("%s: disabled!", mdp4_plane->name);
229 		return 0;
230 	}
231 
232 	frame_type = mdp4_get_frame_format(fb);
233 
234 	/* src values are in Q16 fixed point, convert to integer: */
235 	src_x = src_x >> 16;
236 	src_y = src_y >> 16;
237 	src_w = src_w >> 16;
238 	src_h = src_h >> 16;
239 
240 	DBG("%s: FB[%u] %u,%u,%u,%u -> CRTC[%u] %d,%d,%u,%u", mdp4_plane->name,
241 			fb->base.id, src_x, src_y, src_w, src_h,
242 			crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h);
243 
244 	format = to_mdp_format(msm_framebuffer_format(fb));
245 
246 	if (src_w > (crtc_w * DOWN_SCALE_MAX)) {
247 		DRM_DEV_ERROR(dev->dev, "Width down scaling exceeds limits!\n");
248 		return -ERANGE;
249 	}
250 
251 	if (src_h > (crtc_h * DOWN_SCALE_MAX)) {
252 		DRM_DEV_ERROR(dev->dev, "Height down scaling exceeds limits!\n");
253 		return -ERANGE;
254 	}
255 
256 	if (crtc_w > (src_w * UP_SCALE_MAX)) {
257 		DRM_DEV_ERROR(dev->dev, "Width up scaling exceeds limits!\n");
258 		return -ERANGE;
259 	}
260 
261 	if (crtc_h > (src_h * UP_SCALE_MAX)) {
262 		DRM_DEV_ERROR(dev->dev, "Height up scaling exceeds limits!\n");
263 		return -ERANGE;
264 	}
265 
266 	if (src_w != crtc_w) {
267 		uint32_t sel_unit = SCALE_FIR;
268 		op_mode |= MDP4_PIPE_OP_MODE_SCALEX_EN;
269 
270 		if (MDP_FORMAT_IS_YUV(format)) {
271 			if (crtc_w > src_w)
272 				sel_unit = SCALE_PIXEL_RPT;
273 			else if (crtc_w <= (src_w / 4))
274 				sel_unit = SCALE_MN_PHASE;
275 
276 			op_mode |= MDP4_PIPE_OP_MODE_SCALEX_UNIT_SEL(sel_unit);
277 			phasex_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT,
278 					src_w, crtc_w);
279 		}
280 	}
281 
282 	if (src_h != crtc_h) {
283 		uint32_t sel_unit = SCALE_FIR;
284 		op_mode |= MDP4_PIPE_OP_MODE_SCALEY_EN;
285 
286 		if (MDP_FORMAT_IS_YUV(format)) {
287 
288 			if (crtc_h > src_h)
289 				sel_unit = SCALE_PIXEL_RPT;
290 			else if (crtc_h <= (src_h / 4))
291 				sel_unit = SCALE_MN_PHASE;
292 
293 			op_mode |= MDP4_PIPE_OP_MODE_SCALEY_UNIT_SEL(sel_unit);
294 			phasey_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT,
295 					src_h, crtc_h);
296 		}
297 	}
298 
299 	mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_SIZE(pipe),
300 			MDP4_PIPE_SRC_SIZE_WIDTH(src_w) |
301 			MDP4_PIPE_SRC_SIZE_HEIGHT(src_h));
302 
303 	mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_XY(pipe),
304 			MDP4_PIPE_SRC_XY_X(src_x) |
305 			MDP4_PIPE_SRC_XY_Y(src_y));
306 
307 	mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_SIZE(pipe),
308 			MDP4_PIPE_DST_SIZE_WIDTH(crtc_w) |
309 			MDP4_PIPE_DST_SIZE_HEIGHT(crtc_h));
310 
311 	mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_XY(pipe),
312 			MDP4_PIPE_DST_XY_X(crtc_x) |
313 			MDP4_PIPE_DST_XY_Y(crtc_y));
314 
315 	mdp4_plane_set_scanout(plane, fb);
316 
317 	mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_FORMAT(pipe),
318 			MDP4_PIPE_SRC_FORMAT_A_BPC(format->bpc_a) |
319 			MDP4_PIPE_SRC_FORMAT_R_BPC(format->bpc_r) |
320 			MDP4_PIPE_SRC_FORMAT_G_BPC(format->bpc_g) |
321 			MDP4_PIPE_SRC_FORMAT_B_BPC(format->bpc_b) |
322 			COND(format->alpha_enable, MDP4_PIPE_SRC_FORMAT_ALPHA_ENABLE) |
323 			MDP4_PIPE_SRC_FORMAT_CPP(format->cpp - 1) |
324 			MDP4_PIPE_SRC_FORMAT_UNPACK_COUNT(format->unpack_count - 1) |
325 			MDP4_PIPE_SRC_FORMAT_FETCH_PLANES(format->fetch_type) |
326 			MDP4_PIPE_SRC_FORMAT_CHROMA_SAMP(format->chroma_sample) |
327 			MDP4_PIPE_SRC_FORMAT_FRAME_FORMAT(frame_type) |
328 			COND(format->unpack_tight, MDP4_PIPE_SRC_FORMAT_UNPACK_TIGHT));
329 
330 	mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_UNPACK(pipe),
331 			MDP4_PIPE_SRC_UNPACK_ELEM0(format->unpack[0]) |
332 			MDP4_PIPE_SRC_UNPACK_ELEM1(format->unpack[1]) |
333 			MDP4_PIPE_SRC_UNPACK_ELEM2(format->unpack[2]) |
334 			MDP4_PIPE_SRC_UNPACK_ELEM3(format->unpack[3]));
335 
336 	if (MDP_FORMAT_IS_YUV(format)) {
337 		struct csc_cfg *csc = mdp_get_default_csc_cfg(CSC_YUV2RGB);
338 
339 		op_mode |= MDP4_PIPE_OP_MODE_SRC_YCBCR;
340 		op_mode |= MDP4_PIPE_OP_MODE_CSC_EN;
341 		mdp4_write_csc_config(mdp4_kms, pipe, csc);
342 	}
343 
344 	mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(pipe), op_mode);
345 	mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEX_STEP(pipe), phasex_step);
346 	mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEY_STEP(pipe), phasey_step);
347 
348 	if (frame_type != FRAME_LINEAR)
349 		mdp4_write(mdp4_kms, REG_MDP4_PIPE_SSTILE_FRAME_SIZE(pipe),
350 				MDP4_PIPE_SSTILE_FRAME_SIZE_WIDTH(src_w) |
351 				MDP4_PIPE_SSTILE_FRAME_SIZE_HEIGHT(src_h));
352 
353 	return 0;
354 }
355 
356 static const char *pipe_names[] = {
357 		"VG1", "VG2",
358 		"RGB1", "RGB2", "RGB3",
359 		"VG3", "VG4",
360 };
361 
362 enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane)
363 {
364 	struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
365 	return mdp4_plane->pipe;
366 }
367 
368 static const uint64_t supported_format_modifiers[] = {
369 	DRM_FORMAT_MOD_SAMSUNG_64_32_TILE,
370 	DRM_FORMAT_MOD_LINEAR,
371 	DRM_FORMAT_MOD_INVALID
372 };
373 
374 /* initialize plane */
375 struct drm_plane *mdp4_plane_init(struct drm_device *dev,
376 		enum mdp4_pipe pipe_id, bool private_plane)
377 {
378 	struct drm_plane *plane = NULL;
379 	struct mdp4_plane *mdp4_plane;
380 	int ret;
381 	enum drm_plane_type type;
382 
383 	mdp4_plane = kzalloc(sizeof(*mdp4_plane), GFP_KERNEL);
384 	if (!mdp4_plane) {
385 		ret = -ENOMEM;
386 		goto fail;
387 	}
388 
389 	plane = &mdp4_plane->base;
390 
391 	mdp4_plane->pipe = pipe_id;
392 	mdp4_plane->name = pipe_names[pipe_id];
393 	mdp4_plane->caps = mdp4_pipe_caps(pipe_id);
394 
395 	mdp4_plane->nformats = mdp_get_formats(mdp4_plane->formats,
396 			ARRAY_SIZE(mdp4_plane->formats),
397 			!pipe_supports_yuv(mdp4_plane->caps));
398 
399 	type = private_plane ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY;
400 	ret = drm_universal_plane_init(dev, plane, 0xff, &mdp4_plane_funcs,
401 				 mdp4_plane->formats, mdp4_plane->nformats,
402 				 supported_format_modifiers, type, NULL);
403 	if (ret)
404 		goto fail;
405 
406 	drm_plane_helper_add(plane, &mdp4_plane_helper_funcs);
407 
408 	mdp4_plane_install_properties(plane, &plane->base);
409 
410 	drm_plane_enable_fb_damage_clips(plane);
411 
412 	return plane;
413 
414 fail:
415 	if (plane)
416 		mdp4_plane_destroy(plane);
417 
418 	return ERR_PTR(ret);
419 }
420