1 /* 2 * Copyright (C) 2013 Red Hat 3 * Author: Rob Clark <robdclark@gmail.com> 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 as published by 7 * the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #include "mdp4_kms.h" 19 20 #define DOWN_SCALE_MAX 8 21 #define UP_SCALE_MAX 8 22 23 struct mdp4_plane { 24 struct drm_plane base; 25 const char *name; 26 27 enum mdp4_pipe pipe; 28 29 uint32_t caps; 30 uint32_t nformats; 31 uint32_t formats[32]; 32 33 bool enabled; 34 }; 35 #define to_mdp4_plane(x) container_of(x, struct mdp4_plane, base) 36 37 /* MDP format helper functions */ 38 static inline 39 enum mdp4_frame_format mdp4_get_frame_format(struct drm_framebuffer *fb) 40 { 41 bool is_tile = false; 42 43 if (fb->modifier == DRM_FORMAT_MOD_SAMSUNG_64_32_TILE) 44 is_tile = true; 45 46 if (fb->format->format == DRM_FORMAT_NV12 && is_tile) 47 return FRAME_TILE_YCBCR_420; 48 49 return FRAME_LINEAR; 50 } 51 52 static void mdp4_plane_set_scanout(struct drm_plane *plane, 53 struct drm_framebuffer *fb); 54 static int mdp4_plane_mode_set(struct drm_plane *plane, 55 struct drm_crtc *crtc, struct drm_framebuffer *fb, 56 int crtc_x, int crtc_y, 57 unsigned int crtc_w, unsigned int crtc_h, 58 uint32_t src_x, uint32_t src_y, 59 uint32_t src_w, uint32_t src_h); 60 61 static struct mdp4_kms *get_kms(struct drm_plane *plane) 62 { 63 struct msm_drm_private *priv = plane->dev->dev_private; 64 return to_mdp4_kms(to_mdp_kms(priv->kms)); 65 } 66 67 static void mdp4_plane_destroy(struct drm_plane *plane) 68 { 69 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); 70 71 drm_plane_helper_disable(plane, NULL); 72 drm_plane_cleanup(plane); 73 74 kfree(mdp4_plane); 75 } 76 77 /* helper to install properties which are common to planes and crtcs */ 78 static void mdp4_plane_install_properties(struct drm_plane *plane, 79 struct drm_mode_object *obj) 80 { 81 // XXX 82 } 83 84 static int mdp4_plane_set_property(struct drm_plane *plane, 85 struct drm_property *property, uint64_t val) 86 { 87 // XXX 88 return -EINVAL; 89 } 90 91 static const struct drm_plane_funcs mdp4_plane_funcs = { 92 .update_plane = drm_atomic_helper_update_plane, 93 .disable_plane = drm_atomic_helper_disable_plane, 94 .destroy = mdp4_plane_destroy, 95 .set_property = mdp4_plane_set_property, 96 .reset = drm_atomic_helper_plane_reset, 97 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, 98 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, 99 }; 100 101 static void mdp4_plane_cleanup_fb(struct drm_plane *plane, 102 struct drm_plane_state *old_state) 103 { 104 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); 105 struct mdp4_kms *mdp4_kms = get_kms(plane); 106 struct msm_kms *kms = &mdp4_kms->base.base; 107 struct drm_framebuffer *fb = old_state->fb; 108 109 if (!fb) 110 return; 111 112 DBG("%s: cleanup: FB[%u]", mdp4_plane->name, fb->base.id); 113 msm_framebuffer_cleanup(fb, kms->aspace); 114 } 115 116 117 static int mdp4_plane_atomic_check(struct drm_plane *plane, 118 struct drm_plane_state *state) 119 { 120 return 0; 121 } 122 123 static void mdp4_plane_atomic_update(struct drm_plane *plane, 124 struct drm_plane_state *old_state) 125 { 126 struct drm_plane_state *state = plane->state; 127 int ret; 128 129 ret = mdp4_plane_mode_set(plane, 130 state->crtc, state->fb, 131 state->crtc_x, state->crtc_y, 132 state->crtc_w, state->crtc_h, 133 state->src_x, state->src_y, 134 state->src_w, state->src_h); 135 /* atomic_check should have ensured that this doesn't fail */ 136 WARN_ON(ret < 0); 137 } 138 139 static const struct drm_plane_helper_funcs mdp4_plane_helper_funcs = { 140 .prepare_fb = msm_atomic_prepare_fb, 141 .cleanup_fb = mdp4_plane_cleanup_fb, 142 .atomic_check = mdp4_plane_atomic_check, 143 .atomic_update = mdp4_plane_atomic_update, 144 }; 145 146 static void mdp4_plane_set_scanout(struct drm_plane *plane, 147 struct drm_framebuffer *fb) 148 { 149 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); 150 struct mdp4_kms *mdp4_kms = get_kms(plane); 151 struct msm_kms *kms = &mdp4_kms->base.base; 152 enum mdp4_pipe pipe = mdp4_plane->pipe; 153 154 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_A(pipe), 155 MDP4_PIPE_SRC_STRIDE_A_P0(fb->pitches[0]) | 156 MDP4_PIPE_SRC_STRIDE_A_P1(fb->pitches[1])); 157 158 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_B(pipe), 159 MDP4_PIPE_SRC_STRIDE_B_P2(fb->pitches[2]) | 160 MDP4_PIPE_SRC_STRIDE_B_P3(fb->pitches[3])); 161 162 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP0_BASE(pipe), 163 msm_framebuffer_iova(fb, kms->aspace, 0)); 164 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP1_BASE(pipe), 165 msm_framebuffer_iova(fb, kms->aspace, 1)); 166 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP2_BASE(pipe), 167 msm_framebuffer_iova(fb, kms->aspace, 2)); 168 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP3_BASE(pipe), 169 msm_framebuffer_iova(fb, kms->aspace, 3)); 170 } 171 172 static void mdp4_write_csc_config(struct mdp4_kms *mdp4_kms, 173 enum mdp4_pipe pipe, struct csc_cfg *csc) 174 { 175 int i; 176 177 for (i = 0; i < ARRAY_SIZE(csc->matrix); i++) { 178 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_MV(pipe, i), 179 csc->matrix[i]); 180 } 181 182 for (i = 0; i < ARRAY_SIZE(csc->post_bias) ; i++) { 183 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_BV(pipe, i), 184 csc->pre_bias[i]); 185 186 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_BV(pipe, i), 187 csc->post_bias[i]); 188 } 189 190 for (i = 0; i < ARRAY_SIZE(csc->post_clamp) ; i++) { 191 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_LV(pipe, i), 192 csc->pre_clamp[i]); 193 194 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_LV(pipe, i), 195 csc->post_clamp[i]); 196 } 197 } 198 199 #define MDP4_VG_PHASE_STEP_DEFAULT 0x20000000 200 201 static int mdp4_plane_mode_set(struct drm_plane *plane, 202 struct drm_crtc *crtc, struct drm_framebuffer *fb, 203 int crtc_x, int crtc_y, 204 unsigned int crtc_w, unsigned int crtc_h, 205 uint32_t src_x, uint32_t src_y, 206 uint32_t src_w, uint32_t src_h) 207 { 208 struct drm_device *dev = plane->dev; 209 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); 210 struct mdp4_kms *mdp4_kms = get_kms(plane); 211 enum mdp4_pipe pipe = mdp4_plane->pipe; 212 const struct mdp_format *format; 213 uint32_t op_mode = 0; 214 uint32_t phasex_step = MDP4_VG_PHASE_STEP_DEFAULT; 215 uint32_t phasey_step = MDP4_VG_PHASE_STEP_DEFAULT; 216 enum mdp4_frame_format frame_type; 217 218 if (!(crtc && fb)) { 219 DBG("%s: disabled!", mdp4_plane->name); 220 return 0; 221 } 222 223 frame_type = mdp4_get_frame_format(fb); 224 225 /* src values are in Q16 fixed point, convert to integer: */ 226 src_x = src_x >> 16; 227 src_y = src_y >> 16; 228 src_w = src_w >> 16; 229 src_h = src_h >> 16; 230 231 DBG("%s: FB[%u] %u,%u,%u,%u -> CRTC[%u] %d,%d,%u,%u", mdp4_plane->name, 232 fb->base.id, src_x, src_y, src_w, src_h, 233 crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h); 234 235 format = to_mdp_format(msm_framebuffer_format(fb)); 236 237 if (src_w > (crtc_w * DOWN_SCALE_MAX)) { 238 dev_err(dev->dev, "Width down scaling exceeds limits!\n"); 239 return -ERANGE; 240 } 241 242 if (src_h > (crtc_h * DOWN_SCALE_MAX)) { 243 dev_err(dev->dev, "Height down scaling exceeds limits!\n"); 244 return -ERANGE; 245 } 246 247 if (crtc_w > (src_w * UP_SCALE_MAX)) { 248 dev_err(dev->dev, "Width up scaling exceeds limits!\n"); 249 return -ERANGE; 250 } 251 252 if (crtc_h > (src_h * UP_SCALE_MAX)) { 253 dev_err(dev->dev, "Height up scaling exceeds limits!\n"); 254 return -ERANGE; 255 } 256 257 if (src_w != crtc_w) { 258 uint32_t sel_unit = SCALE_FIR; 259 op_mode |= MDP4_PIPE_OP_MODE_SCALEX_EN; 260 261 if (MDP_FORMAT_IS_YUV(format)) { 262 if (crtc_w > src_w) 263 sel_unit = SCALE_PIXEL_RPT; 264 else if (crtc_w <= (src_w / 4)) 265 sel_unit = SCALE_MN_PHASE; 266 267 op_mode |= MDP4_PIPE_OP_MODE_SCALEX_UNIT_SEL(sel_unit); 268 phasex_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT, 269 src_w, crtc_w); 270 } 271 } 272 273 if (src_h != crtc_h) { 274 uint32_t sel_unit = SCALE_FIR; 275 op_mode |= MDP4_PIPE_OP_MODE_SCALEY_EN; 276 277 if (MDP_FORMAT_IS_YUV(format)) { 278 279 if (crtc_h > src_h) 280 sel_unit = SCALE_PIXEL_RPT; 281 else if (crtc_h <= (src_h / 4)) 282 sel_unit = SCALE_MN_PHASE; 283 284 op_mode |= MDP4_PIPE_OP_MODE_SCALEY_UNIT_SEL(sel_unit); 285 phasey_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT, 286 src_h, crtc_h); 287 } 288 } 289 290 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_SIZE(pipe), 291 MDP4_PIPE_SRC_SIZE_WIDTH(src_w) | 292 MDP4_PIPE_SRC_SIZE_HEIGHT(src_h)); 293 294 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_XY(pipe), 295 MDP4_PIPE_SRC_XY_X(src_x) | 296 MDP4_PIPE_SRC_XY_Y(src_y)); 297 298 mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_SIZE(pipe), 299 MDP4_PIPE_DST_SIZE_WIDTH(crtc_w) | 300 MDP4_PIPE_DST_SIZE_HEIGHT(crtc_h)); 301 302 mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_XY(pipe), 303 MDP4_PIPE_DST_XY_X(crtc_x) | 304 MDP4_PIPE_DST_XY_Y(crtc_y)); 305 306 mdp4_plane_set_scanout(plane, fb); 307 308 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_FORMAT(pipe), 309 MDP4_PIPE_SRC_FORMAT_A_BPC(format->bpc_a) | 310 MDP4_PIPE_SRC_FORMAT_R_BPC(format->bpc_r) | 311 MDP4_PIPE_SRC_FORMAT_G_BPC(format->bpc_g) | 312 MDP4_PIPE_SRC_FORMAT_B_BPC(format->bpc_b) | 313 COND(format->alpha_enable, MDP4_PIPE_SRC_FORMAT_ALPHA_ENABLE) | 314 MDP4_PIPE_SRC_FORMAT_CPP(format->cpp - 1) | 315 MDP4_PIPE_SRC_FORMAT_UNPACK_COUNT(format->unpack_count - 1) | 316 MDP4_PIPE_SRC_FORMAT_FETCH_PLANES(format->fetch_type) | 317 MDP4_PIPE_SRC_FORMAT_CHROMA_SAMP(format->chroma_sample) | 318 MDP4_PIPE_SRC_FORMAT_FRAME_FORMAT(frame_type) | 319 COND(format->unpack_tight, MDP4_PIPE_SRC_FORMAT_UNPACK_TIGHT)); 320 321 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_UNPACK(pipe), 322 MDP4_PIPE_SRC_UNPACK_ELEM0(format->unpack[0]) | 323 MDP4_PIPE_SRC_UNPACK_ELEM1(format->unpack[1]) | 324 MDP4_PIPE_SRC_UNPACK_ELEM2(format->unpack[2]) | 325 MDP4_PIPE_SRC_UNPACK_ELEM3(format->unpack[3])); 326 327 if (MDP_FORMAT_IS_YUV(format)) { 328 struct csc_cfg *csc = mdp_get_default_csc_cfg(CSC_YUV2RGB); 329 330 op_mode |= MDP4_PIPE_OP_MODE_SRC_YCBCR; 331 op_mode |= MDP4_PIPE_OP_MODE_CSC_EN; 332 mdp4_write_csc_config(mdp4_kms, pipe, csc); 333 } 334 335 mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(pipe), op_mode); 336 mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEX_STEP(pipe), phasex_step); 337 mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEY_STEP(pipe), phasey_step); 338 339 if (frame_type != FRAME_LINEAR) 340 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SSTILE_FRAME_SIZE(pipe), 341 MDP4_PIPE_SSTILE_FRAME_SIZE_WIDTH(src_w) | 342 MDP4_PIPE_SSTILE_FRAME_SIZE_HEIGHT(src_h)); 343 344 return 0; 345 } 346 347 static const char *pipe_names[] = { 348 "VG1", "VG2", 349 "RGB1", "RGB2", "RGB3", 350 "VG3", "VG4", 351 }; 352 353 enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane) 354 { 355 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); 356 return mdp4_plane->pipe; 357 } 358 359 /* initialize plane */ 360 struct drm_plane *mdp4_plane_init(struct drm_device *dev, 361 enum mdp4_pipe pipe_id, bool private_plane) 362 { 363 struct drm_plane *plane = NULL; 364 struct mdp4_plane *mdp4_plane; 365 int ret; 366 enum drm_plane_type type; 367 368 mdp4_plane = kzalloc(sizeof(*mdp4_plane), GFP_KERNEL); 369 if (!mdp4_plane) { 370 ret = -ENOMEM; 371 goto fail; 372 } 373 374 plane = &mdp4_plane->base; 375 376 mdp4_plane->pipe = pipe_id; 377 mdp4_plane->name = pipe_names[pipe_id]; 378 mdp4_plane->caps = mdp4_pipe_caps(pipe_id); 379 380 mdp4_plane->nformats = mdp_get_formats(mdp4_plane->formats, 381 ARRAY_SIZE(mdp4_plane->formats), 382 !pipe_supports_yuv(mdp4_plane->caps)); 383 384 type = private_plane ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY; 385 ret = drm_universal_plane_init(dev, plane, 0xff, &mdp4_plane_funcs, 386 mdp4_plane->formats, mdp4_plane->nformats, 387 NULL, type, NULL); 388 if (ret) 389 goto fail; 390 391 drm_plane_helper_add(plane, &mdp4_plane_helper_funcs); 392 393 mdp4_plane_install_properties(plane, &plane->base); 394 395 return plane; 396 397 fail: 398 if (plane) 399 mdp4_plane_destroy(plane); 400 401 return ERR_PTR(ret); 402 } 403