1 /* 2 * Copyright (C) 2013 Red Hat 3 * Author: Rob Clark <robdclark@gmail.com> 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 as published by 7 * the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #include "mdp4_kms.h" 19 20 #define DOWN_SCALE_MAX 8 21 #define UP_SCALE_MAX 8 22 23 struct mdp4_plane { 24 struct drm_plane base; 25 const char *name; 26 27 enum mdp4_pipe pipe; 28 29 uint32_t caps; 30 uint32_t nformats; 31 uint32_t formats[32]; 32 33 bool enabled; 34 }; 35 #define to_mdp4_plane(x) container_of(x, struct mdp4_plane, base) 36 37 /* MDP format helper functions */ 38 static inline 39 enum mdp4_frame_format mdp4_get_frame_format(struct drm_framebuffer *fb) 40 { 41 bool is_tile = false; 42 43 if (fb->modifier == DRM_FORMAT_MOD_SAMSUNG_64_32_TILE) 44 is_tile = true; 45 46 if (fb->format->format == DRM_FORMAT_NV12 && is_tile) 47 return FRAME_TILE_YCBCR_420; 48 49 return FRAME_LINEAR; 50 } 51 52 static void mdp4_plane_set_scanout(struct drm_plane *plane, 53 struct drm_framebuffer *fb); 54 static int mdp4_plane_mode_set(struct drm_plane *plane, 55 struct drm_crtc *crtc, struct drm_framebuffer *fb, 56 int crtc_x, int crtc_y, 57 unsigned int crtc_w, unsigned int crtc_h, 58 uint32_t src_x, uint32_t src_y, 59 uint32_t src_w, uint32_t src_h); 60 61 static struct mdp4_kms *get_kms(struct drm_plane *plane) 62 { 63 struct msm_drm_private *priv = plane->dev->dev_private; 64 return to_mdp4_kms(to_mdp_kms(priv->kms)); 65 } 66 67 static void mdp4_plane_destroy(struct drm_plane *plane) 68 { 69 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); 70 71 drm_plane_cleanup(plane); 72 73 kfree(mdp4_plane); 74 } 75 76 /* helper to install properties which are common to planes and crtcs */ 77 static void mdp4_plane_install_properties(struct drm_plane *plane, 78 struct drm_mode_object *obj) 79 { 80 // XXX 81 } 82 83 static int mdp4_plane_set_property(struct drm_plane *plane, 84 struct drm_property *property, uint64_t val) 85 { 86 // XXX 87 return -EINVAL; 88 } 89 90 static const struct drm_plane_funcs mdp4_plane_funcs = { 91 .update_plane = drm_atomic_helper_update_plane, 92 .disable_plane = drm_atomic_helper_disable_plane, 93 .destroy = mdp4_plane_destroy, 94 .set_property = mdp4_plane_set_property, 95 .reset = drm_atomic_helper_plane_reset, 96 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, 97 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, 98 }; 99 100 static void mdp4_plane_cleanup_fb(struct drm_plane *plane, 101 struct drm_plane_state *old_state) 102 { 103 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); 104 struct mdp4_kms *mdp4_kms = get_kms(plane); 105 struct msm_kms *kms = &mdp4_kms->base.base; 106 struct drm_framebuffer *fb = old_state->fb; 107 108 if (!fb) 109 return; 110 111 DBG("%s: cleanup: FB[%u]", mdp4_plane->name, fb->base.id); 112 msm_framebuffer_cleanup(fb, kms->aspace); 113 } 114 115 116 static int mdp4_plane_atomic_check(struct drm_plane *plane, 117 struct drm_plane_state *state) 118 { 119 return 0; 120 } 121 122 static void mdp4_plane_atomic_update(struct drm_plane *plane, 123 struct drm_plane_state *old_state) 124 { 125 struct drm_plane_state *state = plane->state; 126 int ret; 127 128 ret = mdp4_plane_mode_set(plane, 129 state->crtc, state->fb, 130 state->crtc_x, state->crtc_y, 131 state->crtc_w, state->crtc_h, 132 state->src_x, state->src_y, 133 state->src_w, state->src_h); 134 /* atomic_check should have ensured that this doesn't fail */ 135 WARN_ON(ret < 0); 136 } 137 138 static const struct drm_plane_helper_funcs mdp4_plane_helper_funcs = { 139 .prepare_fb = msm_atomic_prepare_fb, 140 .cleanup_fb = mdp4_plane_cleanup_fb, 141 .atomic_check = mdp4_plane_atomic_check, 142 .atomic_update = mdp4_plane_atomic_update, 143 }; 144 145 static void mdp4_plane_set_scanout(struct drm_plane *plane, 146 struct drm_framebuffer *fb) 147 { 148 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); 149 struct mdp4_kms *mdp4_kms = get_kms(plane); 150 struct msm_kms *kms = &mdp4_kms->base.base; 151 enum mdp4_pipe pipe = mdp4_plane->pipe; 152 153 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_A(pipe), 154 MDP4_PIPE_SRC_STRIDE_A_P0(fb->pitches[0]) | 155 MDP4_PIPE_SRC_STRIDE_A_P1(fb->pitches[1])); 156 157 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_B(pipe), 158 MDP4_PIPE_SRC_STRIDE_B_P2(fb->pitches[2]) | 159 MDP4_PIPE_SRC_STRIDE_B_P3(fb->pitches[3])); 160 161 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP0_BASE(pipe), 162 msm_framebuffer_iova(fb, kms->aspace, 0)); 163 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP1_BASE(pipe), 164 msm_framebuffer_iova(fb, kms->aspace, 1)); 165 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP2_BASE(pipe), 166 msm_framebuffer_iova(fb, kms->aspace, 2)); 167 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP3_BASE(pipe), 168 msm_framebuffer_iova(fb, kms->aspace, 3)); 169 } 170 171 static void mdp4_write_csc_config(struct mdp4_kms *mdp4_kms, 172 enum mdp4_pipe pipe, struct csc_cfg *csc) 173 { 174 int i; 175 176 for (i = 0; i < ARRAY_SIZE(csc->matrix); i++) { 177 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_MV(pipe, i), 178 csc->matrix[i]); 179 } 180 181 for (i = 0; i < ARRAY_SIZE(csc->post_bias) ; i++) { 182 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_BV(pipe, i), 183 csc->pre_bias[i]); 184 185 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_BV(pipe, i), 186 csc->post_bias[i]); 187 } 188 189 for (i = 0; i < ARRAY_SIZE(csc->post_clamp) ; i++) { 190 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_LV(pipe, i), 191 csc->pre_clamp[i]); 192 193 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_LV(pipe, i), 194 csc->post_clamp[i]); 195 } 196 } 197 198 #define MDP4_VG_PHASE_STEP_DEFAULT 0x20000000 199 200 static int mdp4_plane_mode_set(struct drm_plane *plane, 201 struct drm_crtc *crtc, struct drm_framebuffer *fb, 202 int crtc_x, int crtc_y, 203 unsigned int crtc_w, unsigned int crtc_h, 204 uint32_t src_x, uint32_t src_y, 205 uint32_t src_w, uint32_t src_h) 206 { 207 struct drm_device *dev = plane->dev; 208 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); 209 struct mdp4_kms *mdp4_kms = get_kms(plane); 210 enum mdp4_pipe pipe = mdp4_plane->pipe; 211 const struct mdp_format *format; 212 uint32_t op_mode = 0; 213 uint32_t phasex_step = MDP4_VG_PHASE_STEP_DEFAULT; 214 uint32_t phasey_step = MDP4_VG_PHASE_STEP_DEFAULT; 215 enum mdp4_frame_format frame_type; 216 217 if (!(crtc && fb)) { 218 DBG("%s: disabled!", mdp4_plane->name); 219 return 0; 220 } 221 222 frame_type = mdp4_get_frame_format(fb); 223 224 /* src values are in Q16 fixed point, convert to integer: */ 225 src_x = src_x >> 16; 226 src_y = src_y >> 16; 227 src_w = src_w >> 16; 228 src_h = src_h >> 16; 229 230 DBG("%s: FB[%u] %u,%u,%u,%u -> CRTC[%u] %d,%d,%u,%u", mdp4_plane->name, 231 fb->base.id, src_x, src_y, src_w, src_h, 232 crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h); 233 234 format = to_mdp_format(msm_framebuffer_format(fb)); 235 236 if (src_w > (crtc_w * DOWN_SCALE_MAX)) { 237 DRM_DEV_ERROR(dev->dev, "Width down scaling exceeds limits!\n"); 238 return -ERANGE; 239 } 240 241 if (src_h > (crtc_h * DOWN_SCALE_MAX)) { 242 DRM_DEV_ERROR(dev->dev, "Height down scaling exceeds limits!\n"); 243 return -ERANGE; 244 } 245 246 if (crtc_w > (src_w * UP_SCALE_MAX)) { 247 DRM_DEV_ERROR(dev->dev, "Width up scaling exceeds limits!\n"); 248 return -ERANGE; 249 } 250 251 if (crtc_h > (src_h * UP_SCALE_MAX)) { 252 DRM_DEV_ERROR(dev->dev, "Height up scaling exceeds limits!\n"); 253 return -ERANGE; 254 } 255 256 if (src_w != crtc_w) { 257 uint32_t sel_unit = SCALE_FIR; 258 op_mode |= MDP4_PIPE_OP_MODE_SCALEX_EN; 259 260 if (MDP_FORMAT_IS_YUV(format)) { 261 if (crtc_w > src_w) 262 sel_unit = SCALE_PIXEL_RPT; 263 else if (crtc_w <= (src_w / 4)) 264 sel_unit = SCALE_MN_PHASE; 265 266 op_mode |= MDP4_PIPE_OP_MODE_SCALEX_UNIT_SEL(sel_unit); 267 phasex_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT, 268 src_w, crtc_w); 269 } 270 } 271 272 if (src_h != crtc_h) { 273 uint32_t sel_unit = SCALE_FIR; 274 op_mode |= MDP4_PIPE_OP_MODE_SCALEY_EN; 275 276 if (MDP_FORMAT_IS_YUV(format)) { 277 278 if (crtc_h > src_h) 279 sel_unit = SCALE_PIXEL_RPT; 280 else if (crtc_h <= (src_h / 4)) 281 sel_unit = SCALE_MN_PHASE; 282 283 op_mode |= MDP4_PIPE_OP_MODE_SCALEY_UNIT_SEL(sel_unit); 284 phasey_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT, 285 src_h, crtc_h); 286 } 287 } 288 289 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_SIZE(pipe), 290 MDP4_PIPE_SRC_SIZE_WIDTH(src_w) | 291 MDP4_PIPE_SRC_SIZE_HEIGHT(src_h)); 292 293 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_XY(pipe), 294 MDP4_PIPE_SRC_XY_X(src_x) | 295 MDP4_PIPE_SRC_XY_Y(src_y)); 296 297 mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_SIZE(pipe), 298 MDP4_PIPE_DST_SIZE_WIDTH(crtc_w) | 299 MDP4_PIPE_DST_SIZE_HEIGHT(crtc_h)); 300 301 mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_XY(pipe), 302 MDP4_PIPE_DST_XY_X(crtc_x) | 303 MDP4_PIPE_DST_XY_Y(crtc_y)); 304 305 mdp4_plane_set_scanout(plane, fb); 306 307 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_FORMAT(pipe), 308 MDP4_PIPE_SRC_FORMAT_A_BPC(format->bpc_a) | 309 MDP4_PIPE_SRC_FORMAT_R_BPC(format->bpc_r) | 310 MDP4_PIPE_SRC_FORMAT_G_BPC(format->bpc_g) | 311 MDP4_PIPE_SRC_FORMAT_B_BPC(format->bpc_b) | 312 COND(format->alpha_enable, MDP4_PIPE_SRC_FORMAT_ALPHA_ENABLE) | 313 MDP4_PIPE_SRC_FORMAT_CPP(format->cpp - 1) | 314 MDP4_PIPE_SRC_FORMAT_UNPACK_COUNT(format->unpack_count - 1) | 315 MDP4_PIPE_SRC_FORMAT_FETCH_PLANES(format->fetch_type) | 316 MDP4_PIPE_SRC_FORMAT_CHROMA_SAMP(format->chroma_sample) | 317 MDP4_PIPE_SRC_FORMAT_FRAME_FORMAT(frame_type) | 318 COND(format->unpack_tight, MDP4_PIPE_SRC_FORMAT_UNPACK_TIGHT)); 319 320 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_UNPACK(pipe), 321 MDP4_PIPE_SRC_UNPACK_ELEM0(format->unpack[0]) | 322 MDP4_PIPE_SRC_UNPACK_ELEM1(format->unpack[1]) | 323 MDP4_PIPE_SRC_UNPACK_ELEM2(format->unpack[2]) | 324 MDP4_PIPE_SRC_UNPACK_ELEM3(format->unpack[3])); 325 326 if (MDP_FORMAT_IS_YUV(format)) { 327 struct csc_cfg *csc = mdp_get_default_csc_cfg(CSC_YUV2RGB); 328 329 op_mode |= MDP4_PIPE_OP_MODE_SRC_YCBCR; 330 op_mode |= MDP4_PIPE_OP_MODE_CSC_EN; 331 mdp4_write_csc_config(mdp4_kms, pipe, csc); 332 } 333 334 mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(pipe), op_mode); 335 mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEX_STEP(pipe), phasex_step); 336 mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEY_STEP(pipe), phasey_step); 337 338 if (frame_type != FRAME_LINEAR) 339 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SSTILE_FRAME_SIZE(pipe), 340 MDP4_PIPE_SSTILE_FRAME_SIZE_WIDTH(src_w) | 341 MDP4_PIPE_SSTILE_FRAME_SIZE_HEIGHT(src_h)); 342 343 return 0; 344 } 345 346 static const char *pipe_names[] = { 347 "VG1", "VG2", 348 "RGB1", "RGB2", "RGB3", 349 "VG3", "VG4", 350 }; 351 352 enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane) 353 { 354 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane); 355 return mdp4_plane->pipe; 356 } 357 358 /* initialize plane */ 359 struct drm_plane *mdp4_plane_init(struct drm_device *dev, 360 enum mdp4_pipe pipe_id, bool private_plane) 361 { 362 struct drm_plane *plane = NULL; 363 struct mdp4_plane *mdp4_plane; 364 int ret; 365 enum drm_plane_type type; 366 367 mdp4_plane = kzalloc(sizeof(*mdp4_plane), GFP_KERNEL); 368 if (!mdp4_plane) { 369 ret = -ENOMEM; 370 goto fail; 371 } 372 373 plane = &mdp4_plane->base; 374 375 mdp4_plane->pipe = pipe_id; 376 mdp4_plane->name = pipe_names[pipe_id]; 377 mdp4_plane->caps = mdp4_pipe_caps(pipe_id); 378 379 mdp4_plane->nformats = mdp_get_formats(mdp4_plane->formats, 380 ARRAY_SIZE(mdp4_plane->formats), 381 !pipe_supports_yuv(mdp4_plane->caps)); 382 383 type = private_plane ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY; 384 ret = drm_universal_plane_init(dev, plane, 0xff, &mdp4_plane_funcs, 385 mdp4_plane->formats, mdp4_plane->nformats, 386 NULL, type, NULL); 387 if (ret) 388 goto fail; 389 390 drm_plane_helper_add(plane, &mdp4_plane_helper_funcs); 391 392 mdp4_plane_install_properties(plane, &plane->base); 393 394 return plane; 395 396 fail: 397 if (plane) 398 mdp4_plane_destroy(plane); 399 400 return ERR_PTR(ret); 401 } 402