1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2015, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2014, Inforce Computing. All rights reserved. 5 * 6 * Author: Vinay Simha <vinaysimha@inforcecomputing.com> 7 */ 8 9 #include <drm/drm_crtc.h> 10 #include <drm/drm_probe_helper.h> 11 12 #include "mdp4_kms.h" 13 14 #ifdef CONFIG_DRM_MSM_DSI 15 16 struct mdp4_dsi_encoder { 17 struct drm_encoder base; 18 struct drm_panel *panel; 19 bool enabled; 20 }; 21 #define to_mdp4_dsi_encoder(x) container_of(x, struct mdp4_dsi_encoder, base) 22 23 static struct mdp4_kms *get_kms(struct drm_encoder *encoder) 24 { 25 struct msm_drm_private *priv = encoder->dev->dev_private; 26 return to_mdp4_kms(to_mdp_kms(priv->kms)); 27 } 28 29 static void mdp4_dsi_encoder_destroy(struct drm_encoder *encoder) 30 { 31 struct mdp4_dsi_encoder *mdp4_dsi_encoder = to_mdp4_dsi_encoder(encoder); 32 33 drm_encoder_cleanup(encoder); 34 kfree(mdp4_dsi_encoder); 35 } 36 37 static const struct drm_encoder_funcs mdp4_dsi_encoder_funcs = { 38 .destroy = mdp4_dsi_encoder_destroy, 39 }; 40 41 static void mdp4_dsi_encoder_mode_set(struct drm_encoder *encoder, 42 struct drm_display_mode *mode, 43 struct drm_display_mode *adjusted_mode) 44 { 45 struct mdp4_kms *mdp4_kms = get_kms(encoder); 46 uint32_t dsi_hsync_skew, vsync_period, vsync_len, ctrl_pol; 47 uint32_t display_v_start, display_v_end; 48 uint32_t hsync_start_x, hsync_end_x; 49 50 mode = adjusted_mode; 51 52 DBG("set mode: " DRM_MODE_FMT, DRM_MODE_ARG(mode)); 53 54 ctrl_pol = 0; 55 if (mode->flags & DRM_MODE_FLAG_NHSYNC) 56 ctrl_pol |= MDP4_DSI_CTRL_POLARITY_HSYNC_LOW; 57 if (mode->flags & DRM_MODE_FLAG_NVSYNC) 58 ctrl_pol |= MDP4_DSI_CTRL_POLARITY_VSYNC_LOW; 59 /* probably need to get DATA_EN polarity from panel.. */ 60 61 dsi_hsync_skew = 0; /* get this from panel? */ 62 63 hsync_start_x = (mode->htotal - mode->hsync_start); 64 hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1; 65 66 vsync_period = mode->vtotal * mode->htotal; 67 vsync_len = (mode->vsync_end - mode->vsync_start) * mode->htotal; 68 display_v_start = (mode->vtotal - mode->vsync_start) * mode->htotal + dsi_hsync_skew; 69 display_v_end = vsync_period - ((mode->vsync_start - mode->vdisplay) * mode->htotal) + dsi_hsync_skew - 1; 70 71 mdp4_write(mdp4_kms, REG_MDP4_DSI_HSYNC_CTRL, 72 MDP4_DSI_HSYNC_CTRL_PULSEW(mode->hsync_end - mode->hsync_start) | 73 MDP4_DSI_HSYNC_CTRL_PERIOD(mode->htotal)); 74 mdp4_write(mdp4_kms, REG_MDP4_DSI_VSYNC_PERIOD, vsync_period); 75 mdp4_write(mdp4_kms, REG_MDP4_DSI_VSYNC_LEN, vsync_len); 76 mdp4_write(mdp4_kms, REG_MDP4_DSI_DISPLAY_HCTRL, 77 MDP4_DSI_DISPLAY_HCTRL_START(hsync_start_x) | 78 MDP4_DSI_DISPLAY_HCTRL_END(hsync_end_x)); 79 mdp4_write(mdp4_kms, REG_MDP4_DSI_DISPLAY_VSTART, display_v_start); 80 mdp4_write(mdp4_kms, REG_MDP4_DSI_DISPLAY_VEND, display_v_end); 81 82 mdp4_write(mdp4_kms, REG_MDP4_DSI_CTRL_POLARITY, ctrl_pol); 83 mdp4_write(mdp4_kms, REG_MDP4_DSI_UNDERFLOW_CLR, 84 MDP4_DSI_UNDERFLOW_CLR_ENABLE_RECOVERY | 85 MDP4_DSI_UNDERFLOW_CLR_COLOR(0xff)); 86 mdp4_write(mdp4_kms, REG_MDP4_DSI_ACTIVE_HCTL, 87 MDP4_DSI_ACTIVE_HCTL_START(0) | 88 MDP4_DSI_ACTIVE_HCTL_END(0)); 89 mdp4_write(mdp4_kms, REG_MDP4_DSI_HSYNC_SKEW, dsi_hsync_skew); 90 mdp4_write(mdp4_kms, REG_MDP4_DSI_BORDER_CLR, 0); 91 mdp4_write(mdp4_kms, REG_MDP4_DSI_ACTIVE_VSTART, 0); 92 mdp4_write(mdp4_kms, REG_MDP4_DSI_ACTIVE_VEND, 0); 93 } 94 95 static void mdp4_dsi_encoder_disable(struct drm_encoder *encoder) 96 { 97 struct mdp4_dsi_encoder *mdp4_dsi_encoder = to_mdp4_dsi_encoder(encoder); 98 struct mdp4_kms *mdp4_kms = get_kms(encoder); 99 100 if (!mdp4_dsi_encoder->enabled) 101 return; 102 103 mdp4_write(mdp4_kms, REG_MDP4_DSI_ENABLE, 0); 104 105 /* 106 * Wait for a vsync so we know the ENABLE=0 latched before 107 * the (connector) source of the vsync's gets disabled, 108 * otherwise we end up in a funny state if we re-enable 109 * before the disable latches, which results that some of 110 * the settings changes for the new modeset (like new 111 * scanout buffer) don't latch properly.. 112 */ 113 mdp_irq_wait(&mdp4_kms->base, MDP4_IRQ_PRIMARY_VSYNC); 114 115 mdp4_dsi_encoder->enabled = false; 116 } 117 118 static void mdp4_dsi_encoder_enable(struct drm_encoder *encoder) 119 { 120 struct mdp4_dsi_encoder *mdp4_dsi_encoder = to_mdp4_dsi_encoder(encoder); 121 struct mdp4_kms *mdp4_kms = get_kms(encoder); 122 123 if (mdp4_dsi_encoder->enabled) 124 return; 125 126 mdp4_crtc_set_config(encoder->crtc, 127 MDP4_DMA_CONFIG_PACK_ALIGN_MSB | 128 MDP4_DMA_CONFIG_DEFLKR_EN | 129 MDP4_DMA_CONFIG_DITHER_EN | 130 MDP4_DMA_CONFIG_R_BPC(BPC8) | 131 MDP4_DMA_CONFIG_G_BPC(BPC8) | 132 MDP4_DMA_CONFIG_B_BPC(BPC8) | 133 MDP4_DMA_CONFIG_PACK(0x21)); 134 135 mdp4_crtc_set_intf(encoder->crtc, INTF_DSI_VIDEO, 0); 136 137 mdp4_write(mdp4_kms, REG_MDP4_DSI_ENABLE, 1); 138 139 mdp4_dsi_encoder->enabled = true; 140 } 141 142 static const struct drm_encoder_helper_funcs mdp4_dsi_encoder_helper_funcs = { 143 .mode_set = mdp4_dsi_encoder_mode_set, 144 .disable = mdp4_dsi_encoder_disable, 145 .enable = mdp4_dsi_encoder_enable, 146 }; 147 148 /* initialize encoder */ 149 struct drm_encoder *mdp4_dsi_encoder_init(struct drm_device *dev) 150 { 151 struct drm_encoder *encoder = NULL; 152 struct mdp4_dsi_encoder *mdp4_dsi_encoder; 153 int ret; 154 155 mdp4_dsi_encoder = kzalloc(sizeof(*mdp4_dsi_encoder), GFP_KERNEL); 156 if (!mdp4_dsi_encoder) { 157 ret = -ENOMEM; 158 goto fail; 159 } 160 161 encoder = &mdp4_dsi_encoder->base; 162 163 drm_encoder_init(dev, encoder, &mdp4_dsi_encoder_funcs, 164 DRM_MODE_ENCODER_DSI, NULL); 165 drm_encoder_helper_add(encoder, &mdp4_dsi_encoder_helper_funcs); 166 167 return encoder; 168 169 fail: 170 if (encoder) 171 mdp4_dsi_encoder_destroy(encoder); 172 173 return ERR_PTR(ret); 174 } 175 #endif /* CONFIG_DRM_MSM_DSI */ 176