1 /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. 2 * 3 * This program is free software; you can redistribute it and/or modify 4 * it under the terms of the GNU General Public License version 2 and 5 * only version 2 as published by the Free Software Foundation. 6 * 7 * This program is distributed in the hope that it will be useful, 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * GNU General Public License for more details. 11 */ 12 13 #if !defined(_DPU_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ) 14 #define _DPU_TRACE_H_ 15 16 #include <linux/stringify.h> 17 #include <linux/types.h> 18 #include <linux/tracepoint.h> 19 20 #include <drm/drm_rect.h> 21 #include "dpu_crtc.h" 22 #include "dpu_encoder_phys.h" 23 #include "dpu_hw_mdss.h" 24 #include "dpu_hw_vbif.h" 25 #include "dpu_plane.h" 26 27 #undef TRACE_SYSTEM 28 #define TRACE_SYSTEM dpu 29 #undef TRACE_INCLUDE_FILE 30 #define TRACE_INCLUDE_FILE dpu_trace 31 32 TRACE_EVENT(dpu_perf_set_qos_luts, 33 TP_PROTO(u32 pnum, u32 fmt, bool rt, u32 fl, 34 u32 lut, u32 lut_usage), 35 TP_ARGS(pnum, fmt, rt, fl, lut, lut_usage), 36 TP_STRUCT__entry( 37 __field(u32, pnum) 38 __field(u32, fmt) 39 __field(bool, rt) 40 __field(u32, fl) 41 __field(u64, lut) 42 __field(u32, lut_usage) 43 ), 44 TP_fast_assign( 45 __entry->pnum = pnum; 46 __entry->fmt = fmt; 47 __entry->rt = rt; 48 __entry->fl = fl; 49 __entry->lut = lut; 50 __entry->lut_usage = lut_usage; 51 ), 52 TP_printk("pnum=%d fmt=%x rt=%d fl=%d lut=0x%llx lut_usage=%d", 53 __entry->pnum, __entry->fmt, 54 __entry->rt, __entry->fl, 55 __entry->lut, __entry->lut_usage) 56 ); 57 58 TRACE_EVENT(dpu_perf_set_danger_luts, 59 TP_PROTO(u32 pnum, u32 fmt, u32 mode, u32 danger_lut, 60 u32 safe_lut), 61 TP_ARGS(pnum, fmt, mode, danger_lut, safe_lut), 62 TP_STRUCT__entry( 63 __field(u32, pnum) 64 __field(u32, fmt) 65 __field(u32, mode) 66 __field(u32, danger_lut) 67 __field(u32, safe_lut) 68 ), 69 TP_fast_assign( 70 __entry->pnum = pnum; 71 __entry->fmt = fmt; 72 __entry->mode = mode; 73 __entry->danger_lut = danger_lut; 74 __entry->safe_lut = safe_lut; 75 ), 76 TP_printk("pnum=%d fmt=%x mode=%d luts[0x%x, 0x%x]", 77 __entry->pnum, __entry->fmt, 78 __entry->mode, __entry->danger_lut, 79 __entry->safe_lut) 80 ); 81 82 TRACE_EVENT(dpu_perf_set_ot, 83 TP_PROTO(u32 pnum, u32 xin_id, u32 rd_lim, u32 vbif_idx), 84 TP_ARGS(pnum, xin_id, rd_lim, vbif_idx), 85 TP_STRUCT__entry( 86 __field(u32, pnum) 87 __field(u32, xin_id) 88 __field(u32, rd_lim) 89 __field(u32, vbif_idx) 90 ), 91 TP_fast_assign( 92 __entry->pnum = pnum; 93 __entry->xin_id = xin_id; 94 __entry->rd_lim = rd_lim; 95 __entry->vbif_idx = vbif_idx; 96 ), 97 TP_printk("pnum:%d xin_id:%d ot:%d vbif:%d", 98 __entry->pnum, __entry->xin_id, __entry->rd_lim, 99 __entry->vbif_idx) 100 ) 101 102 TRACE_EVENT(dpu_perf_update_bus, 103 TP_PROTO(int client, unsigned long long ab_quota, 104 unsigned long long ib_quota), 105 TP_ARGS(client, ab_quota, ib_quota), 106 TP_STRUCT__entry( 107 __field(int, client) 108 __field(u64, ab_quota) 109 __field(u64, ib_quota) 110 ), 111 TP_fast_assign( 112 __entry->client = client; 113 __entry->ab_quota = ab_quota; 114 __entry->ib_quota = ib_quota; 115 ), 116 TP_printk("Request client:%d ab=%llu ib=%llu", 117 __entry->client, 118 __entry->ab_quota, 119 __entry->ib_quota) 120 ) 121 122 123 TRACE_EVENT(dpu_cmd_release_bw, 124 TP_PROTO(u32 crtc_id), 125 TP_ARGS(crtc_id), 126 TP_STRUCT__entry( 127 __field(u32, crtc_id) 128 ), 129 TP_fast_assign( 130 __entry->crtc_id = crtc_id; 131 ), 132 TP_printk("crtc:%d", __entry->crtc_id) 133 ); 134 135 TRACE_EVENT(tracing_mark_write, 136 TP_PROTO(int pid, const char *name, bool trace_begin), 137 TP_ARGS(pid, name, trace_begin), 138 TP_STRUCT__entry( 139 __field(int, pid) 140 __string(trace_name, name) 141 __field(bool, trace_begin) 142 ), 143 TP_fast_assign( 144 __entry->pid = pid; 145 __assign_str(trace_name, name); 146 __entry->trace_begin = trace_begin; 147 ), 148 TP_printk("%s|%d|%s", __entry->trace_begin ? "B" : "E", 149 __entry->pid, __get_str(trace_name)) 150 ) 151 152 TRACE_EVENT(dpu_trace_counter, 153 TP_PROTO(int pid, char *name, int value), 154 TP_ARGS(pid, name, value), 155 TP_STRUCT__entry( 156 __field(int, pid) 157 __string(counter_name, name) 158 __field(int, value) 159 ), 160 TP_fast_assign( 161 __entry->pid = current->tgid; 162 __assign_str(counter_name, name); 163 __entry->value = value; 164 ), 165 TP_printk("%d|%s|%d", __entry->pid, 166 __get_str(counter_name), __entry->value) 167 ) 168 169 TRACE_EVENT(dpu_perf_crtc_update, 170 TP_PROTO(u32 crtc, u64 bw_ctl_mnoc, u64 bw_ctl_llcc, 171 u64 bw_ctl_ebi, u32 core_clk_rate, 172 bool stop_req, u32 update_bus, u32 update_clk), 173 TP_ARGS(crtc, bw_ctl_mnoc, bw_ctl_llcc, bw_ctl_ebi, core_clk_rate, 174 stop_req, update_bus, update_clk), 175 TP_STRUCT__entry( 176 __field(u32, crtc) 177 __field(u64, bw_ctl_mnoc) 178 __field(u64, bw_ctl_llcc) 179 __field(u64, bw_ctl_ebi) 180 __field(u32, core_clk_rate) 181 __field(bool, stop_req) 182 __field(u32, update_bus) 183 __field(u32, update_clk) 184 ), 185 TP_fast_assign( 186 __entry->crtc = crtc; 187 __entry->bw_ctl_mnoc = bw_ctl_mnoc; 188 __entry->bw_ctl_llcc = bw_ctl_llcc; 189 __entry->bw_ctl_ebi = bw_ctl_ebi; 190 __entry->core_clk_rate = core_clk_rate; 191 __entry->stop_req = stop_req; 192 __entry->update_bus = update_bus; 193 __entry->update_clk = update_clk; 194 ), 195 TP_printk( 196 "crtc=%d bw_mnoc=%llu bw_llcc=%llu bw_ebi=%llu clk_rate=%u stop_req=%d u_bus=%d u_clk=%d", 197 __entry->crtc, 198 __entry->bw_ctl_mnoc, 199 __entry->bw_ctl_llcc, 200 __entry->bw_ctl_ebi, 201 __entry->core_clk_rate, 202 __entry->stop_req, 203 __entry->update_bus, 204 __entry->update_clk) 205 ); 206 207 DECLARE_EVENT_CLASS(dpu_enc_irq_template, 208 TP_PROTO(uint32_t drm_id, enum dpu_intr_idx intr_idx, int hw_idx, 209 int irq_idx), 210 TP_ARGS(drm_id, intr_idx, hw_idx, irq_idx), 211 TP_STRUCT__entry( 212 __field( uint32_t, drm_id ) 213 __field( enum dpu_intr_idx, intr_idx ) 214 __field( int, hw_idx ) 215 __field( int, irq_idx ) 216 ), 217 TP_fast_assign( 218 __entry->drm_id = drm_id; 219 __entry->intr_idx = intr_idx; 220 __entry->hw_idx = hw_idx; 221 __entry->irq_idx = irq_idx; 222 ), 223 TP_printk("id=%u, intr=%d, hw=%d, irq=%d", 224 __entry->drm_id, __entry->intr_idx, __entry->hw_idx, 225 __entry->irq_idx) 226 ); 227 DEFINE_EVENT(dpu_enc_irq_template, dpu_enc_irq_register_success, 228 TP_PROTO(uint32_t drm_id, enum dpu_intr_idx intr_idx, int hw_idx, 229 int irq_idx), 230 TP_ARGS(drm_id, intr_idx, hw_idx, irq_idx) 231 ); 232 DEFINE_EVENT(dpu_enc_irq_template, dpu_enc_irq_unregister_success, 233 TP_PROTO(uint32_t drm_id, enum dpu_intr_idx intr_idx, int hw_idx, 234 int irq_idx), 235 TP_ARGS(drm_id, intr_idx, hw_idx, irq_idx) 236 ); 237 238 TRACE_EVENT(dpu_enc_irq_wait_success, 239 TP_PROTO(uint32_t drm_id, enum dpu_intr_idx intr_idx, int hw_idx, 240 int irq_idx, enum dpu_pingpong pp_idx, int atomic_cnt), 241 TP_ARGS(drm_id, intr_idx, hw_idx, irq_idx, pp_idx, atomic_cnt), 242 TP_STRUCT__entry( 243 __field( uint32_t, drm_id ) 244 __field( enum dpu_intr_idx, intr_idx ) 245 __field( int, hw_idx ) 246 __field( int, irq_idx ) 247 __field( enum dpu_pingpong, pp_idx ) 248 __field( int, atomic_cnt ) 249 ), 250 TP_fast_assign( 251 __entry->drm_id = drm_id; 252 __entry->intr_idx = intr_idx; 253 __entry->hw_idx = hw_idx; 254 __entry->irq_idx = irq_idx; 255 __entry->pp_idx = pp_idx; 256 __entry->atomic_cnt = atomic_cnt; 257 ), 258 TP_printk("id=%u, intr=%d, hw=%d, irq=%d, pp=%d, atomic_cnt=%d", 259 __entry->drm_id, __entry->intr_idx, __entry->hw_idx, 260 __entry->irq_idx, __entry->pp_idx, __entry->atomic_cnt) 261 ); 262 263 DECLARE_EVENT_CLASS(dpu_drm_obj_template, 264 TP_PROTO(uint32_t drm_id), 265 TP_ARGS(drm_id), 266 TP_STRUCT__entry( 267 __field( uint32_t, drm_id ) 268 ), 269 TP_fast_assign( 270 __entry->drm_id = drm_id; 271 ), 272 TP_printk("id=%u", __entry->drm_id) 273 ); 274 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_atomic_check, 275 TP_PROTO(uint32_t drm_id), 276 TP_ARGS(drm_id) 277 ); 278 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_mode_set, 279 TP_PROTO(uint32_t drm_id), 280 TP_ARGS(drm_id) 281 ); 282 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_disable, 283 TP_PROTO(uint32_t drm_id), 284 TP_ARGS(drm_id) 285 ); 286 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_kickoff, 287 TP_PROTO(uint32_t drm_id), 288 TP_ARGS(drm_id) 289 ); 290 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_prepare_kickoff, 291 TP_PROTO(uint32_t drm_id), 292 TP_ARGS(drm_id) 293 ); 294 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_prepare_kickoff_reset, 295 TP_PROTO(uint32_t drm_id), 296 TP_ARGS(drm_id) 297 ); 298 DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_flip, 299 TP_PROTO(uint32_t drm_id), 300 TP_ARGS(drm_id) 301 ); 302 DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_vblank_cb, 303 TP_PROTO(uint32_t drm_id), 304 TP_ARGS(drm_id) 305 ); 306 DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_commit, 307 TP_PROTO(uint32_t drm_id), 308 TP_ARGS(drm_id) 309 ); 310 DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_enc_enable, 311 TP_PROTO(uint32_t drm_id), 312 TP_ARGS(drm_id) 313 ); 314 DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_commit, 315 TP_PROTO(uint32_t drm_id), 316 TP_ARGS(drm_id) 317 ); 318 DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_wait_for_commit_done, 319 TP_PROTO(uint32_t drm_id), 320 TP_ARGS(drm_id) 321 ); 322 323 TRACE_EVENT(dpu_enc_enable, 324 TP_PROTO(uint32_t drm_id, int hdisplay, int vdisplay), 325 TP_ARGS(drm_id, hdisplay, vdisplay), 326 TP_STRUCT__entry( 327 __field( uint32_t, drm_id ) 328 __field( int, hdisplay ) 329 __field( int, vdisplay ) 330 ), 331 TP_fast_assign( 332 __entry->drm_id = drm_id; 333 __entry->hdisplay = hdisplay; 334 __entry->vdisplay = vdisplay; 335 ), 336 TP_printk("id=%u, mode=%dx%d", 337 __entry->drm_id, __entry->hdisplay, __entry->vdisplay) 338 ); 339 340 DECLARE_EVENT_CLASS(dpu_enc_keyval_template, 341 TP_PROTO(uint32_t drm_id, int val), 342 TP_ARGS(drm_id, val), 343 TP_STRUCT__entry( 344 __field( uint32_t, drm_id ) 345 __field( int, val ) 346 ), 347 TP_fast_assign( 348 __entry->drm_id = drm_id; 349 __entry->val = val; 350 ), 351 TP_printk("id=%u, val=%d", __entry->drm_id, __entry->val) 352 ); 353 DEFINE_EVENT(dpu_enc_keyval_template, dpu_enc_underrun_cb, 354 TP_PROTO(uint32_t drm_id, int count), 355 TP_ARGS(drm_id, count) 356 ); 357 DEFINE_EVENT(dpu_enc_keyval_template, dpu_enc_trigger_start, 358 TP_PROTO(uint32_t drm_id, int ctl_idx), 359 TP_ARGS(drm_id, ctl_idx) 360 ); 361 362 TRACE_EVENT(dpu_enc_atomic_check_flags, 363 TP_PROTO(uint32_t drm_id, unsigned int flags, int private_flags), 364 TP_ARGS(drm_id, flags, private_flags), 365 TP_STRUCT__entry( 366 __field( uint32_t, drm_id ) 367 __field( unsigned int, flags ) 368 __field( int, private_flags ) 369 ), 370 TP_fast_assign( 371 __entry->drm_id = drm_id; 372 __entry->flags = flags; 373 __entry->private_flags = private_flags; 374 ), 375 TP_printk("id=%u, flags=%u, private_flags=%d", 376 __entry->drm_id, __entry->flags, __entry->private_flags) 377 ); 378 379 DECLARE_EVENT_CLASS(dpu_enc_id_enable_template, 380 TP_PROTO(uint32_t drm_id, bool enable), 381 TP_ARGS(drm_id, enable), 382 TP_STRUCT__entry( 383 __field( uint32_t, drm_id ) 384 __field( bool, enable ) 385 ), 386 TP_fast_assign( 387 __entry->drm_id = drm_id; 388 __entry->enable = enable; 389 ), 390 TP_printk("id=%u, enable=%s", 391 __entry->drm_id, __entry->enable ? "true" : "false") 392 ); 393 DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_rc_helper, 394 TP_PROTO(uint32_t drm_id, bool enable), 395 TP_ARGS(drm_id, enable) 396 ); 397 DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_vblank_cb, 398 TP_PROTO(uint32_t drm_id, bool enable), 399 TP_ARGS(drm_id, enable) 400 ); 401 DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_frame_event_cb, 402 TP_PROTO(uint32_t drm_id, bool enable), 403 TP_ARGS(drm_id, enable) 404 ); 405 DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_phys_cmd_connect_te, 406 TP_PROTO(uint32_t drm_id, bool enable), 407 TP_ARGS(drm_id, enable) 408 ); 409 410 TRACE_EVENT(dpu_enc_rc, 411 TP_PROTO(uint32_t drm_id, u32 sw_event, bool idle_pc_supported, 412 int rc_state, const char *stage), 413 TP_ARGS(drm_id, sw_event, idle_pc_supported, rc_state, stage), 414 TP_STRUCT__entry( 415 __field( uint32_t, drm_id ) 416 __field( u32, sw_event ) 417 __field( bool, idle_pc_supported ) 418 __field( int, rc_state ) 419 __string( stage_str, stage ) 420 ), 421 TP_fast_assign( 422 __entry->drm_id = drm_id; 423 __entry->sw_event = sw_event; 424 __entry->idle_pc_supported = idle_pc_supported; 425 __entry->rc_state = rc_state; 426 __assign_str(stage_str, stage); 427 ), 428 TP_printk("%s: id:%u, sw_event:%d, idle_pc_supported:%s, rc_state:%d\n", 429 __get_str(stage_str), __entry->drm_id, __entry->sw_event, 430 __entry->idle_pc_supported ? "true" : "false", 431 __entry->rc_state) 432 ); 433 434 TRACE_EVENT(dpu_enc_frame_done_cb_not_busy, 435 TP_PROTO(uint32_t drm_id, u32 event, enum dpu_intf intf_idx), 436 TP_ARGS(drm_id, event, intf_idx), 437 TP_STRUCT__entry( 438 __field( uint32_t, drm_id ) 439 __field( u32, event ) 440 __field( enum dpu_intf, intf_idx ) 441 ), 442 TP_fast_assign( 443 __entry->drm_id = drm_id; 444 __entry->event = event; 445 __entry->intf_idx = intf_idx; 446 ), 447 TP_printk("id=%u, event=%u, intf=%d", __entry->drm_id, __entry->event, 448 __entry->intf_idx) 449 ); 450 451 TRACE_EVENT(dpu_enc_frame_done_cb, 452 TP_PROTO(uint32_t drm_id, unsigned int idx, 453 unsigned long frame_busy_mask), 454 TP_ARGS(drm_id, idx, frame_busy_mask), 455 TP_STRUCT__entry( 456 __field( uint32_t, drm_id ) 457 __field( unsigned int, idx ) 458 __field( unsigned long, frame_busy_mask ) 459 ), 460 TP_fast_assign( 461 __entry->drm_id = drm_id; 462 __entry->idx = idx; 463 __entry->frame_busy_mask = frame_busy_mask; 464 ), 465 TP_printk("id=%u, idx=%u, frame_busy_mask=%lx", __entry->drm_id, 466 __entry->idx, __entry->frame_busy_mask) 467 ); 468 469 TRACE_EVENT(dpu_enc_trigger_flush, 470 TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx, 471 int pending_kickoff_cnt, int ctl_idx, u32 extra_flush_bits, 472 u32 pending_flush_ret), 473 TP_ARGS(drm_id, intf_idx, pending_kickoff_cnt, ctl_idx, 474 extra_flush_bits, pending_flush_ret), 475 TP_STRUCT__entry( 476 __field( uint32_t, drm_id ) 477 __field( enum dpu_intf, intf_idx ) 478 __field( int, pending_kickoff_cnt ) 479 __field( int, ctl_idx ) 480 __field( u32, extra_flush_bits ) 481 __field( u32, pending_flush_ret ) 482 ), 483 TP_fast_assign( 484 __entry->drm_id = drm_id; 485 __entry->intf_idx = intf_idx; 486 __entry->pending_kickoff_cnt = pending_kickoff_cnt; 487 __entry->ctl_idx = ctl_idx; 488 __entry->extra_flush_bits = extra_flush_bits; 489 __entry->pending_flush_ret = pending_flush_ret; 490 ), 491 TP_printk("id=%u, intf_idx=%d, pending_kickoff_cnt=%d ctl_idx=%d " 492 "extra_flush_bits=0x%x pending_flush_ret=0x%x", 493 __entry->drm_id, __entry->intf_idx, 494 __entry->pending_kickoff_cnt, __entry->ctl_idx, 495 __entry->extra_flush_bits, __entry->pending_flush_ret) 496 ); 497 498 DECLARE_EVENT_CLASS(dpu_enc_ktime_template, 499 TP_PROTO(uint32_t drm_id, ktime_t time), 500 TP_ARGS(drm_id, time), 501 TP_STRUCT__entry( 502 __field( uint32_t, drm_id ) 503 __field( ktime_t, time ) 504 ), 505 TP_fast_assign( 506 __entry->drm_id = drm_id; 507 __entry->time = time; 508 ), 509 TP_printk("id=%u, time=%lld", __entry->drm_id, 510 ktime_to_ms(__entry->time)) 511 ); 512 DEFINE_EVENT(dpu_enc_ktime_template, dpu_enc_vsync_event_work, 513 TP_PROTO(uint32_t drm_id, ktime_t time), 514 TP_ARGS(drm_id, time) 515 ); 516 DEFINE_EVENT(dpu_enc_ktime_template, dpu_enc_early_kickoff, 517 TP_PROTO(uint32_t drm_id, ktime_t time), 518 TP_ARGS(drm_id, time) 519 ); 520 521 DECLARE_EVENT_CLASS(dpu_id_event_template, 522 TP_PROTO(uint32_t drm_id, u32 event), 523 TP_ARGS(drm_id, event), 524 TP_STRUCT__entry( 525 __field( uint32_t, drm_id ) 526 __field( u32, event ) 527 ), 528 TP_fast_assign( 529 __entry->drm_id = drm_id; 530 __entry->event = event; 531 ), 532 TP_printk("id=%u, event=%u", __entry->drm_id, __entry->event) 533 ); 534 DEFINE_EVENT(dpu_id_event_template, dpu_enc_frame_done_timeout, 535 TP_PROTO(uint32_t drm_id, u32 event), 536 TP_ARGS(drm_id, event) 537 ); 538 DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_cb, 539 TP_PROTO(uint32_t drm_id, u32 event), 540 TP_ARGS(drm_id, event) 541 ); 542 DEFINE_EVENT(dpu_id_event_template, dpu_crtc_handle_power_event, 543 TP_PROTO(uint32_t drm_id, u32 event), 544 TP_ARGS(drm_id, event) 545 ); 546 DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_done, 547 TP_PROTO(uint32_t drm_id, u32 event), 548 TP_ARGS(drm_id, event) 549 ); 550 DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_more_pending, 551 TP_PROTO(uint32_t drm_id, u32 event), 552 TP_ARGS(drm_id, event) 553 ); 554 555 TRACE_EVENT(dpu_enc_wait_event_timeout, 556 TP_PROTO(uint32_t drm_id, int32_t hw_id, int rc, s64 time, 557 s64 expected_time, int atomic_cnt), 558 TP_ARGS(drm_id, hw_id, rc, time, expected_time, atomic_cnt), 559 TP_STRUCT__entry( 560 __field( uint32_t, drm_id ) 561 __field( int32_t, hw_id ) 562 __field( int, rc ) 563 __field( s64, time ) 564 __field( s64, expected_time ) 565 __field( int, atomic_cnt ) 566 ), 567 TP_fast_assign( 568 __entry->drm_id = drm_id; 569 __entry->hw_id = hw_id; 570 __entry->rc = rc; 571 __entry->time = time; 572 __entry->expected_time = expected_time; 573 __entry->atomic_cnt = atomic_cnt; 574 ), 575 TP_printk("id=%u, hw_id=%d, rc=%d, time=%lld, expected=%lld cnt=%d", 576 __entry->drm_id, __entry->hw_id, __entry->rc, __entry->time, 577 __entry->expected_time, __entry->atomic_cnt) 578 ); 579 580 TRACE_EVENT(dpu_enc_phys_cmd_irq_ctrl, 581 TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, bool enable, 582 int refcnt), 583 TP_ARGS(drm_id, pp, enable, refcnt), 584 TP_STRUCT__entry( 585 __field( uint32_t, drm_id ) 586 __field( enum dpu_pingpong, pp ) 587 __field( bool, enable ) 588 __field( int, refcnt ) 589 ), 590 TP_fast_assign( 591 __entry->drm_id = drm_id; 592 __entry->pp = pp; 593 __entry->enable = enable; 594 __entry->refcnt = refcnt; 595 ), 596 TP_printk("id=%u, pp=%d, enable=%s, refcnt=%d", __entry->drm_id, 597 __entry->pp, __entry->enable ? "true" : "false", 598 __entry->refcnt) 599 ); 600 601 TRACE_EVENT(dpu_enc_phys_cmd_pp_tx_done, 602 TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, int new_count, 603 u32 event), 604 TP_ARGS(drm_id, pp, new_count, event), 605 TP_STRUCT__entry( 606 __field( uint32_t, drm_id ) 607 __field( enum dpu_pingpong, pp ) 608 __field( int, new_count ) 609 __field( u32, event ) 610 ), 611 TP_fast_assign( 612 __entry->drm_id = drm_id; 613 __entry->pp = pp; 614 __entry->new_count = new_count; 615 __entry->event = event; 616 ), 617 TP_printk("id=%u, pp=%d, new_count=%d, event=%u", __entry->drm_id, 618 __entry->pp, __entry->new_count, __entry->event) 619 ); 620 621 TRACE_EVENT(dpu_enc_phys_cmd_pdone_timeout, 622 TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, int timeout_count, 623 int kickoff_count, u32 event), 624 TP_ARGS(drm_id, pp, timeout_count, kickoff_count, event), 625 TP_STRUCT__entry( 626 __field( uint32_t, drm_id ) 627 __field( enum dpu_pingpong, pp ) 628 __field( int, timeout_count ) 629 __field( int, kickoff_count ) 630 __field( u32, event ) 631 ), 632 TP_fast_assign( 633 __entry->drm_id = drm_id; 634 __entry->pp = pp; 635 __entry->timeout_count = timeout_count; 636 __entry->kickoff_count = kickoff_count; 637 __entry->event = event; 638 ), 639 TP_printk("id=%u, pp=%d, timeout_count=%d, kickoff_count=%d, event=%u", 640 __entry->drm_id, __entry->pp, __entry->timeout_count, 641 __entry->kickoff_count, __entry->event) 642 ); 643 644 TRACE_EVENT(dpu_enc_phys_vid_post_kickoff, 645 TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx), 646 TP_ARGS(drm_id, intf_idx), 647 TP_STRUCT__entry( 648 __field( uint32_t, drm_id ) 649 __field( enum dpu_intf, intf_idx ) 650 ), 651 TP_fast_assign( 652 __entry->drm_id = drm_id; 653 __entry->intf_idx = intf_idx; 654 ), 655 TP_printk("id=%u, intf_idx=%d", __entry->drm_id, __entry->intf_idx) 656 ); 657 658 TRACE_EVENT(dpu_enc_phys_vid_irq_ctrl, 659 TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx, bool enable, 660 int refcnt), 661 TP_ARGS(drm_id, intf_idx, enable, refcnt), 662 TP_STRUCT__entry( 663 __field( uint32_t, drm_id ) 664 __field( enum dpu_intf, intf_idx ) 665 __field( bool, enable ) 666 __field( int, refcnt ) 667 ), 668 TP_fast_assign( 669 __entry->drm_id = drm_id; 670 __entry->intf_idx = intf_idx; 671 __entry->enable = enable; 672 __entry->refcnt = refcnt; 673 ), 674 TP_printk("id=%u, intf_idx=%d enable=%s refcnt=%d", __entry->drm_id, 675 __entry->intf_idx, __entry->enable ? "true" : "false", 676 __entry->drm_id) 677 ); 678 679 TRACE_EVENT(dpu_crtc_setup_mixer, 680 TP_PROTO(uint32_t crtc_id, uint32_t plane_id, 681 struct drm_plane_state *state, struct dpu_plane_state *pstate, 682 uint32_t stage_idx, enum dpu_sspp sspp, uint32_t pixel_format, 683 uint64_t modifier), 684 TP_ARGS(crtc_id, plane_id, state, pstate, stage_idx, sspp, 685 pixel_format, modifier), 686 TP_STRUCT__entry( 687 __field( uint32_t, crtc_id ) 688 __field( uint32_t, plane_id ) 689 __field( uint32_t, fb_id ) 690 __field_struct( struct drm_rect, src_rect ) 691 __field_struct( struct drm_rect, dst_rect ) 692 __field( uint32_t, stage_idx ) 693 __field( enum dpu_stage, stage ) 694 __field( enum dpu_sspp, sspp ) 695 __field( uint32_t, multirect_idx ) 696 __field( uint32_t, multirect_mode ) 697 __field( uint32_t, pixel_format ) 698 __field( uint64_t, modifier ) 699 ), 700 TP_fast_assign( 701 __entry->crtc_id = crtc_id; 702 __entry->plane_id = plane_id; 703 __entry->fb_id = state ? state->fb->base.id : 0; 704 __entry->src_rect = drm_plane_state_src(state); 705 __entry->dst_rect = drm_plane_state_dest(state); 706 __entry->stage_idx = stage_idx; 707 __entry->stage = pstate->stage; 708 __entry->sspp = sspp; 709 __entry->multirect_idx = pstate->multirect_index; 710 __entry->multirect_mode = pstate->multirect_mode; 711 __entry->pixel_format = pixel_format; 712 __entry->modifier = modifier; 713 ), 714 TP_printk("crtc_id:%u plane_id:%u fb_id:%u src:" DRM_RECT_FP_FMT 715 " dst:" DRM_RECT_FMT " stage_idx:%u stage:%d, sspp:%d " 716 "multirect_index:%d multirect_mode:%u pix_format:%u " 717 "modifier:%llu", 718 __entry->crtc_id, __entry->plane_id, __entry->fb_id, 719 DRM_RECT_FP_ARG(&__entry->src_rect), 720 DRM_RECT_ARG(&__entry->dst_rect), 721 __entry->stage_idx, __entry->stage, __entry->sspp, 722 __entry->multirect_idx, __entry->multirect_mode, 723 __entry->pixel_format, __entry->modifier) 724 ); 725 726 TRACE_EVENT(dpu_crtc_setup_lm_bounds, 727 TP_PROTO(uint32_t drm_id, int mixer, struct drm_rect *bounds), 728 TP_ARGS(drm_id, mixer, bounds), 729 TP_STRUCT__entry( 730 __field( uint32_t, drm_id ) 731 __field( int, mixer ) 732 __field_struct( struct drm_rect, bounds ) 733 ), 734 TP_fast_assign( 735 __entry->drm_id = drm_id; 736 __entry->mixer = mixer; 737 __entry->bounds = *bounds; 738 ), 739 TP_printk("id:%u mixer:%d bounds:" DRM_RECT_FMT, __entry->drm_id, 740 __entry->mixer, DRM_RECT_ARG(&__entry->bounds)) 741 ); 742 743 TRACE_EVENT(dpu_crtc_vblank_enable, 744 TP_PROTO(uint32_t drm_id, uint32_t enc_id, bool enable, 745 struct dpu_crtc *crtc), 746 TP_ARGS(drm_id, enc_id, enable, crtc), 747 TP_STRUCT__entry( 748 __field( uint32_t, drm_id ) 749 __field( uint32_t, enc_id ) 750 __field( bool, enable ) 751 __field( bool, enabled ) 752 __field( bool, suspend ) 753 __field( bool, vblank_requested ) 754 ), 755 TP_fast_assign( 756 __entry->drm_id = drm_id; 757 __entry->enc_id = enc_id; 758 __entry->enable = enable; 759 __entry->enabled = crtc->enabled; 760 __entry->suspend = crtc->suspend; 761 __entry->vblank_requested = crtc->vblank_requested; 762 ), 763 TP_printk("id:%u encoder:%u enable:%s state{enabled:%s suspend:%s " 764 "vblank_req:%s}", 765 __entry->drm_id, __entry->enc_id, 766 __entry->enable ? "true" : "false", 767 __entry->enabled ? "true" : "false", 768 __entry->suspend ? "true" : "false", 769 __entry->vblank_requested ? "true" : "false") 770 ); 771 772 DECLARE_EVENT_CLASS(dpu_crtc_enable_template, 773 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc), 774 TP_ARGS(drm_id, enable, crtc), 775 TP_STRUCT__entry( 776 __field( uint32_t, drm_id ) 777 __field( bool, enable ) 778 __field( bool, enabled ) 779 __field( bool, suspend ) 780 __field( bool, vblank_requested ) 781 ), 782 TP_fast_assign( 783 __entry->drm_id = drm_id; 784 __entry->enable = enable; 785 __entry->enabled = crtc->enabled; 786 __entry->suspend = crtc->suspend; 787 __entry->vblank_requested = crtc->vblank_requested; 788 ), 789 TP_printk("id:%u enable:%s state{enabled:%s suspend:%s vblank_req:%s}", 790 __entry->drm_id, __entry->enable ? "true" : "false", 791 __entry->enabled ? "true" : "false", 792 __entry->suspend ? "true" : "false", 793 __entry->vblank_requested ? "true" : "false") 794 ); 795 DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_set_suspend, 796 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc), 797 TP_ARGS(drm_id, enable, crtc) 798 ); 799 DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_enable, 800 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc), 801 TP_ARGS(drm_id, enable, crtc) 802 ); 803 DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_disable, 804 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc), 805 TP_ARGS(drm_id, enable, crtc) 806 ); 807 DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_vblank, 808 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc), 809 TP_ARGS(drm_id, enable, crtc) 810 ); 811 812 TRACE_EVENT(dpu_crtc_disable_frame_pending, 813 TP_PROTO(uint32_t drm_id, int frame_pending), 814 TP_ARGS(drm_id, frame_pending), 815 TP_STRUCT__entry( 816 __field( uint32_t, drm_id ) 817 __field( int, frame_pending ) 818 ), 819 TP_fast_assign( 820 __entry->drm_id = drm_id; 821 __entry->frame_pending = frame_pending; 822 ), 823 TP_printk("id:%u frame_pending:%d", __entry->drm_id, 824 __entry->frame_pending) 825 ); 826 827 TRACE_EVENT(dpu_plane_set_scanout, 828 TP_PROTO(enum dpu_sspp index, struct dpu_hw_fmt_layout *layout, 829 enum dpu_sspp_multirect_index multirect_index), 830 TP_ARGS(index, layout, multirect_index), 831 TP_STRUCT__entry( 832 __field( enum dpu_sspp, index ) 833 __field_struct( struct dpu_hw_fmt_layout, layout ) 834 __field( enum dpu_sspp_multirect_index, multirect_index) 835 ), 836 TP_fast_assign( 837 __entry->index = index; 838 __entry->layout = *layout; 839 __entry->multirect_index = multirect_index; 840 ), 841 TP_printk("index:%d layout:{%ux%u @ [%u/%u, %u/%u, %u/%u, %u/%u]} " 842 "multirect_index:%d", __entry->index, __entry->layout.width, 843 __entry->layout.height, __entry->layout.plane_addr[0], 844 __entry->layout.plane_size[0], 845 __entry->layout.plane_addr[1], 846 __entry->layout.plane_size[1], 847 __entry->layout.plane_addr[2], 848 __entry->layout.plane_size[2], 849 __entry->layout.plane_addr[3], 850 __entry->layout.plane_size[3], __entry->multirect_index) 851 ); 852 853 TRACE_EVENT(dpu_plane_disable, 854 TP_PROTO(uint32_t drm_id, bool is_virtual, uint32_t multirect_mode), 855 TP_ARGS(drm_id, is_virtual, multirect_mode), 856 TP_STRUCT__entry( 857 __field( uint32_t, drm_id ) 858 __field( bool, is_virtual ) 859 __field( uint32_t, multirect_mode ) 860 ), 861 TP_fast_assign( 862 __entry->drm_id = drm_id; 863 __entry->is_virtual = is_virtual; 864 __entry->multirect_mode = multirect_mode; 865 ), 866 TP_printk("id:%u is_virtual:%s multirect_mode:%u", __entry->drm_id, 867 __entry->is_virtual ? "true" : "false", 868 __entry->multirect_mode) 869 ); 870 871 DECLARE_EVENT_CLASS(dpu_rm_iter_template, 872 TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id), 873 TP_ARGS(id, type, enc_id), 874 TP_STRUCT__entry( 875 __field( uint32_t, id ) 876 __field( enum dpu_hw_blk_type, type ) 877 __field( uint32_t, enc_id ) 878 ), 879 TP_fast_assign( 880 __entry->id = id; 881 __entry->type = type; 882 __entry->enc_id = enc_id; 883 ), 884 TP_printk("id:%d type:%d enc_id:%u", __entry->id, __entry->type, 885 __entry->enc_id) 886 ); 887 DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_intf, 888 TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id), 889 TP_ARGS(id, type, enc_id) 890 ); 891 DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_ctls, 892 TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id), 893 TP_ARGS(id, type, enc_id) 894 ); 895 896 TRACE_EVENT(dpu_rm_reserve_lms, 897 TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id, 898 uint32_t pp_id), 899 TP_ARGS(id, type, enc_id, pp_id), 900 TP_STRUCT__entry( 901 __field( uint32_t, id ) 902 __field( enum dpu_hw_blk_type, type ) 903 __field( uint32_t, enc_id ) 904 __field( uint32_t, pp_id ) 905 ), 906 TP_fast_assign( 907 __entry->id = id; 908 __entry->type = type; 909 __entry->enc_id = enc_id; 910 __entry->pp_id = pp_id; 911 ), 912 TP_printk("id:%d type:%d enc_id:%u pp_id:%u", __entry->id, 913 __entry->type, __entry->enc_id, __entry->pp_id) 914 ); 915 916 TRACE_EVENT(dpu_vbif_wait_xin_halt_fail, 917 TP_PROTO(enum dpu_vbif index, u32 xin_id), 918 TP_ARGS(index, xin_id), 919 TP_STRUCT__entry( 920 __field( enum dpu_vbif, index ) 921 __field( u32, xin_id ) 922 ), 923 TP_fast_assign( 924 __entry->index = index; 925 __entry->xin_id = xin_id; 926 ), 927 TP_printk("index:%d xin_id:%u", __entry->index, __entry->xin_id) 928 ); 929 930 TRACE_EVENT(dpu_pp_connect_ext_te, 931 TP_PROTO(enum dpu_pingpong pp, u32 cfg), 932 TP_ARGS(pp, cfg), 933 TP_STRUCT__entry( 934 __field( enum dpu_pingpong, pp ) 935 __field( u32, cfg ) 936 ), 937 TP_fast_assign( 938 __entry->pp = pp; 939 __entry->cfg = cfg; 940 ), 941 TP_printk("pp:%d cfg:%u", __entry->pp, __entry->cfg) 942 ); 943 944 DECLARE_EVENT_CLASS(dpu_core_irq_idx_cnt_template, 945 TP_PROTO(int irq_idx, int enable_count), 946 TP_ARGS(irq_idx, enable_count), 947 TP_STRUCT__entry( 948 __field( int, irq_idx ) 949 __field( int, enable_count ) 950 ), 951 TP_fast_assign( 952 __entry->irq_idx = irq_idx; 953 __entry->enable_count = enable_count; 954 ), 955 TP_printk("irq_idx:%d enable_count:%u", __entry->irq_idx, 956 __entry->enable_count) 957 ); 958 DEFINE_EVENT(dpu_core_irq_idx_cnt_template, dpu_core_irq_enable_idx, 959 TP_PROTO(int irq_idx, int enable_count), 960 TP_ARGS(irq_idx, enable_count) 961 ); 962 DEFINE_EVENT(dpu_core_irq_idx_cnt_template, dpu_core_irq_disable_idx, 963 TP_PROTO(int irq_idx, int enable_count), 964 TP_ARGS(irq_idx, enable_count) 965 ); 966 967 DECLARE_EVENT_CLASS(dpu_core_irq_callback_template, 968 TP_PROTO(int irq_idx, struct dpu_irq_callback *callback), 969 TP_ARGS(irq_idx, callback), 970 TP_STRUCT__entry( 971 __field( int, irq_idx ) 972 __field( struct dpu_irq_callback *, callback) 973 ), 974 TP_fast_assign( 975 __entry->irq_idx = irq_idx; 976 __entry->callback = callback; 977 ), 978 TP_printk("irq_idx:%d callback:%pK", __entry->irq_idx, 979 __entry->callback) 980 ); 981 DEFINE_EVENT(dpu_core_irq_callback_template, dpu_core_irq_register_callback, 982 TP_PROTO(int irq_idx, struct dpu_irq_callback *callback), 983 TP_ARGS(irq_idx, callback) 984 ); 985 DEFINE_EVENT(dpu_core_irq_callback_template, dpu_core_irq_unregister_callback, 986 TP_PROTO(int irq_idx, struct dpu_irq_callback *callback), 987 TP_ARGS(irq_idx, callback) 988 ); 989 990 TRACE_EVENT(dpu_core_perf_update_clk, 991 TP_PROTO(struct drm_device *dev, bool stop_req, u64 clk_rate), 992 TP_ARGS(dev, stop_req, clk_rate), 993 TP_STRUCT__entry( 994 __string( dev_name, dev->unique ) 995 __field( bool, stop_req ) 996 __field( u64, clk_rate ) 997 ), 998 TP_fast_assign( 999 __assign_str(dev_name, dev->unique); 1000 __entry->stop_req = stop_req; 1001 __entry->clk_rate = clk_rate; 1002 ), 1003 TP_printk("dev:%s stop_req:%s clk_rate:%llu", __get_str(dev_name), 1004 __entry->stop_req ? "true" : "false", __entry->clk_rate) 1005 ); 1006 1007 #define DPU_ATRACE_END(name) trace_tracing_mark_write(current->tgid, name, 0) 1008 #define DPU_ATRACE_BEGIN(name) trace_tracing_mark_write(current->tgid, name, 1) 1009 #define DPU_ATRACE_FUNC() DPU_ATRACE_BEGIN(__func__) 1010 1011 #define DPU_ATRACE_INT(name, value) \ 1012 trace_dpu_trace_counter(current->tgid, name, value) 1013 1014 #endif /* _DPU_TRACE_H_ */ 1015 1016 /* This part must be outside protection */ 1017 #undef TRACE_INCLUDE_PATH 1018 #define TRACE_INCLUDE_PATH . 1019 #include <trace/define_trace.h> 1020