1 /* 2 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 and 6 * only version 2 as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 */ 14 15 #ifndef __DPU_RM_H__ 16 #define __DPU_RM_H__ 17 18 #include <linux/list.h> 19 20 #include "msm_kms.h" 21 #include "dpu_hw_top.h" 22 23 /** 24 * struct dpu_rm - DPU dynamic hardware resource manager 25 * @dev: device handle for event logging purposes 26 * @rsvps: list of hardware reservations by each crtc->encoder->connector 27 * @hw_blks: array of lists of hardware resources present in the system, one 28 * list per type of hardware block 29 * @hw_mdp: hardware object for mdp_top 30 * @lm_max_width: cached layer mixer maximum width 31 * @rsvp_next_seq: sequence number for next reservation for debugging purposes 32 * @rm_lock: resource manager mutex 33 */ 34 struct dpu_rm { 35 struct drm_device *dev; 36 struct list_head rsvps; 37 struct list_head hw_blks[DPU_HW_BLK_MAX]; 38 struct dpu_hw_mdp *hw_mdp; 39 uint32_t lm_max_width; 40 uint32_t rsvp_next_seq; 41 struct mutex rm_lock; 42 }; 43 44 /** 45 * struct dpu_rm_hw_blk - resource manager internal structure 46 * forward declaration for single iterator definition without void pointer 47 */ 48 struct dpu_rm_hw_blk; 49 50 /** 51 * struct dpu_rm_hw_iter - iterator for use with dpu_rm 52 * @hw: dpu_hw object requested, or NULL on failure 53 * @blk: dpu_rm internal block representation. Clients ignore. Used as iterator. 54 * @enc_id: DRM ID of Encoder client wishes to search for, or 0 for Any Encoder 55 * @type: Hardware Block Type client wishes to search for. 56 */ 57 struct dpu_rm_hw_iter { 58 void *hw; 59 struct dpu_rm_hw_blk *blk; 60 uint32_t enc_id; 61 enum dpu_hw_blk_type type; 62 }; 63 64 /** 65 * dpu_rm_init - Read hardware catalog and create reservation tracking objects 66 * for all HW blocks. 67 * @rm: DPU Resource Manager handle 68 * @cat: Pointer to hardware catalog 69 * @mmio: mapped register io address of MDP 70 * @dev: device handle for event logging purposes 71 * @Return: 0 on Success otherwise -ERROR 72 */ 73 int dpu_rm_init(struct dpu_rm *rm, 74 struct dpu_mdss_cfg *cat, 75 void __iomem *mmio, 76 struct drm_device *dev); 77 78 /** 79 * dpu_rm_destroy - Free all memory allocated by dpu_rm_init 80 * @rm: DPU Resource Manager handle 81 * @Return: 0 on Success otherwise -ERROR 82 */ 83 int dpu_rm_destroy(struct dpu_rm *rm); 84 85 /** 86 * dpu_rm_reserve - Given a CRTC->Encoder->Connector display chain, analyze 87 * the use connections and user requirements, specified through related 88 * topology control properties, and reserve hardware blocks to that 89 * display chain. 90 * HW blocks can then be accessed through dpu_rm_get_* functions. 91 * HW Reservations should be released via dpu_rm_release_hw. 92 * @rm: DPU Resource Manager handle 93 * @drm_enc: DRM Encoder handle 94 * @crtc_state: Proposed Atomic DRM CRTC State handle 95 * @topology: Pointer to topology info for the display 96 * @test_only: Atomic-Test phase, discard results (unless property overrides) 97 * @Return: 0 on Success otherwise -ERROR 98 */ 99 int dpu_rm_reserve(struct dpu_rm *rm, 100 struct drm_encoder *drm_enc, 101 struct drm_crtc_state *crtc_state, 102 struct msm_display_topology topology, 103 bool test_only); 104 105 /** 106 * dpu_rm_reserve - Given the encoder for the display chain, release any 107 * HW blocks previously reserved for that use case. 108 * @rm: DPU Resource Manager handle 109 * @enc: DRM Encoder handle 110 * @Return: 0 on Success otherwise -ERROR 111 */ 112 void dpu_rm_release(struct dpu_rm *rm, struct drm_encoder *enc); 113 114 /** 115 * dpu_rm_get_mdp - Retrieve HW block for MDP TOP. 116 * This is never reserved, and is usable by any display. 117 * @rm: DPU Resource Manager handle 118 * @Return: Pointer to hw block or NULL 119 */ 120 struct dpu_hw_mdp *dpu_rm_get_mdp(struct dpu_rm *rm); 121 122 /** 123 * dpu_rm_init_hw_iter - setup given iterator for new iteration over hw list 124 * using dpu_rm_get_hw 125 * @iter: iter object to initialize 126 * @enc_id: DRM ID of Encoder client wishes to search for, or 0 for Any Encoder 127 * @type: Hardware Block Type client wishes to search for. 128 */ 129 void dpu_rm_init_hw_iter( 130 struct dpu_rm_hw_iter *iter, 131 uint32_t enc_id, 132 enum dpu_hw_blk_type type); 133 /** 134 * dpu_rm_get_hw - retrieve reserved hw object given encoder and hw type 135 * Meant to do a single pass through the hardware list to iteratively 136 * retrieve hardware blocks of a given type for a given encoder. 137 * Initialize an iterator object. 138 * Set hw block type of interest. Set encoder id of interest, 0 for any. 139 * Function returns first hw of type for that encoder. 140 * Subsequent calls will return the next reserved hw of that type in-order. 141 * Iterator HW pointer will be null on failure to find hw. 142 * @rm: DPU Resource Manager handle 143 * @iter: iterator object 144 * @Return: true on match found, false on no match found 145 */ 146 bool dpu_rm_get_hw(struct dpu_rm *rm, struct dpu_rm_hw_iter *iter); 147 148 /** 149 * dpu_rm_check_property_topctl - validate property bitmask before it is set 150 * @val: user's proposed topology control bitmask 151 * @Return: 0 on success or error 152 */ 153 int dpu_rm_check_property_topctl(uint64_t val); 154 155 #endif /* __DPU_RM_H__ */ 156